This patch adds pinctrl driver, clock gate driver and reset controller
support for defconfig files of mtmips boards.
Signed-off-by: Weijie Gao
---
configs/gardena-smart-gateway-mt7688_defconfig | 6 ++
configs/linkit-smart-7688_defconfig| 6 ++
2 files changed, 12 insertions(
This patch adds a dts property cd-active-high for builtin-cd mode to make
it configurable instead of using hardcoded active-low.
Signed-off-by: Weijie Gao
---
drivers/mmc/mtk-sd.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/drivers/mmc/mtk-sd.c b/drivers/mmc/mtk-s
This patch removes hardcoded gpio settings as they have been replaced by
pinctrl in dts, and also replaces regmap-based phy reset with a more
generic reset controller.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 45 +++-
1 file changed, 8 insertio
This patch adds clock gating driver for MediaTek MIPS platform
Signed-off-by: Weijie Gao
---
drivers/clk/Kconfig | 8
drivers/clk/Makefile | 1 +
drivers/clk/clk-mtmips-cg.c | 63
include/dt-bindings/clk/mt7628-clk.h |
This adds default pinctrl (dual SPI chip select) for gardena smart gateway
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 3 +++
1 file changed, 3 insertions(+)
diff --git a/arch/mips/dts/gardena-smart-gateway-mt7688.dts
b/arch/mips/dts/gardena-smart-gateway-mt7
This patch changes all defconfig files of mtmips to use mtk high-speed
uart driver.
This driver is compatible with ns16550a when baudrate <= 115200.
Signed-off-by: Weijie Gao
---
configs/gardena-smart-gateway-mt7688-ram_defconfig | 2 +-
configs/gardena-smart-gateway-mt7688_defconfig | 2 +-
This patch adds a referenceable name to eth node, and adds default pinctrl
for all boards.
There are two pinctrl nodes used for two scenarios:
ephy_iot_mode- for IOT boards which have only one port (PHY0)
ephy_router_mode - For routers which have more than one ports
Signed-off-by: Weijie Gao
This patch add support for mt7628-eth to isolate LAN/WAN ports mainly to
prevent LAN devices from getting IP address from WAN.
Signed-off-by: Weijie Gao
---
drivers/net/mt7628-eth.c | 32
1 file changed, 32 insertions(+)
diff --git a/drivers/net/mt7628-eth.c b/d
When received a packet with an invalid length recorded in rx descriptor,
we should free this rx descriptor to allow us to continue to receive
following packets.
Without doing so, u-boot will stuck in a dead loop trying to process this
invalid rx descriptor.
This patch adds a call to mt7628_eth_fre
The mt7628 has an embedded ethernet switch (5 phy ports + 1 cpu port).
Although in IOT mode only port0 is usable, the phy0 is still connected
to the switch, not the ethernet gmac directly.
This patch removes these codes as we should not check only the status of
phy0 because phy0 may not be linked
This patch adds non-DM version for mtk hsuart driver and makes it
compatible with ns16550a driver in configuration.
This is needed in SPL with CONFIG_SPL_DM disabled for reducing size.
Signed-off-by: Weijie Gao
---
drivers/serial/serial.c | 2 +
drivers/serial/serial_mtk.c | 202 ++
This patch adds default p0led status for all boards.
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 9 +
arch/mips/dts/linkit-smart-7688.dts| 9 +
2 files changed, 18 insertions(+)
diff --git a/arch/mips/dts/gardena-smart-gateway-mt768
This patch adds reset controller driver for MediaTek MIPS platform and
header file for mt7628.
Signed-off-by: Weijie Gao
---
drivers/reset/Kconfig| 7 ++
drivers/reset/Makefile | 1 +
drivers/reset/reset-mtmips.c | 82
This patch adds slew rate calibration for mt76x8-usb-phy, removes code
which belongs to mt7620, and gets rid of using syscon and regmap by using
clock driver and reset controller.
Signed-off-by: Weijie Gao
---
drivers/phy/Kconfig | 2 +
drivers/phy/mt76x8-usb-phy.c | 225 +
This patch adds pinctrl node with default pin state for mt7628an.dtsi.
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 150 +
1 file changed, 150 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index e9241a0737..b
Currently this driver uses a different way to implement the spi xfer,
by modifying some fields of two registers, which is incompatible with the
MTK's original SDK linux driver. This will cause the flash data being
damaged by the SDK driver.
This patch lets the mt7621_spi_set_cs() restore the origi
This patch adds mmc support for MediaTek MT7620/MT7628 SoCs.
Signed-off-by: Weijie Gao
---
drivers/mmc/Kconfig | 2 +-
drivers/mmc/mtk-sd.c | 23 ---
2 files changed, 21 insertions(+), 4 deletions(-)
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 0ccb1ea701..
This patch adds pinctrl support for mt7628, with a file for common pinmux
functions and a file for mt7628 which has additional support for pinconf.
Signed-off-by: Weijie Gao
---
drivers/pinctrl/Kconfig | 1 +
drivers/pinctrl/Makefile | 1 +
drivers/
This patch series have the following changes:
- Add pinctrl(both pinmux and pinconf) driver, reset controller driver and
clock gating driver for mt7628.
- Add mt7628 platform to mtk-sd driver.
- Modify mt7628's ethernet & usb phy driver to take advantages from the new
drivers.
- Update mt762
This patch adds mmc related nodes for mt7628an.dtsi
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 22 ++
1 file changed, 22 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index dd11cac28c..929397c729 100644
--- a/arch/mips/dts
This patch updates reset controller node for mt7628
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 36
1 file changed, 24 insertions(+), 12 deletions(-)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index f07de1b611..0e2b65
The mt7621 spi controller supports continuous generic half-duplex spi
transaction. There is no need to cache xfer data at all.
To achieve this goal, the OPADDR register must be used as the first data
to be sent. And follows the eight generic DIDO registers. But one thing
different between OPADDR a
The UART of MT7628 has fixed 40MHz input clock so there is no need to put
clock-frequency in every dts files. Just put it into the common dtsi file.
Signed-off-by: Weijie Gao
---
arch/mips/dts/gardena-smart-gateway-mt7688.dts | 1 -
arch/mips/dts/linkit-smart-7688.dts| 1 -
arch/mips
This patch adds default pinctrl for uart nodes
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 9 +
1 file changed, 9 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index be9ab50931..f07de1b611 100644
--- a/arch/mips/dts/mt7628a.dtsi
+++ b/
This patch adds clkgate node for mt7628 and adds clock gate property for
usb phy node.
Signed-off-by: Weijie Gao
---
arch/mips/dts/mt7628a.dtsi | 10 ++
1 file changed, 10 insertions(+)
diff --git a/arch/mips/dts/mt7628a.dtsi b/arch/mips/dts/mt7628a.dtsi
index 0e2b6598ea..dd11cac28c 100
All three UARTs of mt7628 are actually MediaTek's high-speed UARTs which
support baudrate up to 921600.
The high-speed UART is compatible with ns16550 when baudrate <= 115200.
Add compatible string to dtsi file so u-boot can use it when serial_mtk
driver is built in.
Signed-off-by: Weijie Gao
--
This patch adds codes to enable FIFO and disable flow control taken from
ns16550 driver.
Signed-off-by: Weijie Gao
---
drivers/serial/serial_mtk.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/drivers/serial/serial_mtk.c b/drivers/serial/serial_mtk.c
index bce1be8227
Hi Jean,
>
> Hi Marek, Sherry,
>
>
> we keep the cdns3 node for usb gadget driver, then add a usb host
> node for
> xhci-imx8 driver in *-uboot.dtsi. so here is no need to change the
> host driver
> >>> compatible.
> But the compatible in gadget driver should be changed
Hi Sagar,
On Wed, Aug 28, 2019 at 1:46 PM Sagar Kadam wrote:
>
> Hello Bin,
>
> On Tue, Aug 27, 2019 at 3:48 AM Bin Meng wrote:
> >
> > On Wed, Aug 14, 2019 at 1:08 AM Sagar Shrikant Kadam
> > wrote:
> > >
> > > This patch series adds support for 32MiB SPI-NOR flash (is25wp256 from
> > > ISSI).
Hello Bin,
On Tue, Aug 27, 2019 at 3:48 AM Bin Meng wrote:
>
> On Wed, Aug 14, 2019 at 1:08 AM Sagar Shrikant Kadam
> wrote:
> >
> > This patch series adds support for 32MiB SPI-NOR flash (is25wp256 from
> > ISSI). Many thanks to Bhargav Shah for
> > porting the spi-nor patches from linux to U-
Hi Bin,
Thanks a lot for your review!
Thanks,
Zhiqiang
> -Original Message-
> From: Bin Meng
> Sent: 2019年8月27日 20:55
> To: Z.q. Hou
> Cc: u-boot@lists.denx.de; Prabhakar Kushwaha
>
> Subject: Re: [PATCHv3 1/3] dm: pcie_fsl: Convert IS_ENABLED() run-time
> checking to #ifdef
>
> On T
On 8/27/19 6:01 PM, Vikas MANOCHA wrote:
> Stephen Warren wrote at Tuesday, August 27, 2019 3:50 PM
>> On 8/27/19 4:10 PM, Vikas MANOCHA wrote:
>>> Stephen Warren wrote at Tuesday, August 27, 2019 10:55 AM
The current code in reserve_noncached() has two issues:
1) The first update of
Hi Sagar,
On Wed, Aug 28, 2019 at 6:32 AM Sagar Kadam wrote:
>
> Hi Bin,
>
> On Thu, Aug 22, 2019 at 8:12 PM Bin Meng wrote:
> >
> > On Fri, Aug 23, 2019 at 9:02 AM Sagar Shrikant Kadam
> > wrote:
> > >
> > > This patch adds a DM based driver model for gpio controller present in
> > > FU540-C00
> Subject: [U-Boot] [PATCH v1 6/7] mmc: fsl_esdhc: Add emmc hs200 support
>
> Add eMMC hs200 mode support for increasing ls1028/ls1012/lx2160 eMMC
> work performance, but without tuning procedure which will cause mmc
> doesn't work. and this should be TODO work.
>
> Signed-off-by: Yinbo Zhu
Ack
Hi Stephen,
> -Original Message-
> From: Stephen Warren
> Sent: Tuesday, August 27, 2019 3:50 PM
> To: Vikas MANOCHA ; Tom Rini
>
> Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
>
> Subject: Re: [PATCH] board_f: fix noncached reservation calculation
>
> On 8/27/19 4:1
Hi Grant,
On Tue, Aug 27, 2019 at 10:35:37AM +, Grant Likely wrote:
> Hi Takahiro,
>
> On 17/05/2019 01:12, AKASHI Takahiro wrote:
> [...]
> > In fact, I have already imported relevant kernel code into U-Boot
> > and it now works perfectly with my experimental UEFI secure boot patch,
>
> Spe
On Wed, Aug 28, 2019 at 4:05 AM Juan Francisco Cantero Hurtado
wrote:
>
> Hi, I'm trying to build an u-boot image for the Olimex A64 board.
> Everything builds fine (ATF and u-boot) but when I boot the board with
> the image, the USB port doesn't receive power. I've an USB meter
> connected and it
On 8/27/19 4:10 PM, Vikas MANOCHA wrote:
Hi Stephen,
-Original Message-
From: Stephen Warren
Sent: Tuesday, August 27, 2019 10:55 AM
To: Tom Rini
Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
; Vikas MANOCHA
Subject: [PATCH] board_f: fix noncached reservation calcul
Hi, I'm trying to build an u-boot image for the Olimex A64 board.
Everything builds fine (ATF and u-boot) but when I boot the board with
the image, the USB port doesn't receive power. I've an USB meter
connected and it never receives power. I've tried with HEAD, 2019.10-rc3
and 2019.07. Nothing
Hi Bin,
On Thu, Aug 22, 2019 at 8:12 PM Bin Meng wrote:
>
> On Fri, Aug 23, 2019 at 9:02 AM Sagar Shrikant Kadam
> wrote:
> >
> > This patch adds a DM based driver model for gpio controller present in
> > FU540-C000 SoC on HiFive Unleashed A00 board. This SoC has one GPIO
> > bank and 16 GPIO li
Hi Bin,
Bin Meng writes:
> Hi Thomas,
>
> On Sat, Jun 9, 2018 at 6:06 AM Thomas Fitzsimmons wrote:
>>
>> Add support for loading U-Boot on the Broadcom 7445 SoC. This port
>> assumes Broadcom's BOLT bootloader is acting as the second stage
>> bootloader, and U-Boot is acting as the third stage
Hi Stephen,
> -Original Message-
> From: Stephen Warren
> Sent: Tuesday, August 27, 2019 10:55 AM
> To: Tom Rini
> Cc: twar...@wwwdotorg.org; u-boot@lists.denx.de; Stephen Warren
> ; Vikas MANOCHA
> Subject: [PATCH] board_f: fix noncached reservation calculation
>
> From: Stephen Warre
Hi Ralph,
> In combination with multiple partitions in NAND, this printf() ends up
> being more noise than helpful. Change it to debug() instead.
>
> Signed-off-by: Ralph Siemsen
> ---
>
> drivers/dfu/dfu_nand.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/
The G12B clock controller is almost identical to the G12A and
so far the differences don't matter. Adding the G12B compatible
makes USB work on the Odroid-N2.
Signed-off-by: Mark Kettenis
---
drivers/clk/meson/g12a.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/clk/meson/g12a.c b
This issue can be seen on 32bit operation when one of E820_RAM type
entries is greater than 4GB memory space.
The efi_alloc() finds a free memory in the conventional memory which
is greater than 4GB. But, it does type cast to 32bit address space
and eventually returns invalid address.
Signed-off-
In combination with multiple partitions in NAND, this printf() ends up
being more noise than helpful. Change it to debug() instead.
Signed-off-by: Ralph Siemsen
---
drivers/dfu/dfu_nand.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/dfu/dfu_nand.c b/drivers/dfu/df
From: Stephen Warren
The current code in reserve_noncached() has two issues:
1) The first update of gd->start_addr_sp always rounds down to a section
start. However, the equivalent calculation in cache.c:noncached_init()
always first rounds up to a section start, then subtracts a section size.
T
To fully demonstrate crash outputs for UEFI images provide a standalone
UEFI application that tries to invoke an illegal opcode.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_selftest/Makefile | 10 +-
lib/efi_selftest/efi_selftest_exception.c | 141 +++---
On Tue, Aug 27, 2019 at 11:01:42AM +, Prabhakar Kushwaha wrote:
> Dear Tom,
>
> Please find my pull request for u-boot-mpc85xx/master
>
> Summary:
> Support of device tree model for T2080RDB, T4240RDB, T1024RDB,
> T1042D4RDB,
> P1020RDB, P2020RDB, P2041RDB, P3041DS, P4080DS
On Tue, Aug 27, 2019 at 11:48:26AM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> The following changes since commit d39221f33f0e78cc80d1304ab4ca4e4a3886fbff:
>
> Prepare v2019.10-rc3 (2019-08-26 20:16:42 -0400)
>
> are available in the Git repository at:
>
> https://gitlab.denx.de/u-boot/c
Hi Tom
This pull request is mainly fixes and update related to STM32MP1 platforms
Travis CI status: https://travis-ci.org/pchotard/u-boot/builds/577259480
The following changes since commit d39221f33f0e78cc80d1304ab4ca4e4a3886fbff:
Prepare v2019.10-rc3 (2019-08-26 20:16:42 -0400)
are availa
On 8/27/19 2:34 AM, Peng Fan wrote:
Hi Eddie,
Subject: [PATCH v3 2/4] mmc: Add Aspeed SD controller driver
This patch could not be applied to latest tree, could you please check?
Sorry I was a little behind master. I just sent this patch rebased.
Thanks,
Eddie
Thanks,
Peng.
Add supp
Add support for the Aspeed SD host controller engine.
Signed-off-by: Eddie James
Reviewed-by: Cédric Le Goater
---
Changes since v3:
- Rebase on master
arch/arm/include/asm/gpio.h | 3 +-
drivers/mmc/Kconfig | 11 ++
drivers/mmc/Makefile| 1 +
drivers/mmc/aspeed_sdhci.c
On Tue, Aug 27, 2019 at 07:20:07AM +, Peng Fan wrote:
> Hi Tom,
>
> > Subject: [U-Boot] [ANN] U-Boot v2019.10-rc3 released
> >
> > Hey all,
> >
> > It's release day and here's v2019.10-rc3. We're well into what should be
> > the
> > stabilization period at this point. Going forward I am h
Hi Sherry,
On 21/08/2019 16:36, Sherry Sun wrote:
The cdns3-usb-phy driver supports both host and peripheral
mode of usb driver which use cadence usb3 IP.
Signed-off-by: Sherry Sun
---
drivers/phy/Kconfig | 8 ++
drivers/phy/Makefile| 1 +
drivers/phy/cdns3-usb-phy.c |
On Tue, Aug 27, 2019 at 03:08:36PM +0200, Marek Vasut wrote:
> On 8/27/19 3:02 PM, Niv Shetrit wrote:
> > Signed-off-by: Niv Shetrit
> > ---
> > drivers/usb/gadget/core.c | 2 +-
> > 1 file changed, 1 insertion(+), 1 deletion(-)
> >
> > diff --git a/drivers/usb/gadget/core.c b/drivers/usb/gadget
Hi Marek, Sherry,
we keep the cdns3 node for usb gadget driver, then add a usb host node
for
xhci-imx8 driver in *-uboot.dtsi. so here is no need to change the host driver
compatible.
But the compatible in gadget driver should be changed later.
We should try avoiding ABI breaks in DT.
But t
On 8/27/19 3:02 PM, Niv Shetrit wrote:
> Signed-off-by: Niv Shetrit
> ---
> drivers/usb/gadget/core.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/usb/gadget/core.c b/drivers/usb/gadget/core.c
> index ffaf161fb7..ae7387ee0a 100644
> --- a/drivers/usb/gadget/co
Signed-off-by: Niv Shetrit
---
drivers/usb/gadget/core.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/usb/gadget/core.c b/drivers/usb/gadget/core.c
index ffaf161fb7..ae7387ee0a 100644
--- a/drivers/usb/gadget/core.c
+++ b/drivers/usb/gadget/core.c
@@ -307,7 +307,7 @
Fixed 'Logically dead code' coverity warning: in for loop,
stop condition is 'while descriptor==NULL' instead of 'while
descriptor!=NULL'.
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
On Tue, Aug 27, 2019 at 6:13 PM Z.q. Hou wrote:
>
> From: Hou Zhiqiang
>
> The Class Code fixup method was changed from PCIe block
> revision 3.0, the current fixup is only valid for the
> revision 3.0 and the later ones.
>
> This patch is to add the Class Code fixup for the block
> revision < 3.
On Tue, Aug 27, 2019 at 6:13 PM Z.q. Hou wrote:
>
> From: Hou Zhiqiang
>
> This can avoid build error:
> The macro in brackets of the IS_ENABLED(CONFIG_FOO) is only
> defined on the platforms that select the CONFIG_FOO, while
> it's not defined on platforms that do not select the
> CONFIG_FOO.
>
Hi Peng
> -Original Message-
> From: U-Boot On Behalf Of Yinbo Zhu
> Sent: Tuesday, July 16, 2019 12:39 PM
> To: York Sun ; u-boot@lists.denx.de
> Cc: Jiafei Pan ; Yinbo Zhu ; Xiaobo
> Xie
> Subject: [U-Boot] [PATCH v1 6/7] mmc: fsl_esdhc: Add emmc hs200 support
>
> Add eMMC hs200 mode
On Tue, Aug 27, 2019 at 11:56:49AM +0100, Ryan Harkin wrote:
> This reverts commit fc04b923541d984b1544056fd3bfa8129d4e5aac where the
> FVP DRAM configuration was added.
>
Semi-hosting just works fine, so
Acked-by: Sudeep Holla
--
Regards,
Sudeep
___
From: Hou Zhiqiang
Compile the legacy PCIe initialization reoutines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
board/freescale/mpc8548cds/mpc8548cds.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git
From: Hou Zhiqiang
Add compatible string for P4080 PCIe.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
drivers/pci/pcie_fsl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 9b60492fc5..30fff1ede7 100
From: Hou Zhiqiang
Add compatible string for MPC8548 PCIe.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
drivers/pci/pcie_fsl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 199cec3e9b..ab25aeee73 1
From: Hou Zhiqiang
Compile the legacy PCIe initialization reoutines for P2041RDB,
P3041, P4080, P5020 and P5040 DS boards only when DM_PCI is
not enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
board/freescale/common/p_corenet/pci.c | 2 ++
1 file ch
From: Hou Zhiqiang
Add compatible string for P5040 PCIe.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
drivers/pci/pcie_fsl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 30fff1ede7..199cec3e9b 100
From: Hou Zhiqiang
Add compatible string for P2041 PCIe.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
drivers/pci/pcie_fsl.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 31cb5d25ad..687947e
From: Hou Zhiqiang
Enable the DM PCIe driver in P1020RDB defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/P1020RDB-PC_36BIT_NAND_defconfig | 4
configs/P1020RDB-PC_36BIT_SDCARD_defconfig | 4
configs/P1020RDB-PC_36BIT_SPIFLASH
From: Hou Zhiqiang
MPC8548 integrated a PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for the PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/mp
From: Hou Zhiqiang
P4080 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/p408
From: Hou Zhiqiang
Enable the DM PCIe driver in P3041DS defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/P3041DS_NAND_defconfig | 4
configs/P3041DS_SDCARD_defconfig | 4
configs/P3041DS_SPIFLASH_defconfig | 4
configs/P3
From: Hou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
include/configs/MPC8548CDS.h | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-)
diff --git a/i
From: Hou Zhiqiang
T102x integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/t102
From: Hou Zhiqiang
Enable the DM PCIe driver in P2020RDB defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/P2020RDB-PC_36BIT_NAND_defconfig | 4
configs/P2020RDB-PC_36BIT_SDCARD_defconfig | 4
configs/P2020RDB-PC_36BIT_SPIFLASH
From: Hou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
include/configs/P2041RDB.h | 55 +++---
1 file changed, 15 insertions(+), 40 deletions(-)
From: Hou Zhiqiang
Enable the DM PCIe driver in P5040DS defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/P5040DS_NAND_defconfig | 4
configs/P5040DS_SDCARD_defconfig | 4
configs/P5040DS_SPIFLASH_defconfig | 4
configs/P5
From: Hou Zhiqiang
Enable the DM PCIe driver in T1024RDB defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/T1024RDB_NAND_defconfig | 4
configs/T1024RDB_SDCARD_defconfig | 4
configs/T1024RDB_SPIFLASH_defconfig | 4
config
From: Hou Zhiqiang
Add compatible string for T104x PCIe.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
drivers/pci/pcie_fsl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index fd7aae59f7..a085c0cab9 100
From: Hou Zhiqiang
Compile the legacy PCIe initialization reoutines for P1020,
P1021, P1024, P1025 and P2020 RDB boards only when DM_PCI
is not enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
board/freescale/p1_p2_rdb_pc/p1_p2_rdb_pc.c | 4 +++-
1 fil
From: Hou Zhiqiang
P1020 integrated 2 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/p10
From: Hou Zhiqiang
Remove the macro CONFIG_ARCH_T1040 from the T102xRDB.h and
the PCIE4 related macros, as there are only 3 PCIe controllers
on T102x SoCs.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
include/configs/T102xRDB.h | 24
From: Hou Zhiqiang
P3041 integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/p304
From: Hou Zhiqiang
P2020 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 1.0a, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/p20
From: Hou Zhiqiang
Disable legacy PCI and PCIe fixup when CONFIG_DM_PCI is selected.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
board/freescale/common/cds_pci_ft.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/board/freescale/comm
From: Hou Zhiqiang
Add compatible string for P3041 PCIe.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
drivers/pci/pcie_fsl.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pci/pcie_fsl.c b/drivers/pci/pcie_fsl.c
index 687947ed85..9b60492fc5 100
From: Hou Zhiqiang
P2041 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/p204
From: Hou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
include/configs/T104xRDB.h | 38 --
1 file changed, 20 insertions(+), 18 deletions(-)
From: Hou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
include/configs/corenet_ds.h | 63 +++-
1 file changed, 19 insertions(+), 44 deletions(-)
From: Hou Zhiqiang
T104x integrated 4 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/t104
From: Hou Zhiqiang
Enable the DM PCIe driver in P2041RDB defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/P2041RDB_NAND_defconfig | 4
configs/P2041RDB_SDCARD_defconfig | 4
configs/P2041RDB_SPIFLASH_defconfig | 4
config
From: Hou Zhiqiang
P5040 integrated 3 PCIe controllers, which is compatible with
the PCI Express™ Base Specification, Revision 2.0, and this
patch is to add DT node for each PCIe controller.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
arch/powerpc/dts/p504
> -Original Message-
> From: Hou Zhiqiang
> Sent: Tuesday, August 20, 2019 3:05 PM
> To: u-boot@lists.denx.de; Prabhakar Kushwaha
> ; w...@denx.de; Shengzhou Liu
> ; Priyanka Jain ;
> s...@chromium.org; marek.vasut+rene...@gmail.com; s...@denx.de; Jagdish
> Gediya ; bmeng...@gmail.com; Yo
From: Hou Zhiqiang
Disable legacy PCIe driver and unused PCIe macros when DM_PCI enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
include/configs/T102xRDB.h | 54 +++---
1 file changed, 15 insertions(+), 39 deletions(-)
From: Hou Zhiqiang
Enable the DM PCIe driver in P4080DS defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/P4080DS_SDCARD_defconfig | 4
configs/P4080DS_SPIFLASH_defconfig | 4
configs/P4080DS_defconfig | 4
3 files ch
From: Hou Zhiqiang
Enable the DM PCIe driver in MPC8548CDS defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/MPC8548CDS_36BIT_defconfig | 4
configs/MPC8548CDS_defconfig| 4
configs/MPC8548CDS_legacy_defconfig | 4
3 fi
From: Hou Zhiqiang
Compile the legacy PCIe initialization reoutines only when
DM_PCI is not enabled.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
board/freescale/t104xrdb/pci.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/board/freescale/t104xrdb/p
From: Hou Zhiqiang
Enable the DM PCIe driver in T1042D4RDB defconfig.
Signed-off-by: Hou Zhiqiang
Reviewed-by: Bin Meng
---
V2:
- Rebased the patch.
configs/T1042D4RDB_NAND_defconfig | 4
configs/T1042D4RDB_SDCARD_defconfig | 4
configs/T1042D4RDB_SPIFLASH_defconfig | 4
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