On Mon, Jul 8, 2019 at 12:11 PM Anup Patel wrote:
>
> From: Bhargav Shah
>
> This patch enables SiFive SPI and MMC SPI drivers for the
> SiFive Unleashed board.
>
> Signed-off-by: Bhargav Shah
> Signed-off-by: Anup Patel
> ---
> board/sifive/fu540/Kconfig | 6 ++
> 1 file changed, 6 insert
On Mon, Jul 8, 2019 at 12:10 PM Anup Patel wrote:
>
> The mmc_spi command was added to manually setup MMC over SPI bus
> using command. This was required by the legacy non-DM MMC_SPI driver.
>
> With DM based MMC_SPI driver in-place, we can now use all general
> storge commands and mmc command for
> Subject: [PATCH 2/2] Add i.MX7D based Meerkat96 board support
>
> The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
> 96Boards community and complies with all Consumer Edition board
> specifications.
>
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fwww.
> no
Hello Simon,
gentle ping to my questions only ... hope I did not missed an
answer from you ...
Am 27.06.2019 um 06:12 schrieb Heiko Schocher:
Hello Simon,
Am 26.06.2019 um 17:07 schrieb Simon Glass:
Hi Heiko,
On Mon, 24 Jun 2019 at 00:16, Heiko Schocher wrote:
Hello Simon,
Am 22.06.2019
From: Bhargav Shah
This patch rewrites MMC SPI driver using U-Boot DM
framework and get it's working on SiFive Unleashed
board.
Signed-off-by: Bhargav Shah
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/mmc/Kconfig | 18 ++
drivers/mmc/mmc_spi.c
This patch removes SiFive SPI driver and MMC SPI drive from the TODO
list in SiFive FU540 README.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
doc/README.sifive-fu540 | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/doc/README.sifive-fu540 b/doc
The mmc_spi command was added to manually setup MMC over SPI bus
using command. This was required by the legacy non-DM MMC_SPI driver.
With DM based MMC_SPI driver in-place, we can now use all general
storge commands and mmc command for MMC over SPI bus hence we remove
the mmc_spi command all it's
From: Bhargav Shah
This patch enables SiFive SPI and MMC SPI drivers for the
SiFive Unleashed board.
Signed-off-by: Bhargav Shah
Signed-off-by: Anup Patel
---
board/sifive/fu540/Kconfig | 6 ++
1 file changed, 6 insertions(+)
diff --git a/board/sifive/fu540/Kconfig b/board/sifive/fu540/K
The MMC mode and width are fixed for MMC SPI host hence we skip
sd_select_mode_and_width() and mmc_select_mode_and_width() for
MMC SPI host.
Signed-off-by: Anup Patel
Reviewed-by: Bin Meng
Tested-by: Bin Meng
---
drivers/mmc/mmc.c | 14 ++
1 file changed, 14 insertions(+)
diff --g
From: Bhargav Shah
This patch adds SiFive SPI driver. The driver is 100% DM driver
and it determines input clock using clk framework.
The SiFive SPI block is found on SiFive FU540 SOC and is used to
access flash and MMC devices on SiFive Unleashed board.
This driver implementation is inspired f
This patchset adds:
1. SiFive SPI driver
2. New MMC SPI driver based on DM_MMC and DM_SPI
3. Enables SiFive SPI driver and MMC SPI driver for SiFive Unleashed board
With this patch series, we can now load files from SD card on SiFive
Unleashed board. Many thanks to Bhargav for porting SiFive SPI d
> -Original Message-
> From: Lukasz Majewski
> Sent: 2019年6月21日 19:33
> To: Chuanhua Han
> Cc: Prabhakar Kushwaha ;
> u-boot@lists.denx.de
> Subject: [EXT] Re: [PATCH v4] rtc: Add DM support to ds3231
>
> On Fri, 21 Jun 2019 16:21:53 +0800
> Chuanhua Han wrote:
>
> > Add an implement
The previous pcf2127 RTC chip could not read and set the correct time.
When reading the data of internal registers, the read address was the
value of register plus 1. This is because this chip requires the host
to send a stop signal after setting the register address and before
reading the register
Add cfg file for i.MX8MN DDR4
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/imximage-8mn-ddr4.cfg | 17 +
1 file changed, 17 insertions(+)
create mode 100644 arch/arm/mach-imx/imx8m/imximage-8mn-ddr4.cfg
diff --git a/arch/arm/mach-imx/imx8m/imximage-8mn-ddr4.cfg
b/arch/a
i.MX8MN follow same logic as i.MX8MM, so use spl_board_boot_device
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index a6d7b69ad8..b55c8d9cb1 100644
--- a/arch/arm/mach-imx
Support pinctrl/clk/sdhc, include ddr4 timing data.
Log:
U-Boot SPL 2019.07-rc4-00310-geff364e1d0 (Jul 02 2019 - 09:47:06 +0800)
DDRINFO: start DRAM init
DDRINFO:ddrphy calibration done
DDRINFO: ddrmix config done
Normal Boot
Trying to boot from BOOTROM
image offset 0x8000, pagesize 0x200, ivt off
Pass spl_image and bootdev to board_return_bootrom.
i.MX8MN needs the args to let ROM to load images
Cc: Simon Glass
Cc: Philipp Tomsich
Cc: Kever Yang
Signed-off-by: Peng Fan
---
arch/arm/mach-rockchip/rk3288-board-tpl.c | 5 -
arch/arm/mach-rockchip/rk3368-board-tpl.c | 5 -
arch/ar
No ROM INFO structure on iMX8MN, use new ROM API to get boot device
from ROM.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 48 +++
1 file changed, 48 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
i
Add i.MX8MN kconfig entry
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index f520075875..b0932f1647 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm
Add i.MX8MM clk driver support.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/clock_imx8mm.c | 203 +
drivers/clk/imx/Makefile | 1 +
drivers/clk/imx/clk-imx8mm.c | 106 +
3 files changed, 211 insertions(+), 99 delet
Support i.MX8MN in imx8m pinctrl driver
Signed-off-by: Peng Fan
---
drivers/pinctrl/nxp/pinctrl-imx8m.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/pinctrl/nxp/pinctrl-imx8m.c
b/drivers/pinctrl/nxp/pinctrl-imx8m.c
index 8bb03b7a62..b3844314b3 100644
--- a/drivers/pinctrl/nxp/pin
i.MX8MN has its own get_boot_device, so restrict with i.MX8MQ and
i.MX8MM.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/cpu.c b/arch/arm/mach-imx/cpu.c
index 9c699e8f50..7f2dc3f09d 100644
--- a/arch/arm/
i.MX8MN does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/iomux-v3.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
b/arch/arm/include/asm/mach-imx/iomux-v3.h
index 720e8f7043..3d5586
Add dtsi for i.MX8MN
Signed-off-by: Peng Fan
---
arch/arm/dts/imx8mn-pinfunc.h| 646
arch/arm/dts/imx8mn.dtsi | 712 +++
include/dt-bindings/clock/imx8mn-clock.h | 215 ++
3 files changed, 1573 insertion
probe clk device before relocation to get cpu clk.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 21 +
1 file changed, 21 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5115471eff..8d40ca0229 100644
--- a/arch/arm
From: Jacky Bai
On, i.MX8MQ, the PLL config must be done when ddrmix
isolation is released. So move the dram pll init after
iso config done. For other i.MX8M SOC, either init pll
before or after isolation is ok.
Signed-off-by: Jacky Bai
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/ddr_in
i.MX8MN support loading images with rom api, so we implement
reuse board_return_to_bootrom to let ROM loading images.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/sys_proto.h | 33
arch/arm/mach-imx/Kconfig | 4 +
arch/arm/mach-imx/Makefile|
Reuse i.MX8MM clk driver for i.MX8MN.
Signed-off-by: Peng Fan
---
drivers/clk/imx/Kconfig | 7 +++
drivers/clk/imx/Makefile | 2 +-
drivers/clk/imx/clk-imx8mm.c | 15 +++
3 files changed, 23 insertions(+), 1 deletion(-)
diff --git a/drivers/clk/imx/Kconfig b/drivers/c
i.MX8MQ and i.MX8MM has totally different pll design, so
rename clock to clock_imx8mq.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Makefile| 3 ++-
arch/arm/mach-imx/imx8m/{clock.c => clock_imx8mq.c} | 0
2 files changed, 2 insertions(+), 1 deletion(-)
rename arch/ar
To i.MX8MM SCTR clock is disabled by ROM, so before timer init
need to enable it.
To i.MX8MQ, it does not hurt the clock is enabled again.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/
i.MX7 and i.MX8M use mxc uart driver, so let's make the SoC could
use MXC_UART kconfig.
Signed-off-by: Peng Fan
---
drivers/serial/Kconfig | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/serial/Kconfig b/drivers/serial/Kconfig
index 8a447fd6e3..e5657979ff 100644
--- a
Add pin header for i.MX8MN
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx8mn_pins.h | 763 ++
1 file changed, 763 insertions(+)
create mode 100644 arch/arm/include/asm/arch-imx8m/imx8mn_pins.h
diff --git a/arch/arm/include/asm/arch-imx8m/imx8mn_pins.h
some boards use ddr4, not lpddr4, so we need to check ddr4 firmware.
Signed-off-by: Peng Fan
---
tools/imx8m_image.sh | 10 ++
1 file changed, 10 insertions(+)
diff --git a/tools/imx8m_image.sh b/tools/imx8m_image.sh
index 08a6a48180..603ba6e8f4 100755
--- a/tools/imx8m_image.sh
+++ b/t
From: Bai Ping
Update the ddrc Qos setting for B1 to align with B0's setting.
Correct the initial clock for dram_pll. This setting will be
overwrite before ddr phy training. Although there is no impact
on the dram init, we still need to correct it to eliminate
confusion.
Signed-off-by: Bai Ping
The IVT offset is changed on i.MX8MN. Use ROM_VERSION to pass the
v1 or v2 to mkimage.
v1 is for iMX8MQ and iMX8MM
v2 is for iMX8M Nano (iMX8MN)
Signed-off-by: Peng Fan
---
include/imximage.h | 1 +
tools/imx8mimage.c | 24 ++--
2 files changed, 23 insertions(+), 2 deletions
Add Kconfig entry for i.MX8MM
Signed-off-by: Peng Fan
---
drivers/clk/imx/Kconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/drivers/clk/imx/Kconfig b/drivers/clk/imx/Kconfig
index a6fb58d6cf..07ecad0a72 100644
--- a/drivers/clk/imx/Kconfig
+++ b/drivers/clk/imx/Kconfig
@@ -4,3 +
Add a dummy cpu type and support get_cpu_rev for i.MX8MN
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 1 +
arch/arm/include/asm/mach-imx/sys_proto.h | 1 +
arch/arm/mach-imx/cpu.c | 2 ++
arch/arm/mach-imx/imx8m/soc.c | 4 +++-
4 files cha
From: Ye Li
Since the parameter of dram_pll_init is changed, update to use new.
Also remove non-existed header file.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/ddr4_init.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/drivers/ddr/imx/imx8m/d
Add pin header file for i.MX8MM
To IMX8MM_PAD_NAND_WE_B_USDHC3_CLK, IOMUX_CONFIG_SION needs to be
selected.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx8mm_pins.h | 691 ++
1 file changed, 691 insertions(+)
create mode 100644 arch/arm/include/asm/arch
Add i.MX8MM cpu type and related helper functions
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx/cpu.h | 6 ++
arch/arm/include/asm/mach-imx/sys_proto.h | 8
arch/arm/mach-imx/cpu.c | 12
3 files changed, 26 insertions(+)
diff --git
Introduce clk implementation for i.MX8MM, including pll configuration,
ccm configuration. Export get_root_clk for CLK UCLASS driver usage.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h| 3 +
arch/arm/include/asm/arch-imx8m/clock_imx8mm.h | 387 ++
arch
set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 5bbc3
Set the BYPASS ID SWAP bit (GPR10 bit 1) in order for GPU not to
generated AXI bus errors with TZC380 enabled.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc
i.MX8MN has similar architecture with i.MX8MM, so it could reuse
the clock code of i.MX8MM, but i.MX8MN has different CCM root
configurations, so need a separate root entry. And i.MX8MN
support 600MHZ pll settings for NoC, so add an entry.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-im
There are several variants based on i.MX8MM, add the support in
get_cpu_rev
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 57 +++
1 file changed, 47 insertions(+), 10 deletions(-)
diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-im
i.MX8MM has similar architecture with i.MX8MQ, but it has totally
different PLL design and some register layout change.
Note: Some registers in this file are not updated because not used now.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/imx-regs.h | 75 +++
Add IMX8MQ kconfig entry, preparing support IMX8MM
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 317dee9bc1..9c487870a6 100644
--- a/arch
From: Jacky Bai
Refine the ddr init driver to make it more reusable for different
DDR type(LPDDR4, DDR4 & DDR3L). So we can reduce some redundant
code.
Signed-off-by: Jacky Bai
Reviewed-by: Ye Li
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/Kconfig| 6 ++
drivers/ddr/imx/imx8m
From: Ye Li
Set trustzone region 0 to allow both non-secure and secure access
when trust zone is enabled. We found USB controller fails to access
DDR if the default region 0 is secure access only.
Signed-off-by: Ye Li
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/soc.c | 6 ++
1 fil
There is no HDMI on i.MX8MM, so we need to remove HDMI entry, then
we could not reuse imximage.cfg, so create a new one.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/imximage-8mm-lpddr4.cfg | 16
1 file changed, 16 insertions(+)
create mode 100644 arch/arm/mach-imx/imx8m
i.MX8MM does not have LVTTL, it has a PE property
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/iomux-v3.h | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/include/asm/mach-imx/iomux-v3.h
b/arch/arm/include/asm/mach-imx/iomux-v3.h
index b899a4ff6f..720e8f7043 100644
Align spl bin image size to 4 byte aligned, because we need
to pad ddr firmware in the end of spl bin. However when enable
SPL OF, the spl dtb will be padded to u-boot-nodtb.bin, then
u-boot-spl.bin size might not be 4 bytes aligned.
ddr_load_train_firmware in drivers/ddr/imx/imx8m/helper.c use 4
i.MX8MQ and i.MX8MM use different analog pll design, but they
share same ccm design.
Add clock_imx8mq.h for i.MX8MQ
keep common part in clock.h
Signed-off-by: Peng Fan
---
arch/arm/include/asm/arch-imx8m/clock.h| 491 +++--
arch/arm/include/asm/arch-imx8m/clock_imx8mq
When running with OPTEE, the MMU table in u-boot does not remove the OPTEE
memory from its settings. So ARM speculative prefetch in u-boot may access
that OPTEE memory. Due to trust zone is enabled by OPTEE and that memory
is set to secure access, then the speculative prefetch will fail and cause
v
Add i.MX8MM clock binding header for i.MX8MM
Signed-off-by: Peng Fan
---
include/dt-bindings/clock/imx8mm-clock.h | 244 +++
1 file changed, 244 insertions(+)
create mode 100644 include/dt-bindings/clock/imx8mm-clock.h
diff --git a/include/dt-bindings/clock/imx8mm-c
With SPL_OF_SPERATE, the device tree will be padded to
end of the u-boot-spl-nodtb.bin, however we also put
the ddr firmware file to this location, so need to adapt
the code with SPL OF and align to 16bytes to ease copy firmware.
Signed-off-by: Peng Fan
---
drivers/ddr/imx/imx8m/helper.c | 12 ++
Add IMX8MM kconfig entry
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/imx8m/Kconfig | 4
1 file changed, 4 insertions(+)
diff --git a/arch/arm/mach-imx/imx8m/Kconfig b/arch/arm/mach-imx/imx8m/Kconfig
index 9c487870a6..35c978e863 100644
--- a/arch/arm/mach-imx/imx8m/Kconfig
+++ b/arch/arm/
Differnet board has different controller used, it is
hard to use one layout for them all.
Signed-off-by: Peng Fan
---
arch/arm/mach-imx/spl.c | 8
1 file changed, 8 insertions(+)
diff --git a/arch/arm/mach-imx/spl.c b/arch/arm/mach-imx/spl.c
index 9f1e0f6a72..a6d7b69ad8 100644
--- a/ar
fdtdec_get_addr_size could not parse addr/size correctly is
using address-cells 2 and size-cells 2 on an ARM32 SoC.
So switch to use devfdt_get_addr_size_index.
Signed-off-by: Peng Fan
---
drivers/pinctrl/nxp/pinctrl-imx.c | 4 +---
1 file changed, 1 insertion(+), 3 deletions(-)
diff --git a/dr
Add missed break for HDMI entry.
And moving FIT parsing earlier, because it does not have parameter,
it will not runs into CFG_REG_SIZE.
Signed-off-by: Peng Fan
---
tools/imx8mimage.c | 7 +--
1 file changed, 5 insertions(+), 2 deletions(-)
diff --git a/tools/imx8mimage.c b/tools/imx8mimage
When the device not binded with a node, we need ignore
the parents and rate settings.
Cc: Simon Glass
Cc: Jagan Teki
Cc: Philipp Tomsich
Cc: Neil Armstrong
Cc: Andreas Dannenberg
Signed-off-by: Peng Fan
---
drivers/clk/clk-uclass.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/driv
Some archs defined PAGE_SIZE, such as ARMv8, to avoid build warning,
guard PAGE_SIZE.
Cc: Joe Hershberger
Cc: Bin Meng
Signed-off-by: Peng Fan
---
include/linux/compat.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/linux/compat.h b/include/linux/compat.h
index d0f51baab4..c1f8
When CONFIG_CLK enabled, use CLK UCLASS for clk related settings.
Signed-off-by: Peng Fan
---
arch/arm/include/asm/mach-imx/mxc_i2c.h | 6 ++
drivers/i2c/mxc_i2c.c | 17 +
2 files changed, 23 insertions(+)
diff --git a/arch/arm/include/asm/mach-imx/mxc_i2c
This patchset is to support i.MX8MM/8MN with some update
in ddr settings and ddr driver update.
V2:
Fix build break, add Cc for some patches, and drop CCF select in i.MX8MM
Fix script to remove srctree in tools/imx8m_image.sh
Fix License
Rebased
V1:
The initial patchset to support i.MX8MM is
http
> Subject: Re: [U-Boot] [PATCH 00/52] Support i.MX8MM/N
>
> Hi Peng,
>
> > From: Peng Fan
> >
> > This patchset is to support i.MX8MM/8MN with some update in ddr
> > settings and ddr driver update.
> >
> > The initial patchset to support i.MX8MM is
> > https://patchwork.ozlabs.org/cover/1093140/
Hi Mark:
Mark Kettenis 于2019年7月4日周四 下午3:16写道：
> > From: Andy Yan
> > Date: Thu, 4 Jul 2019 14:52:47 +0800
> >
> > RK3399 use sdhci for eMMC and DW MMC for SD Card, and
> > spl will only try to boot from SDMMC if we don't specify
> > other boot device for spl-boot-order. So add sdhci and sdmmc
On Thu, May 16, 2019 at 05:19:13PM +0800, Weijie Gao wrote:
> The initr_watchdog is currently placed before initr_serial. The
> initr_watchdog calls printf and printf finally calls ops->putc of a serial
> driver.
>
> However, gd->cur_serial_dev points to a udevice allocated in board_f. The
> gd->
On Thu, May 16, 2019 at 05:19:50PM +0800, Weijie Gao wrote:
> The watchdog of mediatek chips is enabled by bootrom before u-boot is
> running. Previously we choose to enable the wdt driver only to disable the
> watchdog hardware.
>
> Now wdt service is enabled by default. The function arch_misc_i
On Sun, Jul 07, 2019 at 03:58:19PM +0200, Anatolij Gustschin wrote:
> Hi Tom,
>
> please pull pwm backlight fix for v2019.07.
>
> Travis CI: https://travis-ci.org/vdsao/u-boot-video/builds/555133134
>
> Thanks,
> Anatolij
>
> The following changes since commit 1f83431f0053f6fb20c511c391ffc6874
On Sun, Jul 07, 2019 at 07:17:42AM -0600, Simon Glass wrote:
> Hi Tom,
>
> Sorry if this is too late, but I still have this patch pending.
>
>
> The following changes since commit 1f83431f0053f6fb20c511c391ffc687433848cf:
>
> board: amlogic: add mailing-list to MAINTAINERS (2019-07-04 11:36:
On Sat, Jul 06, 2019 at 08:27:30PM +0200, Marek Vasut wrote:
> The following changes since commit 1f83431f0053f6fb20c511c391ffc687433848cf:
>
> board: amlogic: add mailing-list to MAINTAINERS (2019-07-04 11:36:52
> -0400)
>
> are available in the Git repository at:
>
> git://git.denx.de/u-b
On Sat, Jul 06, 2019 at 11:59:20PM +0800, Kever Yang wrote:
> Hi Tom,
>
> Please pull the update:
> - fix rockchip ATF generator script for 'loadables' property
>
> Travis:
> https://travis-ci.org/keveryang/u-boot/builds/554575031
>
> Thanks,
> - Kever
>
> The following changes since commit ca
Hi Christoph:
On 2019/7/7 上午1:32, Christoph Müllner wrote:
On 7/6/19 5:02 PM, Kever Yang wrote:
Hi Mark,
On 07/05/2019 08:03 PM, Mark Kettenis wrote:
From: Kever Yang
Date: Fri, 5 Jul 2019 19:38:42 +0800
Hi Christoph,
On 07/05/2019 05:15 PM, Christoph Müllner wrote:
On 04.07.19 11:44, An
any new opinions about last version? can it be merged to next u-boot version?
regards Frank
> Gesendet: Samstag, 29. Juni 2019 um 11:36 Uhr
> Von: "Frank Wunderlich"
> An: "Simon Goldschmidt" ,
> u-boot@lists.denx.de
> Cc: "Frank Wunderlich"
> Betreff: [PATCH v7 0/2] add command env erase
>
>
Le 05/07/2019 à 17:20, Patrick Delaunay a écrit :
Deactivate WATCHDOG by default in u-boot to avoid issue to boot kernel
and rootfs without the needed daemon to reload it.
Signed-off-by: Patrick Delaunay
---
Changes in v2: None
configs/stm32mp15_basic_defconfig | 2 --
configs/stm32mp15
Le 05/07/2019 à 17:20, Patrick Delaunay a écrit :
For boot from flash, check presence of default environment to force
save env.
Signed-off-by: Patrick Delaunay
---
Changes in v2: None
include/configs/stm32mp1.h | 4
1 file changed, 4 insertions(+)
diff --git a/include/configs/stm32mp
Hi Patrick,
Le 05/07/2019 à 17:20, Patrick Delaunay a écrit :
Synchronize device tree with v5.2-rc4 label and
update the associated u-boot dtsi.
Signed-off-by: Patrick Delaunay
---
Changes in v2:
- missing alignment on ethernet@5800a000
- set ethernet0 phy-mode to "rgmii-id" for dk1
(neede
Jagan Teki writes:
> This is the v2 set for supporting LPDDR4 with associated features
Sorry for a late follow-up, but I've just tested this series (applied to
today's master branch) on Khadas Edge.
With these patches, a device tree copied from Linux -next, and a defconfig
essentially the same
Hello Sam,
On Sat, Jul 06, 2019 at 01:06:27PM +0300, Sam Protsenko wrote:
> On Fri, Jul 5, 2019 at 9:52 PM Eugeniu Rosca wrote:
[..]
> > FWIW this patch doesn't apply to u-boot/master due to the above line.
[..]
> this patch will be
> applied on top of [1], and I guess it's specified in PATCH #0.
> -Original Message-
> From: Simon Glass
> Sent: 2019年7月7日 1:17
> To: Chuanhua Han
> Cc: Lukasz Majewski ; h...@denx.de; Biwen Li
> ; u-boot@lists.denx.de
> Subject: Re: [EXT] Re: [PATCH 1/2] dm: i2c: Add a flag that need generate stop
> bit
>
> Caution: EXT Email
>
> Hi Chuanhua,
>
Hi Tom,
please pull pwm backlight fix for v2019.07.
Travis CI: https://travis-ci.org/vdsao/u-boot-video/builds/555133134
Thanks,
Anatolij
The following changes since commit 1f83431f0053f6fb20c511c391ffc687433848cf:
board: amlogic: add mailing-list to MAINTAINERS (2019-07-04 11:36:52 -0400)
On Tue, 02 Jul 2019 22:08:33 +0200
marvi...@posteo.de marvi...@posteo.de wrote:
...
> drivers/video/pwm_backlight.c | 3 +++
> 1 file changed, 3 insertions(+)
Applied to u-boot-video/master, thanks!
--
Anatolij
___
U-Boot mailing list
U-Boot@lists.denx
Document the BCB concept and U-Boot command, touching below aspects:
- give an overview of BCB w/o duplicating public documentation
- describe the main BCB use-cases which concern U-Boot
- reflect current support status in U-Boot
- mention any relevant U-Boot build-time tunables
- precisely ex
Rename:
- doc/{README.avb2 => android/avb2.txt}
- doc/{README.android-fastboot => android/fastboot.txt}
- doc/{README.android-fastboot-protocol => android/fastboot-protocol.txt}
The new directory structure has been reviewed by Simon [0].
Thanks to Sam [1], update a number of stale references i
The first patch does the necessary fixing and polishing of
include/android_bootloader_message.h and is a hard prerequisite
for this series.
The second patch performs the implementation of the 'bcb' command.
The third patch relocates the Android README to doc/android.
The fourth patch describes the
Perform the following updates:
- Relocate the commit id from the file to the description of U-Boot
commit. The AOSP commit is c784ce50e8c10eaf70e1f97e24e8324aef45faf5.
This is done to avoid stale references in the file itself. The
reasoning is in https://patchwork.ozlabs.org/patch/1098056
'Bootloader Control Block' (BCB) is a well established term/acronym in
the Android namespace which refers to a location in a dedicated raw
(i.e. FS-unaware) flash (e.g. eMMC) partition, usually called "misc",
which is used as media for exchanging messages between Android userspace
(particularly rec
Hi Tom,
Sorry if this is too late, but I still have this patch pending.
The following changes since commit 1f83431f0053f6fb20c511c391ffc687433848cf:
board: amlogic: add mailing-list to MAINTAINERS (2019-07-04 11:36:52 -0400)
are available in the Git repository at:
git://git.denx.de/u-boot
The Meerkat96 board, based on the NXP i.MX7D SoC, is a member of
96Boards community and complies with all Consumer Edition board
specifications.
https://www.novtech.com/products/meerkat96.html
https://www.96boards.org/product/imx7-96/
The initial supported/tested devices include:
- Debug serial
It imports device tree source of meerkat96 board from Linux Kernel.
Signed-off-by: Shawn Guo
---
arch/arm/dts/Makefile| 1 +
arch/arm/dts/imx7d-meerkat96.dts | 375 +++
2 files changed, 376 insertions(+)
create mode 100644 arch/arm/dts/imx7d-meerkat96.d
On Fri, Jul 5, 2019 at 10:03 AM Kunihiko Hayashi
wrote:
>
> Add SPI controller driver implemented in Socionext UniPhier SoCs.
> This controller has the SPI master mode only.
>
> Signed-off-by: Kunihiko Hayashi
> ---
Applied to u-boot-uniphier.
Thanks.
--
Best Regards
Masahiro Yamada
_
Hi Simon,
On 06.07.19 19:16, Simon Glass wrote:
On Thu, 27 Jun 2019 at 23:23, Suniel Mahesh wrote:
Hi Patrick,
thanks for the pointer and I understood your point.
CONFIG_SYS_MALLOC_LEN is defined as SZ_32M which should be enough i guess ?
still trying to figure out what is causing that err
Agreed with frank. My patches for watchdog DM conversion depends on this change
set.
tested on AM335x based Beaglebone Black
Tested-by: Suniel Mahesh
Regards
--
Suniel Mahesh
Embedded Linux, Kernel & U-Boot engineer
https://github.com/sunielmahesh
www.tuxtrons.com
https://github.com/techveda
Tested-by: Frank Wunderlich
___
U-Boot mailing list
U-Boot@lists.denx.de
https://lists.denx.de/listinfo/u-boot
94 matches
Mail list logo
