Hi Jagan,
On 06.08.2018 16:33, Stefan Roese wrote:
This patch adds support for 2 new XMC (Wuhan Xinxin Semiconductor
Manufacturing Corp) SPI NOR chips.
This support can be enabled by selecting the SPI_FLASH_XMC Kconfig
option.
Signed-off-by: Stefan Roese
Cc: Jagan Teki
---
drivers/mtd/spi/
On Thu, Oct 4, 2018 at 11:17 AM Marek Vasut wrote:
>
> On 10/03/2018 10:21 PM, Chris Packham wrote:
> > Workaround makes FS as default mode on all affected socs.
> >
> > Add support to check erratum-A005275 validity for an soc. This info is
> > required to determine whether a given soc is affected
Hi Jagan,
On 28.09.2018 18:34, Jagan Teki wrote:
On Thu, Aug 16, 2018 at 2:19 PM Stefan Roese wrote:
This patch adds the SPI driver for the MediaTek MT7688 SoC (and
derivates). Its been tested on the LinkIt Smart 7688 and the Gardena
Smart Gateway with and SPI NOR on CS0 and on the Gardena Sm
On 3.10.2018 21:41, Marek Vasut wrote:
> On 10/03/2018 03:39 PM, Michal Simek wrote:
>> Hi Marek,
>
> Hi,
>
> [...]
>
>>> diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
>>> index e594beaeaa..619b39a537 100644
>>> --- a/common/spl/spl_ram.c
>>> +++ b/common/spl/spl_ram.c
>>> @@ -63,8 +6
On Wed, Oct 03, 2018 at 09:41:25PM +0200, Philipp Tomsich wrote:
>
>
> > On 03.10.2018, at 21:36, Ezequiel Garcia wrote:
> >
> > On Wed, 2018-10-03 at 21:34 +0200, Philipp Tomsich wrote:
> >>> On 02.10.2018, at 16:01, Manivannan Sadhasivam
> >>> wrote:
> >>>
> >>> Hi Simon,
> >>>
> >>> On T
Dear Simon Shields,
On 12/09/18 17:28, Simon Shields wrote:
> Hi,
>
> This patch series adds support for using U-Boot's SPL as the second
> stage bootloader ("BL2") on Exynos4412 SoCs.
>
> - Patch #1 adds support for the EMMC/SD OM pin configuration, which is used
> by the boards I tested on.
Gentle ping..
Thanks,
Peng
> -Original Message-
> From: Peng Fan
> Sent: 2018年9月26日 21:52
> To: sba...@denx.de; ag...@denx.de
> Cc: u-boot@lists.denx.de; Peng Fan
> Subject: [PATCH V5 00/32] i.MX: Add i.MX8QXP support
>
> This patchset is to upstream i.MX8QXP and mek board support, with
Copying UTWG
Sent from my iPhone
> On Oct 1, 2018, at 12:49 AM, Alexander Graf wrote:
>
>
>
>> On 01.10.18 09:35, AKASHI Takahiro wrote:
>> UEFI SCT doesn't run on the latest u-boot (or Alex's efi-next).
>> Among other issues, there are two problems around language handling:
>> 1. SCT looks
On 10/03/2018 10:21 PM, Chris Packham wrote:
> Workaround makes FS as default mode on all affected socs.
>
> Add support to check erratum-A005275 validity for an soc. This info is
> required to determine whether a given soc is affected by this erratum.
> Add quirk for this erratum "has_fsl_erratum
If DEBUG is defined we may be calling EFI_CALL already during the
initialization of the EFI subsystem. We must make sure efi_save_gd() has
already been called at that moment.
Anyway it is better to have this call in one location instead of three.
This fixes an illegal memory access occurring sinc
If DEBUG is defined we may be calling EFI_CALL already during the
initialization of the EFI subsystem. We must make sure efi_save_gd() has
already been called at that moment.
Anyway it is better to have this call in one location instead of three.
This fixes an illegal memory access occurring sinc
On 09/23/2018 02:36 PM, Alexander Graf wrote:
>> Currently we assign a lot of protocols to loaded images though
>> these protocols are not related to them. Instead they should be
>> installed on a separate handle. Via the device path it is the
>> parent to the devices like the network adapter.
>>
>
Workaround makes FS as default mode on all affected socs.
Add support to check erratum-A005275 validity for an soc. This info is
required to determine whether a given soc is affected by this erratum.
Add quirk for this erratum "has_fsl_erratum_a005275" . This quirk is used
to enable workaround for
On 10/03/2018 03:39 PM, Michal Simek wrote:
> Hi Marek,
Hi,
[...]
>> diff --git a/common/spl/spl_ram.c b/common/spl/spl_ram.c
>> index e594beaeaa..619b39a537 100644
>> --- a/common/spl/spl_ram.c
>> +++ b/common/spl/spl_ram.c
>> @@ -63,8 +63,9 @@ static int spl_ram_load_image(struct spl_image_inf
> On 03.10.2018, at 21:36, Ezequiel Garcia wrote:
>
> On Wed, 2018-10-03 at 21:34 +0200, Philipp Tomsich wrote:
>>> On 02.10.2018, at 16:01, Manivannan Sadhasivam
>>> wrote:
>>>
>>> Hi Simon,
>>>
>>> On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
On 27 September 2018 at 1
On Wed, 2018-10-03 at 21:34 +0200, Philipp Tomsich wrote:
> > On 02.10.2018, at 16:01, Manivannan Sadhasivam
> > wrote:
> >
> > Hi Simon,
> >
> > On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
> > > On 27 September 2018 at 12:02, Manivannan Sadhasivam
> > > wrote:
> > > > Rock960
> From: Randy Li
>
> Those pins would be used by many boards.
>
> Commit grabbed from Linux:
>
> commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
> Author: Randy Li
> Date: Thu Jun 21 21:32:10 2018 +0800
>
> arm64: dts: rockchip: add some common pin-settings to rk3399
>
> Those pins
> Add board support for Rock960 CE board from Vamrs. This board utilizes
> common Rock960 family support.
>
> Following peripherals are tested and known to work:
> * USB 2.0
> * MMC
>
> This commit also adds DDR configuration for LPDDR3-2GiB-1600MHz which
> is being used on the board.
>
> Signed
> Add board support for Ficus EE board from Vamrs. This board utilizes
> common Rock960 family support.
>
> Following peripherals are tested and known to work:
> * Gigabit Ethernet
> * USB 2.0
> * MMC
>
> Signed-off-by: Ezequiel Garcia
> [Reworked based on common Rock960 family support]
> Signed
> On 02.10.2018, at 16:01, Manivannan Sadhasivam
> wrote:
>
> Hi Simon,
>
> On Tue, Oct 02, 2018 at 04:21:38AM -0700, Simon Glass wrote:
>> On 27 September 2018 at 12:02, Manivannan Sadhasivam
>> wrote:
>>> Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
>>> It consist
> u-boot.itb depends on u-boot-nodtb.bin, which in turn depends on u-boot.
> u-boot.its from Rockchip make_fit_atf.py (used by {evb,firefly}-rk3399)
> wants to read u-boot but is lacking this dependency, so that u-boot.itb
> cannot be built in one go. Detect its use and add the missing dependency.
> make_fit_atf.py uses physical address of first segment as the
> entry point to bl31. It is incorrect and causes following abort
> when bl31_entry() is called:
>
> U-Boot SPL board initTrying to boot from MMC1
> "Synchronous Abort" handler, esr 0x0200
> elr: lr : ff8c
> Make script python3 compatible. No functional changes intended.
>
> Signed-off-by: Mian Yousaf Kaukab
> ---
> arch/arm/mach-rockchip/make_fit_atf.py | 89
> +-
> 1 file changed, 45 insertions(+), 44 deletions(-)
>
Reviewed-by: Philipp Tomsich
___
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
wrote:
>
> Add board support for Rock960 CE board from Vamrs. This board utilizes
> common Rock960 family support.
>
> Following peripherals are tested and known to work:
> * USB 2.0
> * MMC
>
> This commit also adds DDR configuration for LPDDR
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
wrote:
>
> From: Randy Li
>
> Those pins would be used by many boards.
>
> Commit grabbed from Linux:
>
> commit b41023282d07b61a53e2c9b9508912b1e7ce7b4f
> Author: Randy Li
> Date: Thu Jun 21 21:32:10 2018 +0800
>
> arm64: dts: rockchip
On Thu, Sep 27, 2018 at 8:03 PM Manivannan Sadhasivam
wrote:
>
> Rock960 is a family of boards based on Rockchip RK3399 SoC from Vamrs.
> It consists of Rock960 (Consumer Edition) and Ficus (Enterprise Edition)
> 96Boards.
>
> Below are some of the key differences between both Rock960 and Ficus
>
Philipp,
Can we get get a decision on this one, it fixes issues for me on
Rockchips devices. While I'm sure a rewrite in C to reduce
dependenciees is an option, this fix doesn't add any extra
dependencies and I think is still a candidate for 2018.11
Peter
On Fri, Jun 8, 2018 at 11:34 AM Mian Yous
> On 23.08.2018, at 05:01, Kever Yang wrote:
>
> Patch fix warning:
> /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
> arch/arm/dts/rk3399-firefly.dtb > u-boot.its
> ./tools/mkimage -f u-boot.its -E u-boot.itb >/dev/null && cat
> /dev/null
> u-boot.itb.tmp: War
Sure. This one fell through the cracks. No idea why I didn’t see it.
> On 03.10.2018, at 20:55, Peter Robinson wrote:
>
> Philipp,
>
> Can we get this one applied to Rockchips too please?
>
> Peter
>
> On Thu, Aug 23, 2018 at 4:01 AM Kever Yang wrote:
>>
>> Patch fix warning:
>> /builddir/B
Philipp,
Can we get this one applied to Rockchips too please?
Peter
On Thu, Aug 23, 2018 at 4:01 AM Kever Yang wrote:
>
> Patch fix warning:
> /builddir/BUILD/u-boot-2018.05-rc2/"arch/arm/mach-rockchip/make_fit_atf.py" \
> arch/arm/dts/rk3399-firefly.dtb > u-boot.its
> ./tools/mkimage -f u-b
The first parameter of efi_allocate_pool is a memory type. It cannot be
EFI_ALLOCATE_ANY_PAGES. Use EFI_BOOT_SERVICES_DATA instead.
Signed-off-by: Heinrich Schuchardt
---
lib/efi_loader/efi_boottime.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/lib/efi_loader/efi_bo
Hi Bin,
On Wed, 2018-09-26 at 06:55 -0700, Bin Meng wrote:
> This series adds QEMU RISC-V 'virt' board target support, with the
> hope of helping people easily test U-Boot on RISC-V.
>
> Some existing RISC-V codes have been changed to make it easily to
> support new targets. Some spotted coding s
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> From: Pankit Garg
>
> Adds SMC calls for getting DDR size and bank info for TFABOOT.
This patch should be put before enabling TFA boot flow.
I am going to stop here. Please fix and reorganize your patch set. Make
sure U-Boot still works after every
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.
>
> ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
> SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803
> SYS_FSL_ERRATUM_A009942, SYS_FS
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Defines BOOTCOMMAND for TFABOOT configuration for
> supported boot sources.
Please keep the commit message format consistent, to wrap back at or
near 70th characters through the entire patch set.
>
> Signed-off-by: Pankit Garg
> Signed-off-by: Raje
First, remove the period in subject.
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> From: Pankit Garg
>
> Adds bootcmd identificaton on basis on boot source, valid
> in TFABOOT configuration.
>
> Signed-off-by: Rajesh Bhagat
> Signed-off-by: Pankit Garg
> ---
> arch/arm/cpu/armv8/fsl-layersc
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR made common
> to support all boot sources.
>
The subject implies you change something to make the macros common, but
actually you only add common macros for TFABOOT.
York
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Adds TFABOOT support and allows to pick QE firmware
> on basis of boot source.
>
> Signed-off-by: Pankit Garg
> Signed-off-by: Rajesh Bhagat
> ---
> drivers/qe/qe.c | 81 +
> 1 file changed, 81 insert
On 10/03/2018 04:39 AM, Rajesh Bhagat wrote:
> Adds TFABOOT support and allows to pick FMAN firmware
> on basis of boot source.
>
> Signed-off-by: Pankit Garg
> Signed-off-by: Rajesh Bhagat
> ---
> drivers/net/fm/fm.c | 104
> 1 file changed, 104 ins
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> Defines environment address for QSPI boot
>
> Signed-off-by: Rajesh Bhagat
> ---
> board/freescale/ls1043aqds/ls1043aqds.c | 10 ++
> 1 file changed, 10 insertions(+)
>
> diff --git a/board/freescale/ls1043aqds/ls1043aqds.c
> b/board/frees
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> This defconfig is for TFABOOT, to be loaded by trusted firmware.
>
> Signed-off-by: Pankit Garg
> Signed-off-by: Rajesh Bhagat
> ---
> board/freescale/ls1043ardb/ddr.c| 6 ++-
> board/freescale/ls1043ardb/ls1043ardb.c | 12 ++
> config
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE and CONFIG_ENV_SECT_SIZE made common
> to support all boot sources.
It is not clear how you made these macros common in your change below.
>
> Signed-off-by: Pankit Garg
> Signed-off-by: Rajesh Bhagat
> ---
> in
On 10/03/2018 04:38 AM, Rajesh Bhagat wrote:
> This defconfig is for TFABOOT, to be loaded by trusted firmware.
>
> Signed-off-by: York Sun
> Signed-off-by: Pankit Garg
> Signed-off-by: Rajesh Bhagat
> ---
> arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 9 +++--
These changes are better moved int
Tom,
Here’s the u-boot-rockchip patch queue for v2018.11 with the respective
Travis-CI run at https://travis-ci.org/ptomsich/u-boot-rockchip/builds/436047523
Thanks,
Philipp.
The following changes since commit 2ba8bf207481cfb319f54a1bef67f6f068831a58:
Prepare v2018.11-rc1 (2018-10-01 20:32:0
On Wed, Oct 03, 2018 at 01:09:59PM +0200, Heiko Schocher wrote:
> Hello Tom,
>
> please pull from u-boot-i2c.git master
>
> The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
>
> Merge branch 'master' of git://git.denx.de/u-boot-spi (2018-10-02 17:01:46
> -0400)
>
On Wed, Oct 03, 2018 at 06:16:21PM +0800, ub...@andestech.com wrote:
> Hi Tom,
>
> Please pull the following patch from u-boot-riscv into your tree.
> Thanks!
>
> The following changes since commit 592cd5defd4f71d34ffcbd8dd3326bc10f662e20:
>
> Merge branch 'master' of git://git.denx.de/u-b
On Wednesday 03 October 2018 08:33 PM, Andrew F. Davis wrote:
Read the boot mode register to find the boot mode. Only use eMMC boot0
mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
to current conflating of boot mode and boot device), and not iff the
boot device is MMC por
On Wednesday 03 October 2018 08:33 PM, Andrew F. Davis wrote:
For most devices the boot mode maps directly to the boot
device. For MMC this is not the case as we have two MMC
boot modes and two MMC boot devices (ports). Check the
boot port to determine which MMC device was our boot
device. Make
On Wed, Oct 03, 2018 at 10:03:23AM -0500, Andrew F. Davis wrote:
> Read the boot mode register to find the boot mode. Only use eMMC boot0
> mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
> to current conflating of boot mode and boot device), and not iff the
> boot device is
On Wed, Oct 03, 2018 at 10:03:22AM -0500, Andrew F. Davis wrote:
> For most devices the boot mode maps directly to the boot
> device. For MMC this is not the case as we have two MMC
> boot modes and two MMC boot devices (ports). Check the
> boot port to determine which MMC device was our boot
> de
For most devices the boot mode maps directly to the boot
device. For MMC this is not the case as we have two MMC
boot modes and two MMC boot devices (ports). Check the
boot port to determine which MMC device was our boot
device. Make this change for both primary and secondary
boot modes.
Signed-of
Read the boot mode register to find the boot mode. Only use eMMC boot0
mode when the mode is eMMC boot (called BOOT_DEVICE_MMC1 currently due
to current conflating of boot mode and boot device), and not iff the
boot device is MMC port 0.
Signed-off-by: Andrew F. Davis
---
arch/arm/mach-k3/am6_in
Hi Jens and Simon,
ne 30. 9. 2018 v 22:07 odesílatel Simon Glass napsal:
> Hi Tom,
>
> Here are some binman and core driver-model enhancements.
>
> https://travis-ci.org/sglass68/u-boot/builds/435045761
>
> Re signed tags, I did read this link:
>
> http://web.mit.edu/git/www/howto/using-signed-t
configs2csv.py is tool that allow to check how some options are used for a
particular subset of platforms.
The purpose is to identify the targets that are actually using one or more
options of interest.
For example, it can tell what targets are still using CONFIG_DM_I2_COMPAT.
It relies on the conf
The possible filters are "arch", "vendor", "soc", "cpu" and "arch".
The list of all the defconfigs is read from boards.cfg. If this file
doesn't exist, then tools/genboardscfg.py is called to generate it.
Signed-off-by: Jean-Jacques Hiblot
---
Changes in v2: None
tools/find_defconfigs.py | 16
"moveconfig -b" will build a database of config options based on the
content of include/config/auto.conf that reflects the .config
Add a new option '-B' that does essentially the same, except that it uses
the content of u-boot.cfg, spl/u-boot.cfg and tpl/u-boot.cfg.
This allows to get the options
This series introduce 2 new python tools that helps getting an overview
of the configuration options.
First one is fairly simple and is used to locate deconfigs based on several
criteria: 'arch', 'soc', 'cpu', 'vendor', 'board', 'defconfig name',
'maintainer' and 'status'. All the parameters use r
On Wed, Oct 3, 2018 at 8:35 AM Miquel Raynal wrote:
>
> Hi Adam,
>
> > >
> > > >
> > > > >
> > > > > I can use the nand read/write functions and mtdparts lists the
> > > > > partitions, so I know nand works. My defconfig
> > > > > lists the partitions, so if we're not supposed to use mtdparts, wh
Hi Marek,
út 14. 8. 2018 v 11:27 odesílatel Marek Vasut napsal:
> The SPL loaders assume that the CONFIG_SYS_TEXT_BASE memory location
> is available and can be corrupted by loading ie. uImage or fitImage
> headers there. Sometimes it could be beneficial to load the headers
> elsewhere, ie. if C
Hi Adam,
> >
> > >
> > > >
> > > > I can use the nand read/write functions and mtdparts lists the
> > > > partitions, so I know nand works. My defconfig
> > > > lists the partitions, so if we're not supposed to use mtdparts, where
> > > > I do store the partition information?
> > >
> >
Hi Adam,
Adam Ford wrote on Wed, 3 Oct 2018 07:47:25 -0500:
> On Wed, Oct 3, 2018 at 7:43 AM Miquel Raynal
> wrote:
> >
> > Hi Adam,
> >
> > Adam Ford wrote on Wed, 3 Oct 2018 07:35:15 -0500:
> >
> > > On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal
> > > wrote:
> > > >
> > > > There shoul
Hi Tom
On 10/03/2018 02:06 PM, Tom Rini wrote:
> On Wed, Oct 03, 2018 at 09:38:38AM +0200, Patrice Chotard wrote:
>
>> Add usbotg_hs regulator to allow to use the USB mass-storage
>> feature on OTG usb port.
>>
>> Signed-off-by: Patrice Chotard
>> ---
>>
>> arch/arm/dts/stm32mp157c-ed1.dts | 4
On Wed, Oct 3, 2018 at 7:43 AM Miquel Raynal wrote:
>
> Hi Adam,
>
> Adam Ford wrote on Wed, 3 Oct 2018 07:35:15 -0500:
>
> > On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal
> > wrote:
> > >
> > > There should not be a 'nand' command, a 'sf' command and certainly not
> > > a new 'spi-nand' command
Hi Adam,
Adam Ford wrote on Wed, 3 Oct 2018 07:35:15 -0500:
> On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal
> wrote:
> >
> > There should not be a 'nand' command, a 'sf' command and certainly not
> > a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> > MTD devices/partition
On Wed, Oct 03, 2018 at 05:55:14PM +0530, Keerthy wrote:
> Push generic defines of gpio.h out of mach-davinci to drivers/gpio
> now that non-davinci architectures are beginning to use this IP.
>
> Signed-off-by: Keerthy
Reviewed-by: Tom Rini
--
Tom
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Description: PGP signature
On Mon, Oct 1, 2018 at 8:48 AM Miquel Raynal wrote:
>
> There should not be a 'nand' command, a 'sf' command and certainly not
> a new 'spi-nand' command. Write a 'mtd' command instead to manage all
> MTD devices/partitions at once. This should be the preferred way to
> access any MTD device.
Wha
Push generic defines of gpio.h out of mach-davinci to drivers/gpio
now that non-davinci architectures are beginning to use this IP.
Signed-off-by: Keerthy
---
Changes in v2:
* Corrected the SPDX format
arch/arm/mach-davinci/include/mach/gpio.h | 32
drivers/gpio/da8
Add k2g compatible so that k3 SoCs can be supported
Signed-off-by: Keerthy
Reviewed-by: Tom Rini
---
drivers/gpio/da8xx_gpio.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/drivers/gpio/da8xx_gpio.c b/drivers/gpio/da8xx_gpio.c
index b0d49cb..494fc5f 100644
--- a/drivers/gpio/da8xx_gpio.c
On Wed, Oct 03, 2018 at 04:09:30PM +0530, Keerthy wrote:
> Add k2g compatible so that k3 SoCs can be supported
>
> Signed-off-by: Keerthy
Reviewed-by: Tom Rini
--
Tom
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Description: PGP signature
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U-Boot@lists.d
On Wed, Oct 03, 2018 at 04:09:31PM +0530, Keerthy wrote:
> Push generic defines of gpio.h out of mach-davinci to drivers/gpio
> now that non-davinci architectures are beginning to use this IP.
>
> Signed-off-by: Keerthy
[snip]
> diff --git a/drivers/gpio/da8xx_gpio.h b/drivers/gpio/da8xx_gpio.h
On Wednesday 03 October 2018 05:41 PM, Tom Rini wrote:
> On Wed, Oct 03, 2018 at 04:09:31PM +0530, Keerthy wrote:
>
>> Push generic defines of gpio.h out of mach-davinci to drivers/gpio
>> now that non-davinci architectures are beginning to use this IP.
>>
>> Signed-off-by: Keerthy
> [snip]
>>
On Wed, Oct 03, 2018 at 09:38:38AM +0200, Patrice Chotard wrote:
> Add usbotg_hs regulator to allow to use the USB mass-storage
> feature on OTG usb port.
>
> Signed-off-by: Patrice Chotard
> ---
>
> arch/arm/dts/stm32mp157c-ed1.dts | 4
> 1 file changed, 4 insertions(+)
>
> diff --git a
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heter
From: Pankit Garg
Adds support for TFABOOT in IFC driver, requires to implement
the mappings at run time.
Defines init_early_memctl_regs and init_final_memctl_regs with
dynamic mapping for nor and nand boot.
Signed-off-by: Pankit Garg
Signed-off-by: Rajesh Bhagat
---
drivers/misc/fsl_ifc.c |
From: Pankit Garg
Corrects the environment offset from 0x50 to 0x1D,
as per LS1012AFRWY flash layout.
Signed-off-by: Pankit Garg
---
include/configs/ls1012afrwy.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index
From: Pankit Garg
Set mc and bootcmd env variables only when gd->env_addr is
default environment.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Pankit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 15 +--
1 file changed, 13 insertions(+), 2 deletions(-)
diff --git a/arch/arm/c
Xilinx is introducing Versal, an adaptive compute acceleration platform
(ACAP), built on 7nm FinFET process technology. Versal ACAPs combine
Scalar Processing Engines, Adaptable Hardware Engines, and Intelligent
Engines with leading-edge memory and interfacing technologies to deliver
powerful heter
Adds i2c QIXIS support for TFABOOT, as IFC and QSPI
are muxed together.
Signed-off-by: Rajesh Bhagat
---
include/configs/ls1046aqds.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 1cb4ecfdb7..6f292a0af9 100
Add secure boot support for environment selection.
Signed-off-by: Pankit Garg
Signed-off-by: Rajesh Bhagat
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 14 ++
1 file changed, 14 insertions(+)
diff --git a/arch/arm/cpu/armv8/fsl-layerscape/cpu.c
b/arch/arm/cpu/armv8/fsl-layerscape
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From: Vinitha V Pillai
This defconfig is for Secure TFABOOT, to be loaded by trusted firmware
Signed-off-by: Vinitha V Pillai
---
configs/ls1043ardb_ram_SECURE_BOOT_defconfig | 51
1 file changed, 51 insertions(+)
create mode 100644 configs/ls1043ardb_ram_SECURE_BOOT_defc
From: Vinitha V Pillai
This defconfig is for Secure TFABOOT, to be loaded by trusted firmware
Signed-off-by: Vinitha V Pillai
---
configs/ls1012aqds_ram_SECURE_BOOT_defconfig | 65
1 file changed, 65 insertions(+)
create mode 100644 configs/ls1012aqds_ram_SECURE_BOOT_defc
From: Vinitha V Pillai
This defconfig is for Secure TFABOOT, to be loaded by trusted firmware
Signed-off-by: Vinitha V Pillai
---
configs/ls1043aqds_ram_SECURE_BOOT_defconfig | 58
1 file changed, 58 insertions(+)
create mode 100644 configs/ls1043aqds_ram_SECURE_BOOT_defc
When U-Boot boots from EL2, skip some lowlevel init code for CCI-400
requiring EL3.
These initialization tasks are carried out before U-Boot runs.
Signed-off-by: Rajesh Bhagat
Signed-off-by: York Sun
---
board/freescale/ls1012aqds/ls1012aqds.c | 5 +++--
1 file changed, 3 insertions(+), 2 dele
CONFIG_SYS_FMAN_FW_ADDR and CONFIG_SYS_QE_FW_ADDR made common
to support all boot sources.
Signed-off-by: Pankit Garg
Signed-off-by: Rajesh Bhagat
---
include/configs/ls1043a_common.h | 11 +++
1 file changed, 11 insertions(+)
diff --git a/include/configs/ls1043a_common.h b/include/con
From: Pankit Garg
Change tlb base address from OCRAM to DDR when exception level is
less than 3.
Signed-off-by: Ruchika Gupta
Signed-off-by: Pankit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/fsl-l
This defconfig is for TFABOOT, to be loaded by trusted firmware.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Pankit Garg
---
board/freescale/ls1012ardb/ls1012ardb.c | 11 +
configs/ls1012ardb_ram_defconfig| 56 +
include/configs/ls1012a_common.h| 6 +
From: Pankit Garg
Adds SMC calls for getting DDR size and bank info for TFABOOT.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Pankit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/cpu.c | 84 +++
.../arm/include/asm/arch-fsl-layerscape/soc.h | 4 +
board/freescale/ls1012aqds
From: Pankit Garg
Defines BOOTCOMMAND for TFABOOT configuration for
supported boot sources
Signed-off-by: Rajesh Bhagat
Signed-off-by: Pankit Garg
---
include/configs/ls1012a2g5rdb.h | 6 ++
include/configs/ls1012a_common.h | 6 ++
include/configs/ls1012afrdm.h| 5 +
include/
From: York Sun
Workaround of erratum A010539 clears the RCW source field in PORSR1
register, causing failure of detecting boot source using this method.
Use SMC call if U-Boot runs at EL2. If SMC is not implemented or
running at EL3, continue to read PORSR1 and presume QSPI as boot
source if erra
From: Pankit Garg
Add support of MC framework for TFA
Make MC framework independent of boot source.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Pankit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 49 +
1 file changed, 49 insertions(+)
diff --git a/arch/arm/cpu/a
From: Vinitha V Pillai
This defconfig is for Secure TFABOOT, to be loaded by trusted firmware
Signed-off-by: Vinitha V Pillai
---
configs/ls1012ardb_ram_SECURE_BOOT_defconfig | 62
1 file changed, 62 insertions(+)
create mode 100644 configs/ls1012ardb_ram_SECURE_BOOT_defc
Replaces __ilog2 function call with LOG2 macro, required to
use macros in global variables.
Also, corrects the value passed in LOG2 for some PowerPC
platforms. Minimum value that can be configured is is 64K
for IFC IP.
Signed-off-by: Pankit Garg
Signed-off-by: Rajesh Bhagat
---
include/configs
From: Pankit Garg
Makes IFC paramteres common and dynamic for all boot source.
Signed-off-by: Pankit Garg
Signed-off-by: Rajesh Bhagat
---
board/freescale/ls1043ardb/ls1043ardb.c | 98 +
include/configs/ls1043ardb.h| 20 +
2 files changed, 118 insertion
Adds i2c QIXIS support for TFABOOT, as IFC and QSPI
are muxed together.
Signed-off-by: Rajesh Bhagat
---
include/configs/ls1043aqds.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index 41bd4fc35c..ed07d9f28e 100
Changes the el2_to_aarch32 SMC ID from 0xc000ff04 to 0xc200ff17,
it is applicable to both TFA and non-TFA boot.
Signed-off-by: Rajesh Bhagat
---
arch/arm/cpu/armv8/sec_firmware_asm.S | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/arch/arm/cpu/armv8/sec_firmware_asm.S
b/arch
From: Vinitha V Pillai
Includes environment.h file in ls1012aqds.c Also, enables
pfe validation in ls1012ardb.
Signed-off-by: Vinitha V Pillai
---
board/freescale/ls1012aqds/Kconfig | 10 ++
board/freescale/ls1012aqds/ls1012aqds.c | 6 ++
board/freescale/ls1012ardb/
From: Pankit Garg
Adds bootcmd identificaton on basis on boot source, valid
in TFABOOT configuration.
Signed-off-by: Rajesh Bhagat
Signed-off-by: Pankit Garg
---
arch/arm/cpu/armv8/fsl-layerscape/soc.c | 69 +
1 file changed, 69 insertions(+)
diff --git a/arch/arm/cpu
From: Vinitha V Pillai
This defconfig is for Secure TFABOOT, to be loaded by trusted firmware
Signed-off-by: Vinitha V Pillai
---
configs/ls1046aqds_ram_SECURE_BOOT_defconfig | 58
1 file changed, 58 insertions(+)
create mode 100644 configs/ls1046aqds_ram_SECURE_BOOT_defc
Removes EL3 specific erratas for TFABOOT, And now taken care in TFA.
ARM_ERRATA_855873, SYS_FSL_ERRATUM_A008850, SYS_FSL_ERRATUM_A008511,
SYS_FSL_ERRATUM_A008336, SYS_FSL_ERRATUM_A009663, SYS_FSL_ERRATUM_A009803
SYS_FSL_ERRATUM_A009942, SYS_FSL_ERRATUM_A010165
Signed-off-by: Rajesh Bhagat
---
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