Hi Tuomas,
On Sat, Sep 8, 2018 at 7:14 AM Tuomas Tynkkynen wrote:
>
> Hi Bin,
>
> On Fri, 7 Sep 2018 09:49:24 +0800
> Bin Meng wrote:
>
> > Hi Tuomas,
> >
> > On Fri, Sep 7, 2018 at 5:03 AM Tuomas Tynkkynen
> > wrote:
> > >
> > > Hi Bin,
> > >
> > > On 09/04/2018 12:31 PM, Bin Meng wrote:
> > >
Hi Bin,
On Fri, 7 Sep 2018 09:49:24 +0800
Bin Meng wrote:
> Hi Tuomas,
>
> On Fri, Sep 7, 2018 at 5:03 AM Tuomas Tynkkynen
> wrote:
> >
> > Hi Bin,
> >
> > On 09/04/2018 12:31 PM, Bin Meng wrote:
> > > Hi Lukas,
> > >
> > > On Tue, Sep 4, 2018 at 5:39 AM Auer, Lukas
> > > wrote:
> > >>
>
'builman' -> 'buildman'
Signed-off-by: Tuomas Tynkkynen
---
.travis.yml | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/.travis.yml b/.travis.yml
index 95cfa5b6fc..ea3b20e063 100644
--- a/.travis.yml
+++ b/.travis.yml
@@ -189,7 +189,7 @@ matrix:
- name: "buildman sun6i"
On 09/07/2018 08:02 PM, Westergreen, Dalon wrote:
> On Fri, 2018-09-07 at 19:36 +0200, Marek Vasut wrote:
>> On 09/07/2018 06:40 PM, Dalon L Westergreen wrote:
>> On Fri, 2018-09-07 at 18:25 +0200, Marek Vasut wrote:
>> On 09/07/2018 06:15 PM, Dalon L Westergreen wrote:
>> On Thu, 2018-09-06 at 23:
On Fri, 2018-09-07 at 19:36 +0200, Marek Vasut wrote:
> On 09/07/2018 06:40 PM, Dalon L Westergreen wrote:
> On Fri, 2018-09-07 at 18:25 +0200, Marek Vasut wrote:
> On 09/07/2018 06:15 PM, Dalon L Westergreen wrote:
> On Thu, 2018-09-06 at 23:56 +0200, Marek Vasut wrote:
> On 09/06/2018 11:26 PM, D
The 'conitrace' command prints the codes received from the console input as
hexadecimal numbers.
This developer utility is useful for testing the handling of special keys
by keyboard drivers.
Signed-off-by: Heinrich Schuchardt
---
cmd/Kconfig | 6 ++
cmd/Makefile| 1 +
cmd/conitra
On 09/07/2018 06:40 PM, Dalon L Westergreen wrote:
> On Fri, 2018-09-07 at 18:25 +0200, Marek Vasut wrote:
>> On 09/07/2018 06:15 PM, Dalon L Westergreen wrote:
>> On Thu, 2018-09-06 at 23:56 +0200, Marek Vasut wrote:
>> On 09/06/2018 11:26 PM, Dalon L Westergreen wrote:
>> On Thu, 2018-09-06 at 15
Some MIPS systems store some board-specific boot configuration
in the U-Boot binary at offset 0x10. This is used by Malta boards
and by Lantiq/Intel SoC's when booting from parallel NOR flash.
Convert the hard-coded values to Kconfig options to remove such
board-specific stuff out of the generic s
Caches should be configured to mode CONF_CM_CACHABLE_NONCOHERENT
(or CONF_CM_CACHABLE_COW when a CM is available). There is no
need to make this configurable.
Signed-off-by: Daniel Schwierzeck
---
README | 14 --
arch/mips/lib/cache_init.S | 6 +
Changing the Cache Coherency Algorithm (CCA) for kernel mode
requires executing from KSEG1. Thus do a jump from KSEG0 to KSEG1
before changing the CCA mode. Jump back to KSEG0 afterwards.
Signed-off-by: Daniel Schwierzeck
---
arch/mips/lib/cache_init.S | 54 ++---
The index base address used for the cache initialisation is currently
hard-coded to CKSEG0. Make this value configurable if a MIPS system
needs to have a different address (e.g. in SRAM or ScratchPad RAM).
Signed-off-by: Daniel Schwierzeck
---
arch/mips/Kconfig | 12
arch/
Do some minor cleanups. Improve the code for changing the k0 CCA.
Make the index base address for cache initialisation configurable.
Some changes are insprired by the book "MD0901 Boot-MIPS" [1].
Also this is partly a preparation for the upcoming support for Mediatek
MT76xx platform.
[1]
https
Those functions are not needed during cache init and can be
implemented in C. Only support the safe disabling of caches when
this is required for booting an OS. Reenabling caches is much
harder to implement if an optional coherency manager must be
supported. As there is no real use-case anyway, dca
On Fri, 2018-09-07 at 18:25 +0200, Marek Vasut wrote:
> On 09/07/2018 06:15 PM, Dalon L Westergreen wrote:
> On Thu, 2018-09-06 at 23:56 +0200, Marek Vasut wrote:
> On 09/06/2018 11:26 PM, Dalon L Westergreen wrote:
> On Thu, 2018-09-06 at 15:41 +0200, Marek Vasut wrote:
> On 09/06/2018 03:39 PM, D
On 09/07/2018 06:15 PM, Dalon L Westergreen wrote:
> On Thu, 2018-09-06 at 23:56 +0200, Marek Vasut wrote:
>> On 09/06/2018 11:26 PM, Dalon L Westergreen wrote:
>> On Thu, 2018-09-06 at 15:41 +0200, Marek Vasut wrote:
>> On 09/06/2018 03:39 PM, Dalon L Westergreen wrote:
>> On Thu, 2018-09-06 at 12
On Thu, 2018-09-06 at 23:56 +0200, Marek Vasut wrote:
> On 09/06/2018 11:26 PM, Dalon L Westergreen wrote:On Thu, 2018-09-06 at 15:41
> +0200, Marek Vasut wrote:On 09/06/2018 03:39 PM, Dalon L Westergreen wrote:On
> Thu, 2018-09-06 at 12:09 +0200, Marek Vasut wrote:On 09/06/2018 05:02 AM,
> Dalon W
On Thu, Sep 06, 2018 at 11:56:28AM +0800, Chen-Yu Tsai wrote:
> In commit a1274cc94a20 ("ARM: Page align secure section only when it is
> executed in situ"), we used output section attributes (the "ALIGN"
> keyword after the colon) to specify the alignment requirements. Using
> the constant "COMMO
The comment of child_pre_probe, one of the 'struct uclass_driver'
members, is currently missing.
Signed-off-by: Bin Meng
---
include/dm/uclass.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/dm/uclass.h b/include/dm/uclass.h
index 0e882ce..6e7c1cd 100644
--- a/include/dm/uclass.h
On Fri, Sep 07, 2018 at 08:02:05AM +0200, Michal Simek wrote:
> Include xilinx soft i2c controller to Zynq fragment to make clear who is
> responsible for it.
>
> Signed-off-by: Michal Simek
Applied to for-current, thanks!
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On Fri, Sep 07, 2018 at 08:02:05AM +0200, Michal Simek wrote:
> Include xilinx soft i2c controller to Zynq fragment to make clear who is
> responsible for it.
>
> Signed-off-by: Michal Simek
Cool, thanks!
> ---
>
> Normally we are handling all these drivers via one fragment to make sure
> that
When traversing slots in a btree (via btrfs_path) with btrfs_next_slot(),
we didn't correctly identify that the last slot in the leaf was reached
and we should jump to the next leaf.
This could lead to any kind of runtime errors or corruptions, like:
* file data not being read at all, or is read p
Hi,
Any ideas/hints needed with regard to dwc3 -- phy -- hub support on a custom
board.
I've been struggling with u-boot implementation of usb support on a mips32-based
development board (a SoC with DWC3 integrated).
SoC has the ULPI interface, and by means of it, it's connected to USB 2.0 phy
On Fri, Sep 7, 2018 at 7:17 PM Masahiro Yamada
wrote:
>
> If there exist 10 or more nodes of the same type, the alignment
> of "dm tree" command is broken.
>
> Signed-off-by: Masahiro Yamada
> ---
>
> drivers/core/dump.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
Reviewed-by: Bin
On Fri, Sep 7, 2018 at 7:32 PM Masahiro Yamada
wrote:
>
> Currently, "help dm" shows as follows:
>
> => help dm
> dm - Driver model low level access
>
> Usage:
> dm tree Dump driver model tree ('*' = activated)
> dm uclassDump list of instances for each uclass
> dm devresDu
On Fri, 7 Sep 2018, 10:24 PM Stefan, wrote:
> Hi Chris,
>
> (added Daniel)
>
> On 07.09.2018 10:24, Chris Packham wrote:
> > Add mips version of atomic.h and basic atomic operations. These aren't
> > the optimised versions from the Linux kernel, just basic stubs that
> > satisfy users that need s
Currently, "help dm" shows as follows:
=> help dm
dm - Driver model low level access
Usage:
dm tree Dump driver model tree ('*' = activated)
dm uclassDump list of instances for each uclass
dm devresDump list of device resources for each device
Signed-off-by: Masahiro Yama
On 09/07/2018 01:15 PM, Masahiro Yamada wrote:
> If there exist 10 or more nodes of the same type, the alignment
> of "dm tree" command is broken.
But what if there exist 100 or mode nodes of the same type ? :-)
> Signed-off-by: Masahiro Yamada
> ---
>
> drivers/core/dump.c | 2 +-
> 1 file ch
If there exist 10 or more nodes of the same type, the alignment
of "dm tree" command is broken.
Signed-off-by: Masahiro Yamada
---
drivers/core/dump.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/core/dump.c b/drivers/core/dump.c
index d7cdb14..c86f889 100644
---
Hi Stefano,
> Hi Lukasz,
>
> On 07/09/2018 00:53, Lukasz Majewski wrote:
> > Dear Tom, Stefano,
> >
> >> The 'rootpath' can be provided by DHCP server. Removing this line
> >> prevents from overwriting it.
> >>
> >> To do that on the DHCP server side (isc-dhcp-server) modify
> >> dhcpd.conf an
On Fri, Sep 07, 2018 at 10:51:00AM +0200, Marek Vasut wrote:
> On 09/07/2018 08:24 AM, Ley Foon Tan wrote:
> > Change to use managed resource function devm_kcalloc(),
> > so it will auto free memory when driver is removed.
> >
> > Signed-off-by: Ley Foon Tan
> >
> > ---
> > v2:
> > - Remove free
On 7.9.2018 12:34, Wolfram Sang wrote:
> On Fri, Sep 07, 2018 at 08:02:05AM +0200, Michal Simek wrote:
>> Include xilinx soft i2c controller to Zynq fragment to make clear who is
>> responsible for it.
>>
>> Signed-off-by: Michal Simek
>
> Cool, thanks!
>
>> ---
>>
>> Normally we are handling al
From: Vipul Kumar
Update the DWC3 USB driver to support a live tree.
Signed-off-by: Vipul Kumar
Signed-off-by: Siva Durga Prasad Paladugu
Tested-by: Michal Simek
---
Changes in v3:
- Used ofnode_valid() to check for node validity
This fixes the below compilation failure
for stih410-b2260_
Hi Lukasz,
On 07/09/2018 00:53, Lukasz Majewski wrote:
> Dear Tom, Stefano,
>
>> The 'rootpath' can be provided by DHCP server. Removing this line
>> prevents from overwriting it.
>>
>> To do that on the DHCP server side (isc-dhcp-server) modify dhcpd.conf
>> and add 'option root-path "192.168.X.
Hi Chris,
(added Daniel)
On 07.09.2018 10:24, Chris Packham wrote:
Add mips version of atomic.h and basic atomic operations. These aren't
the optimised versions from the Linux kernel, just basic stubs that
satisfy users that need something to define atomic_inc() etc.
Signed-off-by: Chris Packh
On 09/07/2018 08:24 AM, Ley Foon Tan wrote:
> Change to use managed resource function devm_kcalloc(),
> so it will auto free memory when driver is removed.
>
> Signed-off-by: Ley Foon Tan
>
> ---
> v2:
> - Remove free() function.
> ---
> drivers/gpio/dwapb_gpio.c | 4 +---
> 1 file changed, 1 i
On 09/07/2018 09:42 AM, Ley Foon Tan wrote:
> Disable and free clock when remove driver.
>
> Signed-off-by: Ley Foon Tan
> ---
> drivers/spi/designware_spi.c | 14 +-
> 1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/spi/designware_spi.c b/drivers/spi/design
> On 7 Sep 2018, at 11:37, Kever Yang wrote:
>
> Use Macro instead of hard code.
Nitpick: mentioning where the macro is defined (and if it was recently
introduced,
what commit this references) would be helpful in a cursory review. I just ran a
'git grep’ instead ;-)
> Signed-off-by: Kever Ya
Kever,
[Sorry for the delay, I am switching laptops and this got stuck in my Drafts
folder
on the old machine — which I noticed only today]
> On 3 Sep 2018, at 05:21, Kever Yang wrote:
>
> Hi Philipp,
>
>
> On 08/30/2018 05:11 PM, Philipp Tomsich wrote:
>>
>>
>> On Wed, 18 Apr 2018, Kever
Use Macro instead of hard code.
Signed-off-by: Kever Yang
---
cmd/part.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/cmd/part.c b/cmd/part.c
index bee204fff0..bfb6488b0f 100644
--- a/cmd/part.c
+++ b/cmd/part.c
@@ -90,7 +90,7 @@ static int do_part_list(int argc, char * c
On 24.8.2018 14:00, Mike Looijmans wrote:
> The miamiplus can use GEM0 through MIO pins, which requires a 125 MHz TX
> clock to be generated. With the IO PLL at 1200 MHz this isn't possible, so
> change it to run at 1000 and adjust the divisors accordingly. Also set the
> GEM0 clock source to MIO i
On 24.8.2018 14:00, Mike Looijmans wrote:
> Use the same partitioning as the SD card by default. This allows to
> insert an SD card into a USB reader or use an USB drive with the same
> partitioning and boot using that instead of requiring a ramdisk image.
>
> Signed-off-by: Mike Looijmans
> ---
On 24.8.2018 14:00, Mike Looijmans wrote:
> To reduce board cost, the topic-miamilite board hardware was adapted. It now
> only has single QSPI NOR flash and a single DDR RAM chip. This reduces the
> memory interface to 16-bit and halves the available RAM and flash.
>
> Signed-off-by: Mike Looijma
On 24.8.2018 14:00, Mike Looijmans wrote:
> The miamiplus contains a speedgrade-2 device, which may run the CPU at 800MHz.
> Change the PLL setting to 800MHz, and adapt the setpoints in the devicetree.
>
> Signed-off-by: Mike Looijmans
> ---
> arch/arm/dts/zynq-topic-miamiplus.dts
Hi,
Any ideas/hints needed with regard to dwc3 -- phy -- hub support on a custom
board.
I've been struggling with u-boot implementation of usb support on a mips32-based
development board (a SoC with DWC3 integrated).
SoC has the ULPI interface, and by means of it, it's connected to USB 2.0 phy
Add mips version of atomic.h and basic atomic operations. These aren't
the optimised versions from the Linux kernel, just basic stubs that
satisfy users that need something to define atomic_inc() etc.
Signed-off-by: Chris Packham
---
At $dayjob we have a mips target that we want to run UBIFS on.
Disable and free clock when remove driver.
Signed-off-by: Ley Foon Tan
---
drivers/spi/designware_spi.c | 14 +-
1 file changed, 13 insertions(+), 1 deletion(-)
diff --git a/drivers/spi/designware_spi.c b/drivers/spi/designware_spi.c
index 5cca414..f4d36cf 100644
--- a/drivers/spi/d
On Fri, Sep 7, 2018 at 3:30 PM Christian Gmeiner
wrote:
>
> This will add support for a baud rate of 57600.
>
> Signed-off-by: Christian Gmeiner
> ---
> include/configs/x86-common.h | 2 --
> 1 file changed, 2 deletions(-)
>
Reviewed-by: Bin Meng
___
This will add support for a baud rate of 57600.
Signed-off-by: Christian Gmeiner
---
include/configs/x86-common.h | 2 --
1 file changed, 2 deletions(-)
diff --git a/include/configs/x86-common.h b/include/configs/x86-common.h
index f0b027e69c..78c382de0c 100644
--- a/include/configs/x86-common.
Hi Jagan,
We would like to upstream quad and dual modes(parallel and stacked) support for
qspi drivers of Zynq and ZynqMP. Can we send patches based on existing
framework(drivers/spi , this is what we are using on Xilinx tree) or you want
us to use any other?
I know we had discussion sometime b
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