Hi Simon,
On Tue, Jan 17, 2017 at 12:34 PM, Bin Meng wrote:
> Hi Simon,
>
> On Mon, Jan 16, 2017 at 10:08 PM, Simon Glass wrote:
>> Hi Bin,
>>
>> On 14 January 2017 at 06:32, Bin Meng wrote:
>>> Hi Simon,
>>>
>>> On Sun, Nov 20, 2016 at 4:25 AM, Simon Glass wrote:
To avoid using BSS in SP
Hi Simon,
On Thu, Jan 26, 2017 at 10:23 PM, Simon Glass wrote:
> Hi Bin,
>
> On 18 January 2017 at 04:32, Bin Meng wrote:
>> This brings U-Boot x86 64-bit support on QEMU target.
>>
>> This series is available at u-boot-x86/qemu64-working for testing.
>>
>>
>> Bin Meng (14):
>> x86: qemu: Add
Hi Simon,
On Tue, Jan 24, 2017 at 3:50 AM, Simon Glass wrote:
> Hi Bin,
>
> On 18 January 2017 at 04:32, Bin Meng wrote:
>> arch_cpu_init_dm() might not be implemented by every platform.
>> Implement a weak version for SPL.
>>
>> Signed-off-by: Bin Meng
>> ---
>>
>> arch/x86/lib/spl.c | 5
Hi Stefan,
On Mon, Jan 23, 2017 at 10:55 PM, Stefan Roese wrote:
> Without configuring these registers in the SPI controller, the Linux
> MTD device driver is not able to correctly read/write to the SPI
> NOR chip at all. In fact, the chip is not detected at all.
>
> Signed-off-by: Stefan Roese
Hi Andy,
On Tue, Jan 24, 2017 at 10:16 PM, Andy Shevchenko
wrote:
> This option useful not only for development, but for the platforms where
This option "is" useful ..
> U-Boot is run from custom ROM bootloader. For example, Intel Edison is
> that board.
>
> Make this option visible that platfo
There are two typos in the comment "invalide i-cache is enabled".
We can fix it by
invalide -> invalidate
is -> if
Or, if we want to match the comment to the code, we can say
"skip invalidating i-cache if disabled".
Signed-off-by: Masahiro Yamada
---
arch/arm/lib/relocate_64.S | 2 +-
In order to use the driver model gpio APIs, add the device tree
support.
Signed-off-by: Wenyou Yang
---
drivers/mtd/nand/atmel_nand.c | 143 ++
include/fdtdec.h | 1 +
lib/fdtdec.c | 1 +
3 files changed, 119 insertions(+
Tom,
The following changes since commit cf4128e53caa4f7b0a6586fc3f10690d5c05db31:
Merge git://www.denx.de/git/u-boot-marvell (2017-01-26 12:26:24 -0500)
are available in the git repository at:
git://git.denx.de/u-boot-fsl-qoriq.git
for you to fetch changes up to add63f94a9c3bbe1af3fdf3f4
Device memory needs to be set along with PXN and UNX bits. Normal memory
must clear these bits. To support modification of PXN, UXN bits, extend
existing function mmu_set_region_dcache_behaviour() to accept attributes
directly. Also fix parsing d-cache option by removing extra shifting.
Signed-off
Flush spl image after loading into memory in case d-cache is enabled.
Signed-off-by: York Sun
---
Not sure if anyone noticed that SPL loads image but it doesn't flush the cache.
As far as MMU/cache stays the same, we don't notice it. Shall we flush it?
This patch is only tested on limited platfo
We don't have to completely turn off MMU and cache to switch to
another MMU table as far as the data is coherent before and after
the switching. This patch relaxes the procedure.
Signed-off-by: York Sun
CC: Alexander Graf
---
I found this issue while trying to change MMU table for a SPL boot.
Th
On Fri, 2017-02-03 at 12:17 -0500, Tom Rini wrote:
> On Fri, Feb 03, 2017 at 09:13:43AM -0800, Dalon Westergreen wrote:
> >
> > On Fri, 2017-02-03 at 11:05 -0600, Dinh Nguyen wrote:
> > >
> > > Hi Dalon,
> > >
> > > On 02/01/2017 10:45 AM, Dalon Westergreen wrote:
> > > >
> > > >
> > > > From:
> -Original Message-
> From: Sekhar Nori [mailto:nsek...@ti.com]
> Sent: Thursday, February 2, 2017 9:44 PM
> To: ken ; sba...@denx.de
> Cc: u-boot@lists.denx.de; martin.donne...@ge.com; Ken.Lin; Peter.Chiang;
> Peter.Stretz; akshay.b...@timesys.com; joe.hershber...@ni.com;
> albert.u.ub.
From: Dalon Westergreen
This adds support for the spl to seach for and boot from an arbitrary
partition type rather then a specific partition number. When
USE_PARTITION_TYPE is enabled, splwill search for the partition type but
fallback to the specified partition number.
In addition to the abo
From: Dalon Westergreen
Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig.
set to default y for socfpga platforms, and add appropriate
configurations for kc1, snipper, and db-88f6820-gp boards.
Signed-off-by: Dalon Westergreen
--
Changes in v2:
From: Dalon Westergreen
the socfpga bootrom supports mmc booting from either a raw image
starting at 0x0, or from a partition of type 0xa2. This patch
adds support for locating the boot image in the first type 0xa2
partition found.
Assigned a partition number of -1 will cause a search for a
par
On Fri, Feb 03, 2017 at 09:57:03AM +0530, Vignesh R wrote:
>
>
> On Friday 03 February 2017 03:48 AM, Strashko, Grygorii wrote:
> > Convert OMAP hsmmc driver to use driver-model block devices.
> >
> > Signed-off-by: Grygorii Strashko
> > ---
> > Hi All,
> >
> > First of all, sorry if my questi
On Fri, Feb 03, 2017 at 09:13:43AM -0800, Dalon Westergreen wrote:
> On Fri, 2017-02-03 at 11:05 -0600, Dinh Nguyen wrote:
> > Hi Dalon,
> >
> > On 02/01/2017 10:45 AM, Dalon Westergreen wrote:
> > >
> > > From: Dalon Westergreen
> > >
> > > Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
> >
On Fri, 2017-02-03 at 11:05 -0600, Dinh Nguyen wrote:
> Hi Dalon,
>
> On 02/01/2017 10:45 AM, Dalon Westergreen wrote:
> >
> > From: Dalon Westergreen
> >
> > Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
> > SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig.
> >
> > set to default y for socf
Hi Dalon,
On 02/01/2017 10:45 AM, Dalon Westergreen wrote:
> From: Dalon Westergreen
>
> Added SYS_MMCSD_RAW_MODE_U_BOOT_USE_PARTITION and
> SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION to Kconfig.
>
> set to default y for socfpga platforms, and add appropriate
> configurations for kc1, snipper, and db-
On Wed, Feb 01, 2017 at 02:51:47PM +0100, Jean-Jacques Hiblot wrote:
> The default values for the configuration defines CONFIG_ENV_SPI_xxx are
> arbitrary values. It makes more sense to set them to the values used by
> the sf command.
>
> Signed-off-by: Jean-Jacques Hiblot
Reviewed-by: Tom Rini
On Wed, Feb 01, 2017 at 11:53:42AM +0100, Jean-Jacques Hiblot wrote:
> Add qspi control module register maps to device tree. This register map had
> been removed by error when syncing the DTS with the latest linux at the
> time (commit 7aa1a4087 "ARM: dts: dra7xx: sync DT with latest Linux").
> Wi
On Wed, Feb 01, 2017 at 11:39:14AM +0100, Jean-Jacques Hiblot wrote:
> To keep a consistent MMC device mapping in SPL and in u-boot, let's
> register the MMC controllers the same way in u-boot and in the SPL.
> In terms of boot time, it doesn't hurt to register more controllers than
> needed becaus
On Tue, Jan 31, 2017 at 02:15:53PM -0600, Dan Murphy wrote:
> Pick commit 66b47b4a9dad0 checkpatch: look for common misspellings
> from the Linux kernel for spelling check from Kees Cook
>
> In addition pulled in additional changes
> commit ebfd7d6237531 checkpatch: add optional --codespell dicti
Hi,
On Fri, Feb 3, 2017 at 11:26 PM, Jagan Teki wrote:
> On Feb 1, 2017 2:37 AM, "Andre Przywara" wrote:
>
> The DRAM controller in the Allwinner H5 SoC is again very similar to
> the one in the H3 and A64.
> Based on the existing socid parameter, add support for this controller
> by reusing the
PMU is the power management unit and GRF is the general register file. Both
are heavily used in U-Boot. Add header files with register definitions.
Signed-off-by: Heiko Stuebner
Acked-by: Simon Glass
---
arch/arm/include/asm/arch-rockchip/grf_rk3188.h | 589
arch/arm/in
The rk3188 needs 3 uboot stages: a tpl living in 1KB of sram, a spl
the resides in the rest of the sram and loads the regular uboot living
in regular ram.
Signed-off-by: Heiko Stuebner
---
arch/arm/mach-rockchip/Makefile | 7 +-
arch/arm/mach-rockchip/rk3188-board-spl.c | 220 +++
Add a driver for setting up and modifying the various PLLs and peripheral
clocks on the RK3188.
Signed-off-by: Heiko Stuebner
---
arch/arm/include/asm/arch-rockchip/cru_rk3188.h | 191 +
drivers/clk/rockchip/Makefile | 1 +
drivers/clk/rockchip/clk_rk3188.c
Add a driver which supports pin multiplexing setup for the most commonly
used peripherals.
Signed-off-by: Heiko Stuebner
Acked-by: Simon Glass
---
drivers/pinctrl/Kconfig | 9 +
drivers/pinctrl/rockchip/Makefile | 1 +
drivers/pinctrl/rockchip/pinctrl_rk3188.c | 61
Hi,
this is meant as a status update and possible discussion for
the core parts if needed.
After talking with Simon and Tom the order is now also correct
with tpl -> spl -> uboot.
Status right now is:
- the full uboot still works
- the tpl/spl does start and is able to configure the ddr
into
The rk3188 shares a lot of peripherals with the rk3066 and thus
has a common include called rk3xxx.dtsi. Add both this one and
the specialized rk3188 on top of it.
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/rk3188.dtsi | 601 +++
arch/arm/dts/rk3xx
Add the core architecture code for the rk3188.
It doesn't support the SPL yet, as because of some
unknown error it doesn't start yet.
Signed-off-by: Heiko Stuebner
---
arch/arm/mach-rockchip/Kconfig| 16
arch/arm/mach-rockchip/Makefile | 5 ++
arch/arm/mach-
Right now the u-boot,dm-pre-reloc flag will make each marked node
always appear in both spl and tpl. But systems needing an additional
tpl might have special constraints for each, like the spl needing to
be very tiny.
So introduce two additional flags to mark nodes for only spl or tpl
environments
Add the entry for the rk3188 requiring rc4-encryption of the SPL.
Signed-off-by: Heiko Stuebner
---
tools/rkcommon.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tools/rkcommon.c b/tools/rkcommon.c
index ed9b24137a..6595e02c1c 100644
--- a/tools/rkcommon.c
+++ b/tools/rkcommon.c
@@ -57,6
The Rock is a RK3188 based single board computer by Radxa.
Currently it still relies on the proprietary DDR init and
cannot use the generic SPL, but at least is able to boot
a linux kernel and system up to a regular login prompt.
Signed-off-by: Heiko Stuebner
---
arch/arm/dts/Makefile
Right now the ROCKCHIP_SPL_BACK_TO_BROM option both triggers
compilation of the bootrom hook-code as well as enabling the
behaviour of loading the full uboot via the boot.
New added socs may always need the bootrom code, while still
being able to decide between loading uboot regularly or via
the b
Driver for the sysreset of Rockchip rk3188 socs.
Signed-off-by: Heiko Stuebner
---
drivers/sysreset/Makefile | 1 +
drivers/sysreset/sysreset_rk3188.c | 47 ++
2 files changed, 48 insertions(+)
create mode 100644 drivers/sysreset/sysreset_rk3188.c
Combines tpl, spl and uboot image in one flashable image.
---
mkuboot | 35 +++
1 file changed, 35 insertions(+)
create mode 100755 mkuboot
diff --git a/mkuboot b/mkuboot
new file mode 100755
index 00..42109b2b87
--- /dev/null
+++ b/mkuboot
@@ -0,0 +1,35 @
Bring in required device clock binding files from Linux.
The clock trees for rk3066 and rk3188 are largely similar, which makes
them share the common parts in a shared header. While we focus on rk3188
for now, bring in both headers already for completeness sake.
Signed-off-by: Heiko Stuebner
Acke
Add necessary structs to have the driver also work for the serial
on the rk3188.
Signed-off-by: Heiko Stuebner
---
drivers/serial/serial_rockchip.c | 19 ++-
1 file changed, 18 insertions(+), 1 deletion(-)
diff --git a/drivers/serial/serial_rockchip.c b/drivers/serial/serial_roc
Rockchip SoCs allow the spl code to be rc4-encoded, not only the
image header, but only newer SoCs allow this encoding to be disabled.
The rk3188 is not part of those and requires its boot code to be
rc4-encoded with the regular key. So add the ability to do this
encoding via a setting on a per-so
The sdram controller blocks are very similar to the rk3288 in utilizing
memory scheduler, Designware uPCTL and Designware PUBL blocks, only
limited to one bank instead of two.
There are some minimal differences when setting up the ram, so it gets
a separate driver for the rk3188 but reuses the dri
On Feb 1, 2017 2:37 AM, "Andre Przywara" wrote:
The DRAM controller in the Allwinner H5 SoC is again very similar to
the one in the H3 and A64.
Based on the existing socid parameter, add support for this controller
by reusing the bulk of the code and only deviating where needed.
These new bits se
From: Markus Niebel
Signed-off-by: Markus Niebel
---
include/configs/tqma6.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 9225bc1..1c0a762 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -291,7
The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.
Signed-off-by: Phil Edworthy
---
Resend with Albert's new email address - get_maintainer.pl gave the old one.
---
arch/arm/cpu/armv7m/Makefile| 2 +
arch/arm
From: Markus Niebel
The current driver stength is too high, leading to spec violations
on the falling edge. Fix it with values from HW
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/tqma6.c | 2 +-
board/tqc/tqma6/tqma6_mba6.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
di
From: Markus Niebel
Since the CS are not in use, do not map them. User of starterkit
mainboard is free to use them otherwise. When using these pins later
in the OS for instance as GPIO IRQ pin, they need to be input.
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/tqma6_mba6.c | 22 --
From: Markus Niebel
we have external ref clock from phy.
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/tqma6_mba6.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index 6d63953..1c5b953 100644
--- a/board/tqc/tqma6/tqma6_
From: Markus Niebel
PMIC implements proper I2C bus switching,
implement power_init_board instead handling in
board_late_init.
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/tqma6.c | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff --git a/board/tqc/tqma6/tq
From: Markus Niebel
fix the reset delay which was to short
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/tqma6_mba6.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/board/tqc/tqma6/tqma6_mba6.c b/board/tqc/tqma6/tqma6_mba6.c
index 02705be..6d63953 100644
--- a/board
From: Markus Niebel
Markus Niebel (5):
imx6: tqma6: implement power_init_board
imx6: tqma6: use lower driver stength for I2C pins
imx6: tqma6: disable spi CS unused in U-Boot
imx6: tqma6: adjust ethernet phy reset delay
mx6: tqma6: clear enet clk sel for mba6
board/tqc/tqma6/tqma6.c
From: Markus Niebel
Signed-off-by: Markus Niebel
---
include/configs/tqma6.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index 874b44b..311221d 100644
--- a/include/configs/tqma6.h
+++ b/include/configs/tqma6.h
@@ -295
From: Markus Niebel
there was a double bracketed var ref. fix this.
Signed-off-by: Markus Niebel
---
include/configs/tqma6.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index dce9c25..874b44b 100644
--- a/include/configs
From: Markus Niebel
depending on the use case different CMA sizes are
needed for linux. Add env var to enable passing CMA size
via kernel command line
Signed-off-by: Markus Niebel
---
include/configs/tqma6.h | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
diff --git a/include/c
From: Markus Niebel
Playing with USB-to-Ethernet dongles it turns out,
that these will not work with special settings
Signed-off-by: Markus Niebel
---
include/configs/tqma6.h | 4
1 file changed, 4 deletions(-)
diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h
index ceb4626.
From: Markus Niebel
need to add before div in mmc update scripts. Otherwise we could
write one block more ba acident
Signed-off-by: Markus Niebel
---
include/configs/tqma6.h | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/include/configs/tqma6.h b/include/confi
From: Markus Niebel
Markus Niebel (6):
arm: imx6: tqma6: add configurable CMA size
imx6: tqma6: rely on default setting for tftp and nfs
mx6: tqma6: fix typo in env
mx6: tqma6: add rootfsmode environment for mmc / sd
tqma6: fix rounding in env
tqma6: [cosmetic] sanitize environment d
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values
Changes identified in test setup makes the Rx compliance test pass
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Signed-off-by: Suresh Gupta
---
Changes in v2:
Clean up the c
From: Suresh Gupta
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receive
Compliance test failure for a 100mV threshold.
The changes shift the threshold from ~100mV towards ~130mV resulting
in passing of USB High Speed
From: Suresh Gupta
Rx Compliance tests may fail intermittently at high
jitter frequencies using default register values
Changes identified in test setup makes the Rx compliance test pass
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Signed-off-by: Suresh Gupta
---
Changes in v2:
The default setting for USB High Speed Squelch Threshold results
in a threshold close to or lower than 100mV. This leads to Receiver
Compliance test failure for a 100mV threshold.
The changes shift the threshold from ~100mV towards ~130mV resulting
in passing of USB High Speed Receiver Sensitivity
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXVREFTUNE value to 1001 is observed, change
set the same vale.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Signed-off-b
The patch set implement USB PHY errata workaround which are
required for LS series of freescale platforms which have
Synopsis UTMI PHY
Suresh Gupta (8):
armv8: Add workaround for USB erratum A-009008
armv8: Add workaround for USB erratum A-009798
armv8: Add workaround for USB erratum A-00899
From: Suresh Gupta
Low Frequency Periodic Signaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings
Change settings required for transmitter signal swings to pass
compliance tests.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Low Frequency Periodic Signaling (LFPS) Peak-to-Peak Differential
Output Voltage Test Compliance fails using default transmitter settings
Change settings required for transmitter signal swings to pass
compliance tests.
Signed-off-by: Sriram Dash
Signed-off-by: Rajesh Bhagat
Signed-off-by: Sures
From: Suresh Gupta
USB High Speed (HS) EYE Height Adjustment
USB HS speed eye diagram fails with the default value at
many corners, particularly at a high temperature
Optimal eye at TXVREFTUNE value to 1001 is observed, change
set the same value.
Signed-off-by: Sriram Dash
Signed-off-by: Sures
The SysTick is a 24-bit down counter that is found on all ARM Cortex
M3, M4, M7 devices and is always located at a fixed address.
Signed-off-by: Phil Edworthy
---
arch/arm/cpu/armv7m/Makefile| 2 +
arch/arm/cpu/armv7m/systick-timer.c | 91 +
2 files c
On 03/02/2017 14:10, Fabio Estevam wrote:
> Hi Stefano,
>
> On Fri, Jan 27, 2017 at 7:33 AM, Stefano Babic wrote:
>
>> This is orthogonal to the other patches in the series, and it was not
>> yet applied.
>
> Patch 1/3 :
> [U-Boot] [PATCH 1/3] mx6qsabreauto: Configure the WEIM controller like
>
From: Markus Niebel
The handler do_setdsr receives only the dsr parameter,
the action is parsed before.
Error was introduced when restructuring the mmc command
implementation in commit 1fd93c6e7d8a1e4d6261058cefab11b875ded252.
Reported-by: Michael Krummsdorf
Signed-off-by: Markus Niebel
---
From: Markus Niebel
This adds support for TQMa6DL using i.MX6DL and 1GiB DRAM
Since The module will use the same devicetree, we patch
the ram size in ft_board_setup.
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/Kconfig| 7 +++
board/tqc/tqma6/README | 3 +
board
From: Markus Niebel
Add support for the SOM variant featuring i.MX6DL. This needs a new
DCD config. The first patch is a small preparation.
Markus Niebel (2):
arm: imx6: tqma6: use CONFIG_TQM6x for SOM specific settings
arm: imx6: tqma6: add support for TQMa6DL variant
board/tqc/tqma6/Kcon
From: Markus Niebel
We have a Kconfig name for the module types. Let's Use it.
Some feature selections and configurations are based on the
module. Module selection selects the CPU type.
Signed-off-by: Markus Niebel
---
board/tqc/tqma6/tqma6_mba6.c | 13 +++--
include/configs/tqma6.h
This patch adds a pin controller driver supporting devices
using a single configuration register per pin.
Signed-off-by: Felix Brack
---
drivers/pinctrl/Kconfig | 10 +++
drivers/pinctrl/Makefile | 1 +
drivers/pinctrl/pinctrl-single.c | 138 ++
Hi Stefano,
On Fri, Jan 27, 2017 at 7:33 AM, Stefano Babic wrote:
> This is orthogonal to the other patches in the series, and it was not
> yet applied.
Patch 1/3 :
[U-Boot] [PATCH 1/3] mx6qsabreauto: Configure the WEIM controller like
the kernel
has not been applied as well.
_
Hi Jason
> I'm trying to make a small image enabling u-boot UMS mode on
> BeagleBone Black against the on-board eMMC. Is it possible to enable
> UMS simply within SPL?
As fair as I remember UMS is not supported in SPL.
However, recently there was an attempt to use the DFU gadget in SPL
(CONFIG_S
On Fri, 3 Feb 2017 07:14:02 -0500 (EST)
Robert P. J. Day rpj...@crashcourse.ca wrote:
> Signed-off-by: Robert P. J. Day
applied to u-boot-video/master, thanks!
--
Anatolij
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listi
CONFIG_SPL_STACK_SIZE is not a config option, so rename it.
Signed-off-by: Phil Edworthy
---
Not tested at all since I don't have the HW
---
include/configs/ti_armv7_keystone2.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/ti_armv7_keystone2.h
b/includ
Signed-off-by: Robert P. J. Day
---
diff --git a/drivers/video/cfb_console.c b/drivers/video/cfb_console.c
index a4cbc44..3c0696e 100644
--- a/drivers/video/cfb_console.c
+++ b/drivers/video/cfb_console.c
@@ -1968,7 +1968,7 @@ static void *video_logo(void)
static int cfb_fb_is_in_dram(void)
{
On 03/02/17 10:41, Keerthy wrote:
Fix smps6 - smps9 indices
I think this could use a better commit message. What, why?
-Tero
Signed-off-by: Keerthy
---
drivers/power/regulator/palmas_regulator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/regulator/pa
This trivial patch fixes a typo in the board config of the AM3517
CraneBoard: CONGIG_CMD_STORAGE -> CONFIG_CMD_STORAGE
Signed-off-by: Lars Poeschel
---
include/configs/am3517_crane.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/include/configs/am3517_crane.h b/include/conf
I'm trying to make a small image enabling u-boot UMS mode on BeagleBone
Black against the on-board eMMC. Is it possible to enable UMS simply within
SPL?
It seems like some others have done it in the past (
http://lists.denx.de/pipermail/u-boot/2015-March/207600.html), but I don't
see an obvious wa
Hi Jagan,
thanks for the review!
On 03/02/17 11:04, Jagan Teki wrote:
> On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
>> Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB,
>> while the first SRAM region is mapped at address 0.
>> With the extended physical memory sup
Moves sec_init to board_init rather than in misc_init function beacuse
PPA will be initialised in board_init function and for PPA validation
sec_init has to be done prior to PPA init.
Signed-off-by: Sumit Garg
Signed-off-by: Udit Agarwal
---
board/freescale/ls2080aqds/ls2080aqds.c | 6 +++---
b
The array indices used currently are dispalaced by 1 for
SMPS6 through SMPS10 in the respective places of voltage and ctrl
arrays hence fix the same as to assign the right voltage and ctrl
registers.
Signed-off-by: Keerthy
---
Changes in v2:
* Elaborated the commit log.
drivers/power/regula
On Friday 03 February 2017 04:57 PM, Tero Kristo wrote:
On 03/02/17 10:41, Keerthy wrote:
Fix smps6 - smps9 indices
I think this could use a better commit message. What, why?
Okay Tero.
-Tero
Signed-off-by: Keerthy
---
drivers/power/regulator/palmas_regulator.c | 2 +-
1 file chang
Add header address for PPA to be validated during ESBC phase for LS2080A
platform based on Layescape Chasis 3.
Signed-off-by: Sumit Garg
Signed-off-by: Udit Agarwal
---
arch/arm/include/asm/fsl_secure_boot.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/arch/arm/include/asm/fsl_secure_b
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
> The OrangePi PC 2 is a typical SBC with the 64-bit Allwinner H5 SoC.
> Create a new .dts file for it by including the (32-bit) H3 SoC .dtsi
> and changing the differing components accordingly.
> This is a preliminary device tree mostly for U-
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
> Addresses passed on to readl and writel are expected to be of the same
> size as a pointer. Change the parameter types of sunxi_spi0_read_data()
> to make the compiler happy and allow a warning-free aarch64 compile.
>
> Signed-off-by: Andre P
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
> Every armv8 board needs the memory map, so change the #ifdef to
> ARM64 to avoid enumerating every single board or SoC.
>
> Signed-off-by: Andre Przywara
> Acked-by: Maxime Ripard
> ---
> arch/arm/mach-sunxi/board.c | 2 +-
> 1 file change
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
> Traditionally Allwinner SoCs have their boot ROM mapped just below 4GB,
> while the first SRAM region is mapped at address 0.
> With the extended physical memory support of the A80 this was changed,
> so the BROM is now at address 0 and the S
On Thu, Feb 2, 2017 at 1:25 PM, Maxime Ripard
wrote:
> On Wed, Feb 01, 2017 at 01:36:02AM +, Andre Przywara wrote:
>> For some reason we were pretty conservative when defining the maximum
>> SPL size for the Allwinner A80(sun9i) SoC.
>> According to the manual the SRAM A1 is even 40KB, but the
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
> Instead of enumerating all SoC families that need that bit set, let's
> just express this more clearly: The SMP bits needs to be set on
> SMP capable ARMv7 CPUs. It's much easier in Kconfig to express it the
> other way round, so we use ! CPU
On Wed, Feb 1, 2017 at 2:36 AM, Andre Przywara wrote:
> Some Freescale boards used an extra version of the constant to hold the
> Generic Timer frequency. This can easily be covered by the now unified
> COUNTER_FREQUENCY constant, so remove this extra variable from those
> boards.
>
> Signed-off-b
CONFIG_SPL_STACK_SIZE is not a config option, so rename it.
Signed-off-by: Phil Edworthy
---
include/configs/microblaze-generic.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/include/configs/microblaze-generic.h
b/include/configs/microblaze-generic.h
index 24de528..cf
How does PHY less ethernet work on x86 u-boot? In powerpc we have the
device tree where one can express a "fixed-link", does this work for x86 too?
Jocke
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Hello Sean,
On Fri, Feb 3, 2017 at 8:26 AM, Sean Felipe Wolfe wrote:
> Hello!
>
> I own a couple HP Chromebook 11's, model SPRING-G3A-B3S-Q2F, the kind which
> only charge from the micro usb. I would like to erase ChromeOS and install
> only Linux. Is this possible?
>
Yes it is possible.
Remembe
Fix smps6 - smps9 indices
Signed-off-by: Keerthy
---
drivers/power/regulator/palmas_regulator.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/power/regulator/palmas_regulator.c
b/drivers/power/regulator/palmas_regulator.c
index cce7cd2..399f7a5 100644
--- a/drivers
Apply the previous setting for the reserved bits in SetDes Test and System Mode
Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test
Tested on Advantech DMS-BA16 board
Tested-by: Ken Lin
Signed-off-by: Ken Lin
---
drivers/net/phy/atheros.c | 8
1
Hello!
I own a couple HP Chromebook 11's, model SPRING-G3A-B3S-Q2F, the kind which
only charge from the micro usb. I would like to erase ChromeOS and install
only Linux. Is this possible?
I've already installed Ubuntu via crouton, but I am curious if it is
possible to lose the ChromeOS altogether
Apply the previous setting for the reserved bits in SetDes Test and System Mode
Control register
to avoid the voltage peak issue while we do the IEEE PHY comformance test
Signed-off-by: ken Lin
Tested on Advantech DMS-BA16 board
Tested-by: Ken Lin
---
drivers/net/phy/atheros.c | 6 ++
1 fi
1 - 100 of 103 matches
Mail list logo
