On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> Rename qemu/acpi_table.c to qemu/e820.c, because ACPI stuff is moved
> to qfw core, this file only contains code for installing e820 table.
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> ---
> Changes in v3:
> - none
>
> arch/x86/cpu/q
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> The qfw command interface used to depend on X86, this patch removes
> this restriction so it can be built for sandbox for testing. For normal
> usage, it can only be used with CONFIG_QEMU.
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> -
On Mon, May 23, 2016 at 1:37 PM, Bin Meng wrote:
> On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
>> This patch enables qfw and cmd_qfw on sandbox for build coverage test
>>
>> Signed-off-by: Miao Yan
>> ---
>> Changes in v3:
>> - fix config option order
>>
>> configs/sandbox_defconfig | 2
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> The qfw command interface makes use of CONFIG_LOADADDR and
> CONFIG_RAMDISKADDR to setup kernel. But not all boards have these macros,
> which causes build problem on those platforms.
>
> This patch fixes this issue.
>
> Signed-off-by: Miao Yan
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> Loading ACPI table from QEMU's fw_cfg interface is not x86 specific
> (ARM64 may also make use of it). So move the code to common place.
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> ---
> Changes in v3:
> - none
>
> arch/x86/cpu/qemu
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> ---
> Changes in v3:
> - squash with patch v2 #13
>
> arch/x86/cpu/mp_init.c| 2 +-
> arch/x86/cpu/qemu/acpi_t
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> This patch adds some comments about qfw register endianness for clarity.
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> ---
> Changes in v3:
> - none
>
> arch/x86/cpu/qemu/qemu.c | 9 -
> 1 file changed, 8 insertions(+), 1 dele
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> This patch splits qfw command interface and qfw core function into two
> files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.
>
> Now when qfw command interface is enabled, it will automatically select
> qfw core. This patch also
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> The original implementation of qfw includes several x86 specific
> operations, like directly calling outb/inb and using some inline
> assembly code which prevents it being ported to other architectures.
>
> This patch adds callback functions and
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> This patch is part of the refactor work of qfw. It adds 3 APIs to qfw
> core to iterate firmware list.
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> ---
> Changes in v3:
> - none
>
> cmd/qemu_fw_cfg.c | 25 ++--
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> This patch is part of the qfw refactor work. This patch makes
> qemu_fwcfg_present() and qemu_fwcfg_dma_present() public functions.
>
> Signed-off-by: Miao Yan
> Reviewed-by: Bin Meng
> ---
> Changes in v3:
> - none
>
> cmd/qemu_fw_cfg.c
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> This patch is part of the qfw refactor work.
>
> The qemu_fwcfg_free_files() function is only used in error handling in
> ACPI table generation, let's not make this a core function and move it
> to the right place.
>
> Signed-off-by: Miao Yan
>
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which
> uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether
> to load ACPI table from QEMU's fw_cfg interface.
>
> But with commit "697ec431469ce0a4c2fc2c02d
On Mon, May 23, 2016 at 10:37 AM, Miao Yan wrote:
> This patch enables qfw and cmd_qfw on sandbox for build coverage test
>
> Signed-off-by: Miao Yan
> ---
> Changes in v3:
> - fix config option order
>
> configs/sandbox_defconfig | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/confi
On 22.05.2016 10:45, Bin Meng wrote:
Update board device tree to include latest microcode.
Signed-off-by: Bin Meng
Reviewed-by: Stefan Roese
Thanks,
Stefan
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This patch enables qfw and cmd_qfw on sandbox for build coverage test
Signed-off-by: Miao Yan
---
Changes in v3:
- fix config option order
configs/sandbox_defconfig | 2 ++
1 file changed, 2 insertions(+)
diff --git a/configs/sandbox_defconfig b/configs/sandbox_defconfig
index afdf4a3..4cc3a1
The qfw command interface makes use of CONFIG_LOADADDR and
CONFIG_RAMDISKADDR to setup kernel. But not all boards have these macros,
which causes build problem on those platforms.
This patch fixes this issue.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
cmd/qfw.c |
The qfw command interface used to depend on X86, this patch removes
this restriction so it can be built for sandbox for testing. For normal
usage, it can only be used with CONFIG_QEMU.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
cmd/Kconfig | 1 -
1 file changed, 1
Loading ACPI table from QEMU's fw_cfg interface is not x86 specific
(ARM64 may also make use of it). So move the code to common place.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
arch/x86/cpu/qemu/acpi_table.c | 209 -
driver
Rename qemu/acpi_table.c to qemu/e820.c, because ACPI stuff is moved
to qfw core, this file only contains code for installing e820 table.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
arch/x86/cpu/qemu/Makefile | 3 +--
arch/x86/cpu/qemu/{acpi_table.c
The original implementation of qfw includes several x86 specific
operations, like directly calling outb/inb and using some inline
assembly code which prevents it being ported to other architectures.
This patch adds callback functions and moves those to arch/x86/
Signed-off-by: Miao Yan
Reviewed-
Make file names consistent with CONFIG_QFW and CONFIG_CMD_QFW
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- squash with patch v2 #13
arch/x86/cpu/mp_init.c| 2 +-
arch/x86/cpu/qemu/acpi_table.c| 2 +-
arch/x86/cpu/qemu/cpu.c | 2 +-
a
This patch splits qfw command interface and qfw core function into two
files, and introduces a new Kconfig option (CONFIG_QFW) for qfw core.
Now when qfw command interface is enabled, it will automatically select
qfw core. This patch also makes the ACPI table generation select
CONFIG_QFW.
Signed-
This patch is part of the qfw refactor work.
The qemu_fwcfg_free_files() function is only used in error handling in
ACPI table generation, let's not make this a core function and move it
to the right place.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
arch/x86/cpu/
This patch is part of the qfw refactor work. This patch makes
qemu_fwcfg_present() and qemu_fwcfg_dma_present() public functions.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
cmd/qemu_fw_cfg.c | 37 -
include/qemu_fw_cfg.h |
This patch adds some comments about qfw register endianness for clarity.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
arch/x86/cpu/qemu/qemu.c | 9 -
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/arch/x86/cpu/qemu/qemu.c b/arch/x86/cpu/qemu/qe
CONFIG_GENENRATE_ACPI_TABLE controls the generation of ACPI table which
uses U-Boot's built-in methods and CONFIG_QEMU_ACPI_TABLE controls whether
to load ACPI table from QEMU's fw_cfg interface.
But with commit "697ec431469ce0a4c2fc2c02d8685d907491af84 x86: qemu: Drop
our own ACPI implementation"
This patch is part of the refactor work of qfw. It adds 3 APIs to qfw
core to iterate firmware list.
Signed-off-by: Miao Yan
Reviewed-by: Bin Meng
---
Changes in v3:
- none
cmd/qemu_fw_cfg.c | 25 ++---
include/qemu_fw_cfg.h | 9 +
2 files changed, 31 insertio
This patchset cleans the QEMU fw_cfg code:
*) split qfw core and qfw command interface
*) split x86 specific operations from qfw core
*) move x86 ACPI generation code into qfw core as this can also
be used by others like ARM64
*) various cleanups
Changes in v2:
*) make git format-
On 22 May 2016 at 02:45, Bin Meng wrote:
> After power-on, both LAPIC and I/O APIC appear with the same APIC ID
> zero, which creates an ID conflict. When generating MP table, U-Boot
> reports zero as the LAPIC ID in the processor entry, and zero as the
> I/O APIC ID in the I/O APIC as well as the
On 22 May 2016 at 02:45, Bin Meng wrote:
> Now that we have added CPU uclass driver and fixed the IOAPIC ID
> conflict, enable MP table generation so that IOAPIC can be used
> by the Linux kernel.
>
> Signed-off-by: Bin Meng
> ---
>
> configs/galileo_defconfig | 1 +
> 1 file changed, 1 insertio
On 22 May 2016 at 02:45, Bin Meng wrote:
> Override the default product name U-Boot reports in the SMBIOS
> table, to be compatible with the Intel provided UEFI BIOS, as
> Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
> drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
>
On 22 May 2016 at 02:45, Bin Meng wrote:
> Make use of the newly added Kconfig options of board manufacturer
> and product name to write SMBIOS tables.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/lib/smbios.c | 10 +-
> 1 file changed, 5 insertions(+), 5 deletions(-)
Reviewed-by: Sim
On 22 May 2016 at 02:45, Bin Meng wrote:
> This introduces two Kconfig options to be used by SMBIOS tables:
> board manufacturer and product name.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/Kconfig | 16
> 1 file changed, 16 insertions(+)
Reviewed-by: Simon Glass
_
On 22 May 2016 at 02:45, Bin Meng wrote:
> Currently ID 2 is assgined to broadwell I/O APIC, however per
> chromebook_samus.dts 2 is the core#2 LAPIC ID. Now we change
> I/O APIC ID to 4 to avoid conflict.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/broadwell/pch.c | 3 ++-
> 1 file chang
On 22 May 2016 at 02:45, Bin Meng wrote:
> At present LAPIC is enabled and configured as virtual wire mode
> in lapic_setup() only when CONFIG_SMP is on. This limitation is
> however not necessary as for uniprocessor this is still needed.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/lapic.
On 22 May 2016 at 02:45, Bin Meng wrote:
> Add a cpu node in the device tree and enable CPU driver.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/dts/galileo.dts | 12
> configs/galileo_defconfig | 2 ++
> 2 files changed, 14 insertions(+)
Reviewed-by: Simon Glass
_
On 22 May 2016 at 02:45, Bin Meng wrote:
> Update BayTrail microcde to rev 325 (for CPUID 30673), rev 907
> (for CPUID 30679).
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/dts/microcode/m0130673322.dtsi | 3284
> ---
> arch/x86/dts/microcode/m0130673325.dtsi | 3284
On 22 May 2016 at 02:45, Bin Meng wrote:
> Intel Quark processor core provides an integrated Local APIC but
> does not support the IA32_APIC_BASE MSR. As a result, the Local
> APIC is always globally enabled and the Local APIC base address
> is fixed at 0xfee0. Attempting to access the IA32_AP
On 22 May 2016 at 02:45, Bin Meng wrote:
> For boards that support ACPI, there are dsdt.aml, dsdt.asl.tmp and
> dsdt.c in the board directory after a successful build. These are
> intermediate files generated by IASL, and should be removed during
> a 'make clean'.
>
> Signed-off-by: Bin Meng
> --
On 22 May 2016 at 02:45, Bin Meng wrote:
> MRC cache relies on Intel FSP to produce a special GUID that
> contains the MRC cache data. Add such information in the
> CONFIG_ENABLE_MRC_CACHE help entry.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/Kconfig | 7 +++
> 1 file changed, 7 inserti
On 22 May 2016 at 02:45, Bin Meng wrote:
> Update board device tree to include latest microcode.
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/dts/bayleybay.dts | 4 ++--
> arch/x86/dts/conga-qeval20-qa3-e3845.dts | 4 ++--
> arch/x86/dts/minnowmax.dts | 4 ++--
> 3
On 22 May 2016 at 02:45, Bin Meng wrote:
> Let's configure LAPIC in a common place - interrupt_init().
>
> Signed-off-by: Bin Meng
> ---
>
> arch/x86/cpu/interrupts.c| 8 +---
> arch/x86/cpu/ivybridge/model_206ax.c | 2 --
> arch/x86/cpu/mp_init.c | 2 --
> 3 files
On 22 May 2016 at 02:45, Bin Meng wrote:
> It is observed that when enabling boot stage support, occasionally
> the board reboots during boot over and over again, and eventually
> boots to shell. This was seen on my board, but not on Jian's board.
> Debugging shows that the TSC timer calibration a
just noticed that this is all that's left of "bcopy":
$ grep -rw bcopy *
arch/powerpc/lib/ppcstring.S: .globl bcopy
arch/powerpc/lib/ppcstring.S:bcopy:
arch/microblaze/include/asm/string.h:extern void bcopy (const char *, char *,
int);
include/linux/string.h:char *bcopy(const char *src, cha
first, what is the recommended location for kernel-doc -- the header
files or the source files -- because i'm currently perusing
lib/libfdt/*.c, and the kernel-doc seems to be scattered across both
locations. does u-boot have a preference?
next. some of the kernel-doc is incorrect or invalid.
Dear 李 亮,
In message
you wrote:
>
> I want to test the u-boot for lwmon5 board,but I need this board,do you sell
> it?
The lwmon5 Board is integral part of a (big) machine manufactured
and sold by one of our customers. You cannot buy this board. If you
are looking for something similar, y
Dear:
I want to test the u-boot for lwmon5 board,but I need this board,do you sell it?
发自我的 Windowsphone
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On Sun, May 22, 2016 at 02:26:28PM +0900, Yoshinori Sato wrote:
> On Sat, 21 May 2016 10:28:42 +0900,
> Tom Rini wrote:
> >
> > [1 ]
> > On Thu, May 19, 2016 at 09:26:46PM +0900, Yoshinori Sato wrote:
> >
> > > Hello.
> > > This patch series convert generic board for SH.
> > > Tested on r2dplus
Don't use /** openings for non-kernel-doc content, as it breaks the
processing of that file.
Signed-off-by: Robert P. J. Day
---
diff --git a/include/linker_lists.h b/include/linker_lists.h
index 76898ab..731ec29 100644
--- a/include/linker_lists.h
+++ b/include/linker_lists.h
@@ -21,7 +21,7 @
was unaware there was an official "Example:" section name.
rday
--
Robert P. J. Day Ottawa, Ontario, CANADA
http://crashcourse.ca
Twitter:
Repair two types of erroneous kernel-doc content in this header file
that prevents it from being processed.
* Remove "/**" comment style from non-kernel-doc content.
* Remove colons, which in kernel-doc define a new section.
Signed-off-by: Robert P. J. Day
---
i'll have more to say abou
On 05/22/2016 01:35 PM, Wills Wang wrote:
>
>
> On 05/22/2016 07:13 PM, Marek Vasut wrote:
>> On 05/22/2016 05:59 AM, Wills Wang wrote:
>>> Use function "ddr_init" for ath79 platform DDR initialization,
>>> and put it into mach/ddr.h
>>>
>>> Signed-off-by: Wills Wang
>>> ---
>>>
>>> arch/mips/
On 05/22/2016 07:13 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
Use function "ddr_init" for ath79 platform DDR initialization,
and put it into mach/ddr.h
Signed-off-by: Wills Wang
---
arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
arch/mips/mach-ath79/ar934x/ddr.c
On 05/22/2016 01:29 PM, Wills Wang wrote:
>
>
> On 05/22/2016 07:08 PM, Marek Vasut wrote:
>> On 05/22/2016 05:59 AM, Wills Wang wrote:
>>> Collect all reset operation on platform and move them into a uniform
>>> header
>>>
>>> Signed-off-by: Wills Wang
>>> ---
>>>
>>> arch/mips/mach-ath79/inc
On 05/22/2016 07:08 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
Collect all reset operation on platform and move them into a uniform header
Signed-off-by: Wills Wang
---
arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
arch/mips/mach-ath79/include/mach/reset.h | 2
On 05/22/2016 07:15 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
GCC 5.3 report a warning: 'upper' and 'lower' may be used
uninitialized in this function [-Wmaybe-uninitialized].
Compiler might need explicit initializer.
Signed-off-by: Wills Wang
---
arch/mips/mach-ath
On 05/22/2016 07:05 PM, Marek Vasut wrote:
On 05/22/2016 05:59 AM, Wills Wang wrote:
We need reset the Ethernet Switch analog part before operation,
or the build-in Ethernet PHY don't work.
Signed-off-by: Wills Wang
---
So what changed in V2 here ?
I change commit message according to dani
On 05/22/2016 05:59 AM, Wills Wang wrote:
> GCC 5.3 report a warning: 'upper' and 'lower' may be used
> uninitialized in this function [-Wmaybe-uninitialized].
> Compiler might need explicit initializer.
>
> Signed-off-by: Wills Wang
> ---
>
> arch/mips/mach-ath79/ar933x/ddr.c | 2 ++
> 1 file
On 05/22/2016 05:59 AM, Wills Wang wrote:
> Collect all reset operation on platform and move them into a uniform header
>
> Signed-off-by: Wills Wang
> ---
>
> arch/mips/mach-ath79/include/mach/ath79.h | 3 ---
> arch/mips/mach-ath79/include/mach/reset.h | 2 ++
> board/tplink/wdr4300/wdr4300.c
On 05/22/2016 05:59 AM, Wills Wang wrote:
> Use function "pll_init" for ath79 platform PLL initialization,
> and put it into mach/clk.h
>
> Signed-off-by: Wills Wang
> ---
>
> arch/mips/mach-ath79/ar934x/clk.c | 2 +-
> arch/mips/mach-ath79/include/mach/ath79.h | 2 --
> arch/mips/mac
On 05/22/2016 05:59 AM, Wills Wang wrote:
> This patch enable network function for ap121 board, it's based on
> the coming ethernet driver ag7xxx.
>
> Signed-off-by: Wills Wang
> ---
Acked-by: Marek Vasut
> arch/mips/dts/ap121.dts | 5 +
> arch/mips/dts/ar933x.dtsi | 4 ++--
> board/qca
On 05/22/2016 05:59 AM, Wills Wang wrote:
> Add a platform prefix for function name in order to make more readable
>
> Signed-off-by: Wills Wang
> ---
>
> arch/mips/mach-ath79/ar933x/clk.c | 2 +-
> arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
> arch/mips/mach-ath79/ar934x/clk.c
On 05/22/2016 05:59 AM, Wills Wang wrote:
> Use function "ddr_init" for ath79 platform DDR initialization,
> and put it into mach/ddr.h
>
> Signed-off-by: Wills Wang
> ---
>
> arch/mips/mach-ath79/ar933x/ddr.c | 2 +-
> arch/mips/mach-ath79/ar934x/ddr.c | 2 +-
> arch/mips/mach-
On 05/22/2016 05:59 AM, Wills Wang wrote:
> We need reset the Ethernet Switch analog part before operation,
> or the build-in Ethernet PHY don't work.
>
> Signed-off-by: Wills Wang
> ---
So what changed in V2 here ?
> arch/mips/mach-ath79/include/mach/ar71xx_regs.h | 1 +
> arch/mips/mach-ath7
Signed-off-by: Robert P. J. Day
---
diff --git a/tools/.gitignore b/tools/.gitignore
index ff07680..cb1e722 100644
--- a/tools/.gitignore
+++ b/tools/.gitignore
@@ -1,4 +1,5 @@
/atmel_pmecc_params
+/bin2header
/bmp_logo
/envcrc
/fdtgrep
--
i note that, at the bottom of the image_setup_libfdt() routine in
common/image-fdt.c, there is some special processing for a particular
SoC:
#if defined(CONFIG_SOC_KEYSTONE)
if (IMAGE_OF_BOARD_SETUP)
ft_board_setup_ex(blob, gd->bd);
#endif
first, it seems kind of ..
Currently ID 2 is assgined to broadwell I/O APIC, however per
chromebook_samus.dts 2 is the core#2 LAPIC ID. Now we change
I/O APIC ID to 4 to avoid conflict.
Signed-off-by: Bin Meng
---
arch/x86/cpu/broadwell/pch.c | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/arch/x86/
This introduces two Kconfig options to be used by SMBIOS tables:
board manufacturer and product name.
Signed-off-by: Bin Meng
---
arch/x86/Kconfig | 16
1 file changed, 16 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
index c57b99d..3c015c7 100644
--- a/arch/x
At present LAPIC is enabled and configured as virtual wire mode
in lapic_setup() only when CONFIG_SMP is on. This limitation is
however not necessary as for uniprocessor this is still needed.
Signed-off-by: Bin Meng
---
arch/x86/cpu/lapic.c | 7 +--
1 file changed, 1 insertion(+), 6 deletio
Make use of the newly added Kconfig options of board manufacturer
and product name to write SMBIOS tables.
Signed-off-by: Bin Meng
---
arch/x86/lib/smbios.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/arch/x86/lib/smbios.c b/arch/x86/lib/smbios.c
index 441fca9
Override the default product name U-Boot reports in the SMBIOS
table, to be compatible with the Intel provided UEFI BIOS, as
Linux kernel drivers (drivers/mfd/intel_quark_i2c_gpio.c and
drivers/net/ethernet/stmicro/stmmac/stmmac_pci.c) make use of
it to do different board level configuration.
Sign
Now that we have added CPU uclass driver and fixed the IOAPIC ID
conflict, enable MP table generation so that IOAPIC can be used
by the Linux kernel.
Signed-off-by: Bin Meng
---
configs/galileo_defconfig | 1 +
1 file changed, 1 insertion(+)
diff --git a/configs/galileo_defconfig b/configs/gal
Intel Quark processor core provides an integrated Local APIC but
does not support the IA32_APIC_BASE MSR. As a result, the Local
APIC is always globally enabled and the Local APIC base address
is fixed at 0xfee0. Attempting to access the IA32_APIC_BASE
MSR causes a general protection fault.
Si
After power-on, both LAPIC and I/O APIC appear with the same APIC ID
zero, which creates an ID conflict. When generating MP table, U-Boot
reports zero as the LAPIC ID in the processor entry, and zero as the
I/O APIC ID in the I/O APIC as well as the I/O interrupt assignment
entries. Such MP table c
Let's configure LAPIC in a common place - interrupt_init().
Signed-off-by: Bin Meng
---
arch/x86/cpu/interrupts.c| 8 +---
arch/x86/cpu/ivybridge/model_206ax.c | 2 --
arch/x86/cpu/mp_init.c | 2 --
3 files changed, 5 insertions(+), 7 deletions(-)
diff --git a/arc
Add a cpu node in the device tree and enable CPU driver.
Signed-off-by: Bin Meng
---
arch/x86/dts/galileo.dts | 12
configs/galileo_defconfig | 2 ++
2 files changed, 14 insertions(+)
diff --git a/arch/x86/dts/galileo.dts b/arch/x86/dts/galileo.dts
index f784c50..da3cbff 100644
This series include various updates and fixes to x86 support.
A major update is Intel Quark support, that MP table generation
is enabled and working well with Linux kernel.
This series is available at u-boot-x86/misc-working for testing.
Bin Meng (15):
acpi: Clean IASL generated intermediate
MRC cache relies on Intel FSP to produce a special GUID that
contains the MRC cache data. Add such information in the
CONFIG_ENABLE_MRC_CACHE help entry.
Signed-off-by: Bin Meng
---
arch/x86/Kconfig | 7 +++
1 file changed, 7 insertions(+)
diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig
i
For boards that support ACPI, there are dsdt.aml, dsdt.asl.tmp and
dsdt.c in the board directory after a successful build. These are
intermediate files generated by IASL, and should be removed during
a 'make clean'.
Signed-off-by: Bin Meng
---
Makefile | 1 +
1 file changed, 1 insertion(+)
dif
Update board device tree to include latest microcode.
Signed-off-by: Bin Meng
---
arch/x86/dts/bayleybay.dts | 4 ++--
arch/x86/dts/conga-qeval20-qa3-e3845.dts | 4 ++--
arch/x86/dts/minnowmax.dts | 4 ++--
3 files changed, 6 insertions(+), 6 deletions(-)
diff --git
It is observed that when enabling boot stage support, occasionally
the board reboots during boot over and over again, and eventually
boots to shell. This was seen on my board, but not on Jian's board.
Debugging shows that the TSC timer calibration against PIT fails
as boot stage APIs utilize timer
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