2015-04-25 1:04 GMT+02:00 Bin Meng :
> Hi Francesco,
>
> On Fri, Apr 24, 2015 at 3:20 PM, Francesco Lucconi
> wrote:
> > I'm Francesco Lucconi from Italy, and I'm involved into a x86 project
> where
> > my issue is to compile a u-boot (I'm currently using uboot-2015.01) and
> to
> > install it in
Intel Quark SoC has the same interrupt routing mechanism as the
Queensbay platform, only the difference is that PCI devices'
INTA/B/C/D are harcoded and cannot be changed freely.
Signed-off-by: Bin Meng
---
arch/x86/cpu/quark/Makefile | 2 +-
arch/x86/cpu/quark/irq.c
By default the legacy segments (Ah-Bh, Eh-Fh)
do not decode to system RAM. Turn on the decode so that we can
write configuration tables in the F segment.
Signed-off-by: Bin Meng
---
arch/x86/cpu/quark/quark.c | 12
arch/x86/include/asm/arch-quark/quark.
Previously the PIRQ routing table sanity check was performed against
the original table provided by the platform codes. Now we switch to
check its sanity on the final table in the F segment as this one is
the one seen by the OS.
Signed-off-by: Bin Meng
---
arch/x86/lib/pirq_routing.c | 18 +
On Mon 2015-04-27 03:08:27, Marek Vasut wrote:
> On Saturday, April 25, 2015 at 09:36:16 PM, Pavel Machek wrote:
> > Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add
> > support for it.
> >
> > Signed-off-by: Pavel Machek
> >
> > diff --git a/arch/arm/dts/socfpga_arria5_s
> -Original Message-
> From: Marek Vasut [mailto:ma...@denx.de]
> Sent: Friday, April 24, 2015 9:00 AM
> To: Mehresh Ramneek-B31383
> Cc: u-boot@lists.denx.de
> Subject: Re: [PATCH 3/4][v2]include:configs:ls1021atwr: Enable USB IP
> support
>
> On Thursday, April 23, 2015 at 07:03:14 PM,
Hi All,
I want to know whether we have FAT file system formatting support in u-boot?
I would like to format my SD card from u-boot.
Regards,
Siva
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From: Daniel Schwierzeck
add MTD layer driver for spi, original patch from:
http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced
changes from Heiko Schocher against this patch:
- remove compile error if not defining CONFIG_SPI_FLASH_MTD:
LD
move common functions from cmd_nand.c (for calculating offset
and size from cmdline paramter) to common place, so they could
used from other commands which use mtd partitions.
For onenand the arg_off_size() is left in common/cmd_onenand.c.
It should use now the common arg_off() function, but as I
if flash pointer is used free it, before probing a new
flash and storing it in flash.
Signed-off-by: Heiko Schocher
---
Changes in v6:
- add comments from Jagan Teki:
new patch in this patchserie, extract this piece
of code into a new patch.
Changes in v2: None
common/cmd_sf.c | 5 +
with this patch, it is possible to get the offset and size information
from the mtdpartiton setting in "mtdparts", similiar to the
"nand" commandos.
=> sf
sf - SPI flash sub-system
Usage:
sf probe [[bus:]cs] [hz] [mode] - init flash device on given SPI bus
and ch
This patchserie add the popssibility to define mtd partitions on
spi nor flash, and use this settings with the sf commands.
steps:
- add MTD layer driver for spi, original patch from:
http://git.denx.de/?p=u-boot/u-boot-mips.git;a=commitdiff;h=bb246819cdc90493dd7089eaa51b9e639765cced
and addap
Hi Jagan,
On Fri, Apr 24, 2015 at 5:43 PM, Jagannadha Sutradharudu Teki
wrote:
> Upto now flash sector_size is assigned from params which isn't
> necessarily a sector size from vendor, so based on the SECT_*
> flags from flash_params the erase_size will compute and it will
> become the sector_siz
On Sat, Apr 25, 2015 at 11:04 PM, Simon Glass wrote:
> Now that reset_cpu() functions correctly, use it instead of directly
> accessing the port on boards that use a Firmware Support Package (FSP).
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/lib/fsp/fsp_common.c | 7 ---
> 1 file chang
On Sat, Apr 25, 2015 at 11:04 PM, Simon Glass wrote:
> Now that reset_cpu() functions correctly, use it instead of directly
> accessing the port.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/quark/quark.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/arch/x86/
Hi Simon,
On Sat, Apr 25, 2015 at 11:04 PM, Simon Glass wrote:
> Now that reset_cpu() functions correctly, use it instead of directly
> accessing the port.
>
> Signed-off-by: Simon Glass
> ---
>
> arch/x86/cpu/ivybridge/cpu.c | 5 ++---
> arch/x86/cpu/ivybridge/early_me.c | 7 +++
> ar
Hi Simon,
On Sat, Apr 25, 2015 at 11:04 PM, Simon Glass wrote:
> The existing code is pretty ancient and is unreliable on modern hardware.
> Generally it will hang.
>
> We can use port 0xcf9 to initiate reset on more modern hardware (say in the
> last 10 years). Update the reset_cpu() function to
Hi.
Sorry for my late reply.
2015-04-24 0:38 GMT+09:00 York Sun :
> Resend with corrected email address.
>
> +Masahiro Yamada
>
> On 04/23/2015 01:27 AM, Liu Shengzhou-B36685 wrote:
>>
>>> -Original Message-
>>> From: Sun York-R58495
>>> Sent: Friday, April 17, 2015 3:22 AM
>>> To: Liu Sh
On 4/24/2015 11:55 PM, Simon Glass wrote:
> Hi Haikun,
>
> On 24 April 2015 at 07:22, Haikun Wang wrote:
>> Atmel DataFlash chips have commands different from common spi
>> flash commands.
>> Atmel DataFlash also have special page-size.
>> This driver add support for accessing Atmel DataFlash.
>>
On Friday, March 27, 2015 at 09:47:25 AM, Hans de Goede wrote:
> Hi,
Hi!
[...]
> >
> > scanning usb for storage devices... 1 Storage Device(s) found
> >
> > that EHCI timeout appears to be random, it pops up maybe 20% of the time.
> >
> > tried with a few different usb sticks and coul
On Saturday, April 25, 2015 at 09:36:16 PM, Pavel Machek wrote:
> Arria V SocDK has same QSPI and SPI flash configuration as Socrates. Add
> support for it.
>
> Signed-off-by: Pavel Machek
>
> diff --git a/arch/arm/dts/socfpga_arria5_socdk.dts
> b/arch/arm/dts/socfpga_arria5_socdk.dts index 4e52
Hi Thomas,
On 12 March 2015 at 16:20, Simon Glass wrote:
> Hi Thomas,
>
> On 11 March 2015 at 05:06, Beaman, Thomas wrote:
>> Thank you, can you keep me updated if possible.
>
> OK I'll see if I can copy you on the patches.
I got back into this last week and hope to have something to send to
th
For the distro_bootcmds to succeed on the sandbox a bit of setup is
required (e.g. network configured or host image bound), so running them
by default isn't that useful.
Add a -b/--boot command to the sandbox binary, which triggers the
distro_bootcmds to run after the other command-line commands.
Rather then building the host command depending on the configured board
(CONFIG_SANDBOX being defined), use the more common way of enabling it
via the board configuration.
Fixes building of the env target for sandbox as config_distro_bootcmd
failed to sanity check the configuration but couldn't fi
From: Vishnu Patekar
Enable full support for the A33 SoC including display, otg-usb, etc.
Signed-off-by: Vishnu Patekar
Signed-off-by: Hans de Goede
---
Changes in v2:
-Add a comment to explain the 0 write to the usb CSR register on A33
---
arch/arm/cpu/armv7/sunxi/Makefile | 4
arch/
Hi,
On 04/16/2015 11:09 AM, Ian Campbell wrote:
On Thu, 2015-04-16 at 09:27 +0200, Hans de Goede wrote:
Hi,
On 15-04-15 21:56, Ian Campbell wrote:
On Tue, 2015-04-14 at 18:06 +0200, Hans de Goede wrote:
From: Vishnu Patekar
Based on Allwinner dram init code from the a33 bsp:
https://github
sun6i and newer (derived) SoCs such as the sun8i-a23, sun8i-a33 and sun9i
have a various things in common, like having separate ahb reset control
registers, the SID living inside the pmic, custom pmic busses, new style
watchdog, etc.
This commit introduces a new hidden SUNXI_GEN_SUN6I Kconfig bool
On Sat, Apr 25, 2015 at 11:13 PM, Gabriel Huau wrote:
> The SPI NOR on the minnowboard max is a MICRON N25Q064A
>
> Signed-off-by: Gabriel Huau
> ---
> Changes for v2:
> - Update the dts to put the correct flash name
>
> arch/x86/dts/minnowmax.dts | 2 +-
> include/configs/minnowmax.h |
On Sun, Apr 26, 2015 at 4:16 AM, Gabriel Huau wrote:
> There are 6 banks:
> 4 banks for CORE: available in S0 mode
> 2 banks for SUS (Suspend): available in S0-S5 mode
>
> Signed-off-by: Gabriel Huau
> ---
> Changes for v2:
> - Fix typo in the commit message
>
> arch/x86/dts/minn
Hi Gabriel,
On Sun, Apr 26, 2015 at 4:16 AM, Gabriel Huau wrote:
> The correct GPIOBASE address on the baytrail is 0x48
>
> Signed-off-by: Gabriel Huau
> ---
Reviewed-by: Bin Meng
Please edit your commit message in the v2 to include such tags like
Acked-by, Reviewed-by, etc so that we know th
On 25.04.2015 13:51, Hans de Goede wrote:
Here is v2 of my patch series to add driver model support to the sunxi
emac driver.
Changes since v1:
-Add a patch to rename DMA_CPU_TRRESHOLD to EMAC_RX_BUFSIZE.
Please review.
Looks good, so:
Reviewed-by: Stefan Roese
Thanks,
Stefan
This patch add the stm32F4 board's serial ports support.
User can use it easily.
The user only need to edit the number of the usart.
This patch also fix the serial print out.
Signed-off-by: kunhuahuang
---
arch/arm/include/asm/arch-stm32f4/gpio.h | 32 ++
board/st/stm32f429-dis
Hi,
On 26-04-15 05:33, Ian Campbell wrote:
On Fri, 2015-04-24 at 15:48 +0200, Hans de Goede wrote:
diff --git a/board/sunxi/Kconfig b/board/sunxi/Kconfig
index 3831d3b..3997637 100644
--- a/board/sunxi/Kconfig
+++ b/board/sunxi/Kconfig
@@ -529,4 +529,16 @@ config GMAC_TX_DELAY
---help--
Hi,
On 26-04-15 05:30, Ian Campbell wrote:
On Fri, 2015-04-24 at 15:48 +0200, Hans de Goede wrote:
u-boot has support for a number of boards for which a dts file still needs
to be written, add minimal dts files for these boards so that we can switch
them over to device-model / fdt.
Can these
Hi,
Thanks for the reviews!
On 26-04-15 05:23, Ian Campbell wrote:
On Fri, 2015-04-24 at 15:48 +0200, Hans de Goede wrote:
netdev.h should not be included in device-model enabled builds (doing so
causes compiler warnings about struct eth_device not being declared), but
we do use sunxi_gmac_ini
Add support for the axp152 and axp209 PMICs to the pmic register access
helpers. This is a preparation patch for moving the axp gpio code to a
separate gpio driver.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Makefile | 2 ++
arch/arm/cpu/armv7/sunxi/pmic_bus.c | 35
Add driver-model support to the axp_gpio code, note that this needs a small
tweak to the driver-model version of sunxi_name_to_gpio to deal with the
vbus detect and enable pins which are not standard numbered gpios.
Signed-off-by: Hans de Goede
---
arch/arm/include/asm/arch-sunxi/gpio.h | 6 +++
Move the axp-gpio code out of the drivers/power/axp*.c code, and into
a new separate axpi-gpio driver.
This change drops supports for the gpio3 pin on the axp209, as that requires
special handling, and no boards are using it.
Besides cleaning things up by moving the code to a separate driver, as
Hi Simon, Ian,
Here is a new series to replace the 2 patches which added support for
axp gpio-s to the sunxi_gpio.c driver-model code. As requested this series
instead adds a new driver-model axp_gpio driver instead of bolting it
on to the sunxi_gpio code.
Patches 1-5 are intended to slot into th
Move the register helpers used to access the registers via p2wi resp.
rsb bus on the otherwise identical axp221 and axp223 pmics to a separate
file, so that they can be used by the upcoming standalone axp gpio driver
too.
Signed-off-by: Hans de Goede
---
arch/arm/cpu/armv7/sunxi/Makefile
Now that all sunxi boards are using driver-model for gpio (*), we can remove
the non driver-model support from the axp gpio code, and the glue to call
into the axp gpio code from the sunxi_gpio non driver-model code.
*) For the regular u-boot build, SPL still uses non driver-model gpio for
now, bu
Change the axp_gpio_foo function prototypes to match the gpio uclass op
prototypes, this is a preparation patch for moving the axp gpio code to
a separate driver-model gpio driver.
Note that the ugly calls with a NULL udev pointer in drivers/gpio/sunxi_gpio.c
this adds are removed in a later patch
Please ignore this version, since bus_i2c_init is not good for DM, I'll
implement a weak function for this.
On 4/25/2015 9:04 PM, Peng Fan wrote:
1. Introduce a new structure `struct mxc_i2c_bus`, this structure will
used for non-DM and DM.
1. Remove `struct mxc_i2c_regs` structure, but use
Hi Simon,
I missed this mail, and sent out a V2 version patch which still has
bus_i2c_init there, but refactors the driver and support dm,
https://patchwork.ozlabs.org/patch/464544/.
I'll send out a V3 version soon.
On 4/24/2015 12:40 PM, Simon Glass wrote:
Hi Peng,
On 19 April 2015 at 23:4
Hi Simon,
On 4/23/2015 11:17 PM, Simon Glass wrote:
Hi Peng,
On 15 April 2015 at 03:50, Peng Fan wrote:
Add missed people.
On 4/14/2015 1:19 PM, Peng Fan wrote:
For fsl_qspi_claim_bus and fsl_qspi_release_bus, the input parameter
"struct udevice *dev" represents device: "qspi[x]: qspi@[add
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