Set correct phy_type value for second USB controller.
This is required for supporting SOCs having 2 USB controllers
working simultaneously, one with UTMI phy and other with ULPI phy
Signed-off-by: Nikhil Badola
---
drivers/usb/host/ehci-fsl.c | 8 ++--
1 file changed, 6 insertions(+), 2 dele
Hi, Marczak
On Wed, 18 Dec 2013 19:31:31 +0100
Przemyslaw Marczak wrote:
> This change adds CFLAGS: -mno-unaligned-access
> which depends on option: PLATFORM_NO_UNALIGNED
>
> This option avoids unaligned data access exception on armv7, caused
> by access to logo data which is mostly unaligned
Hello Simon
> Since buildman does incremental builds by default, if nothing changes
> in the the build, that Makefile rule may not be invoked. It is
> possible that commits 03 to 15 don't update anything which causes the
> file to be rebuilt.
Even if the timestamp header is touched,
does Buildma
On Thursday 19 December 2013 12:49 PM, Jagan Teki wrote:
On Thu, Dec 19, 2013 at 12:37 PM, Sourav Poddar wrote:
On Thursday 19 December 2013 12:24 PM, Jagan Teki wrote:
On Mon, Nov 25, 2013 at 4:28 PM, Sourav Poddar
wrote:
Hi Jagan,
On Thursday 14 November 2013 09:09 PM, Sourav Poddar wrote:
On Thu, Dec 19, 2013 at 12:37 PM, Sourav Poddar wrote:
> On Thursday 19 December 2013 12:24 PM, Jagan Teki wrote:
>>
>> On Mon, Nov 25, 2013 at 4:28 PM, Sourav Poddar
>> wrote:
>>>
>>> Hi Jagan,
>>>
>>> On Thursday 14 November 2013 09:09 PM, Sourav Poddar wrote:
The patch series add supp
On Thursday, December 19, 2013 at 08:07:00 AM, Kuo-Jung Su wrote:
> 2013/12/19 Marek Vasut :
> > On Thursday, December 19, 2013 at 01:50:55 AM, Kuo-Jung Su wrote:
> >> 2013/12/18 Marek Vasut :
> >> > On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
> >> >> From: Kuo-Jung Su
> >>
On Thursday, December 19, 2013 at 08:10:05 AM, Kuo-Jung Su wrote:
> 2013/12/19 Marek Vasut :
> > On Thursday, December 19, 2013 at 01:54:56 AM, Kuo-Jung Su wrote:
> >> 2013/12/18 Marek Vasut :
> >> > On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
> >> >> From: Kuo-Jung Su
> >>
2013/12/19 Marek Vasut :
> On Thursday, December 19, 2013 at 01:54:56 AM, Kuo-Jung Su wrote:
>> 2013/12/18 Marek Vasut :
>> > On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
>> >> From: Kuo-Jung Su
>> >>
>> >> Since hardware revision 1.11.0, the following interrupt status regist
On Thursday 19 December 2013 12:24 PM, Jagan Teki wrote:
On Mon, Nov 25, 2013 at 4:28 PM, Sourav Poddar wrote:
Hi Jagan,
On Thursday 14 November 2013 09:09 PM, Sourav Poddar wrote:
The patch series add support for enabling qspi
on AM43xx at uboot.
Testing done:
-
Wrote a uImage t
2013/12/19 Marek Vasut :
> On Thursday, December 19, 2013 at 01:50:55 AM, Kuo-Jung Su wrote:
>> 2013/12/18 Marek Vasut :
>> > On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
>> >> From: Kuo-Jung Su
>> >>
>> >> Because the EP0 fifo empty indication is non-reliable,
>> >> an extra
On Thursday 19 December 2013 12:25 PM, Jagan Teki wrote:
On Thu, Dec 19, 2013 at 11:48 AM, Sourav Poddar wrote:
On Thursday 19 December 2013 11:41 AM, Jagan Teki wrote:
On Thu, Dec 19, 2013 at 10:36 AM, Sourav Poddar
wrote:
Jagan,
On Thursday 14 November 2013 09:01 PM, Sourav Poddar wrote:
H
On Thu, Dec 19, 2013 at 11:48 AM, Sourav Poddar wrote:
> On Thursday 19 December 2013 11:41 AM, Jagan Teki wrote:
>>
>> On Thu, Dec 19, 2013 at 10:36 AM, Sourav Poddar
>> wrote:
>>>
>>> Jagan,
>>> On Thursday 14 November 2013 09:01 PM, Sourav Poddar wrote:
Hi Jagan,
Here are the mis
On Mon, Nov 25, 2013 at 4:28 PM, Sourav Poddar wrote:
> Hi Jagan,
>
> On Thursday 14 November 2013 09:09 PM, Sourav Poddar wrote:
>>
>> The patch series add support for enabling qspi
>> on AM43xx at uboot.
>>
>> Testing done:
>> -
>> Wrote a uImage to the flash, read it back and boot t
From: Shaohui Xie
The BOOT_LOC setting in rcw cfg is wrong, set it to Memory complex 1.
Signed-off-by: Shaohui Xie
---
board/freescale/b4860qds/b4_rcw.cfg | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/board/freescale/b4860qds/b4_rcw.cfg
b/board/freescale/b4860qds/b4_rcw.
On Thursday 19 December 2013 11:41 AM, Jagan Teki wrote:
On Thu, Dec 19, 2013 at 10:36 AM, Sourav Poddar wrote:
Jagan,
On Thursday 14 November 2013 09:01 PM, Sourav Poddar wrote:
Hi Jagan,
Here are the miscellaneous fix and config update for dra7 qspi flash.
Patch series adds:
Add BAR config
On Thu, Dec 19, 2013 at 10:36 AM, Sourav Poddar wrote:
> Jagan,
> On Thursday 14 November 2013 09:01 PM, Sourav Poddar wrote:
>>
>> Hi Jagan,
>> Here are the miscellaneous fix and config update for dra7 qspi flash.
>>
>> Patch series adds:
>> Add BAR config in dra7 config file.
>> Set spi controll
On Thursday, December 19, 2013 at 01:54:56 AM, Kuo-Jung Su wrote:
> 2013/12/18 Marek Vasut :
> > On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
> >> From: Kuo-Jung Su
> >>
> >> Since hardware revision 1.11.0, the following interrupt status registers
> >
> >> are now write-1-c
On Thursday, December 19, 2013 at 01:50:55 AM, Kuo-Jung Su wrote:
> 2013/12/18 Marek Vasut :
> > On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
> >> From: Kuo-Jung Su
> >>
> >> Because the EP0 fifo empty indication is non-reliable,
> >> an extra delay is necessary to avoid dat
On Thu, Dec 19, 2013 at 11:24 AM, Sourav Poddar wrote:
> On Thursday 19 December 2013 11:24 AM, Jagan Teki wrote:
>>
>> On Thu, Dec 19, 2013 at 10:35 AM, Sourav Poddar
>> wrote:
>>>
>>> On Thursday 19 December 2013 12:17 AM, Jagan Teki wrote:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Podda
On Thu, Dec 19, 2013 at 11:24 AM, Sourav Poddar wrote:
> On Thursday 19 December 2013 11:22 AM, Jagan Teki wrote:
>>
>> On Thu, Dec 19, 2013 at 10:33 AM, Sourav Poddar
>> wrote:
>>>
>>> On Thursday 19 December 2013 12:21 AM, Jagan Teki wrote:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Podda
On Thursday 19 December 2013 11:24 AM, Jagan Teki wrote:
On Thu, Dec 19, 2013 at 10:35 AM, Sourav Poddar wrote:
On Thursday 19 December 2013 12:17 AM, Jagan Teki wrote:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar
wrote:
Without this delay, write/read is failing.
Looks like, the WIP always
On Thursday 19 December 2013 11:22 AM, Jagan Teki wrote:
On Thu, Dec 19, 2013 at 10:33 AM, Sourav Poddar wrote:
On Thursday 19 December 2013 12:21 AM, Jagan Teki wrote:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar
wrote:
From: Jagannadha Sutradharudu
Teki
Signed-off-by: Jagannadha Sutradha
On Thu, Dec 19, 2013 at 10:35 AM, Sourav Poddar wrote:
> On Thursday 19 December 2013 12:17 AM, Jagan Teki wrote:
>>
>> On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar
>> wrote:
>>>
>>> Without this delay, write/read is failing.
>>> Looks like, the WIP always remain set and hence a timeout
>>> occu
On Thu, Dec 19, 2013 at 10:33 AM, Sourav Poddar wrote:
> On Thursday 19 December 2013 12:21 AM, Jagan Teki wrote:
>>
>> On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar
>> wrote:
>>>
>>> From: Jagannadha Sutradharudu
>>> Teki
>>>
>>> Signed-off-by: Jagannadha Sutradharudu Teki
>>> Signed-off-by: Sou
Hi, Marczak.
Is this logo image what I sent you before?
It's a little different what we use,
and also the logo image is not aligned center horizontally.
Best regards,
Hyungwon Hwang
-Original Message-
From: Przemyslaw Marczak [mailto:p.marc...@samsung.com]
Sent: Thursday, December 19,
Hi,
On 19 Dec, 2013 03:31, Przemyslaw Marczak wrote:
> Now fimd BPP color mode depends on vl_bpp value in struct "panel_info".
>
> There is only 16BPP mode check, default mode is 24BPP.
> Other fimd modes are usually unneeded and also needs some fimd driver
> modifications and tests.
>
> Signed-of
Jagan,
On Thursday 14 November 2013 09:01 PM, Sourav Poddar wrote:
Hi Jagan,
Here are the miscellaneous fix and config update for dra7 qspi flash.
Patch series adds:
Add BAR config in dra7 config file.
Set spi controller device control registers before
doing a memory mapped read.
Patches availa
On Thursday 19 December 2013 12:17 AM, Jagan Teki wrote:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar wrote:
Without this delay, write/read is failing.
Looks like, the WIP always remain set and hence a timeout
occurs leading to the error.
Signed-off-by: Sourav Poddar
---
Hi Jagan,
This patch
On Thursday 19 December 2013 12:21 AM, Jagan Teki wrote:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar wrote:
From: Jagannadha Sutradharudu Teki
Signed-off-by: Jagannadha Sutradharudu Teki
Signed-off-by: Sourav Poddar
---
drivers/mtd/spi/sf_probe.c |2 ++
1 files changed, 2 insertions(
This patch series enables the DDR IO dynamic power down on boards
using DDR3.
This is applied on top of u-boot-ti:
git://git.denx.de/u-boot-ti.git
Lokesh Vutla (1):
ARM: AM43xx: Enable DDR dynamic IO power down for DDR3
Satyanarayana, Sandhya (1):
ARM: AM335x: Enable DDR dynamic IO power dow
From: "Satyanarayana, Sandhya"
This patch enables dynamically powering down the
IO receiver when not performing a read on boards using DDR3.
This optimizes both active and standby power consumption.
This bit is not set on EVM SK and EVM 1.5 and later boards.
Setting the same.
This has been teste
This patch enables dynamically powering down the
IO receiver when not performing a read on DDR3 board.
This optimizes both active and standby power consumption.
This is derived from a patch that is done on AM335x[1]
[1]
http://arago-project.org/git/projects/?p=u-boot-am33x.git;a=commit;h=6a9ee4bc
From: Fabio Estevam
mx6 datasheet specifies that the minimum VDDSOC at 792 MHz is 1.15 V.
Add a 25 mV margin and set it to 1.175V.
This also matches the VDDSOC voltages for 792MHz operation that the kernel
configures:
http://git.freescale.com/git/cgit.cgi/imx/linux-2.6-imx.git/tree/arch/arm/mac
From: Fabio Estevam
Since ROM may modify the LDO ramp up time according to fuse setting,
it is safer to reset the ramp up field to its default value of 00:
00: 64 cycles of 24MHz clock;
01: 128 cycles of 24MHz clock;
02: 256 cycles of 24MHz clock;
03: 512 cycles of 24MHz clock;
Signed-off-by: A
From: Fabio Estevam
When changing LDO voltages we need to wait for the required amount of time
for the voltage to settle.
Also, as the timer is still not available when arch_cpu_init() is called, we
need to call it later at board_postclk_init() phase.
Signed-off-by: Fabio Estevam
---
arch/arm
From: Fabio Estevam
Introduce set_ldo_voltage() so that all three LDO regulators can be configured.
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/soc.c | 33 ++---
1 file changed, 26 insertions(+), 7 deletions(-)
diff --git a/arch/arm/cpu/armv7/mx6/soc.c
From: Fabio Estevam
As U-boot does not use GPU/VPU peripherals, shutdown the VDDPU regulator
in order to save power.
Signed-off-by: Anson Huang
Signed-off-by: Jason Liu
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/soc.c | 23 +++
arch/arm/include/as
From: Fabio Estevam
set_vddsoc() is not used anywhere else, so make it static.
Signed-off-by: Fabio Estevam
---
arch/arm/cpu/armv7/mx6/soc.c | 2 +-
arch/arm/include/asm/arch-mx6/sys_proto.h | 2 --
2 files changed, 1 insertion(+), 3 deletions(-)
diff --git a/arch/arm/cpu/armv7/m
2013/12/18 Marek Vasut :
> On Wednesday, December 18, 2013 at 08:24:48 AM, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>>
>> Since hardware revision 1.11.0, the following interrupt status registers
>> are now write-1-clear (w1c):
>
> What did they look like before ?
>
They were r/w registers. i.e., s
2013/12/18 Marek Vasut :
> On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
>> From: Kuo-Jung Su
>>
>> Because the EP0 fifo empty indication is non-reliable,
>> an extra delay is necessary to avoid data corruption while
>> handling packets with size greater than 64 bytes.
>>
>> T
The pll_config.h will be consumed by Clock Manager driver
Signed-off-by: Chin Liang See
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
CC: Pavel Machek
Cc: Dinh Nguyen
---
board/altera/socfpga/pll_config.h | 115 +
1 file changed, 115 insertions(+)
c
Clock Manager driver will be called to reconfigure all the
clocks setting based on user input. The input are passed to
Preloader through handoff files
Signed-off-by: Chin Liang See
Cc: Albert Aribaud
Cc: Tom Rini
Cc: Wolfgang Denk
CC: Pavel Machek
Cc: Dinh Nguyen
---
arch/arm/cpu/armv7/socf
Adding Clock Manager driver and handoff files. Clock Manager driver
will be called to configure the all the clocks setting.
Chin Liang See (2):
socfpga: Adding Clock Manager driver
socfpga: Adding Clock Manager handoff file
arch/arm/cpu/armv7/socfpga/Makefile|2 +-
arch/a
Note that as discussed at http://patchwork.ozlabs.org/patch/296730/
the "cosmetic" patch is fixing a significant readability regression --
the current indentation is misleading as to the code flow.
The following changes since commit fd44194945714a478fab6407c04453caaef0bac9:
Prepare v2014.01-rc2
That was quick! Thanks.
On Wed, Dec 18, 2013 at 2:18 PM, Albert ARIBAUD
wrote:
> Hi Tom,
>
> On Wed, 18 Dec 2013 13:06:37 -0700, Tom Warren
> wrote:
>
> > Albert,
> >
> > Please pull u-boot-tegra/master into ARM/master. Thanks!
> >
> > ./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEA
To add the DesignWare watchdog driver support. It required
information such as register base address and clock info from
configuration header file within include/configs folder.
Signed-off-by: Chin Liang See
Cc: Anatolij Gustschin
Cc: Albert Aribaud
Cc: Heiko Schocher
Cc: Tom Rini
---
drive
Hi Marek,
On Wed, 18 Dec 2013 22:02:52 +0100, Marek Vasut wrote:
> Picked the HZ patch
>
> The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
>
> ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
> -0500)
>
> are available in the git reposit
-BEGIN PGP SIGNED MESSAGE-
Hash: SHA1
On 12/18/2013 04:35 PM, York Sun wrote:
> On 11/25/2013 07:45 AM, Tom Rini wrote:
>> Hello,
>>
>> With a recent change to U-Boot (as part of merging
>> http://patchwork.ozlabs.org/patch/293612/), we need cache support
>> for MPC824x, for the linkstat
On 11/25/2013 07:45 AM, Tom Rini wrote:
> Hello,
>
> With a recent change to U-Boot (as part of merging
> http://patchwork.ozlabs.org/patch/293612/), we need cache support for
> MPC824x, for the linkstation_HGLAN board to continue building, as the
> network driver is now cache aware.
>
> Alternat
To add the Denali NAND driver support into U-Boot. It required
information such as register base address from configuration
header file within include/configs folder.
Signed-off-by: Chin Liang See
Cc: Artem Bityutskiy
Cc: David Woodhouse
Cc: Brian Norris
Cc: Scott Wood
---
drivers/mtd/nand/
Hi Tom,
On Wed, 18 Dec 2013 13:06:37 -0700, Tom Warren
wrote:
> Albert,
>
> Please pull u-boot-tegra/master into ARM/master. Thanks!
>
> ./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only
> shows failures that were already present in ARM/master.
>
> The following change
Picked the HZ patch
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-pxa.git master
for you to fetch changes up to f
Albert,
Please pull u-boot-tegra/master into ARM/master. Thanks!
./MAKEALL -s tegra AOK, checkpatch.pl is clean, and ./MAKEALL -a arm only
shows failures that were already present in ARM/master.
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: U
On Fri, Nov 22, 2013 at 08:44:33AM -0600, Dan Murphy wrote:
> Update the CONFIG_BOOTCMD to adopt the common
> boot command which parses through USB, MMC and NAND.
>
> This patch is dependent on the series starting with
> http://patchwork.ozlabs.org/patch/292986/
>
> Signed-off-by: Dan Murphy
A
On Tue, Dec 17, 2013 at 02:14:06PM +0100, Stefan Roese wrote:
> Patch f33b9bd3
> [arm: omap3: Enable clocks for peripherals only if they are used]
> breaks SPL booting on Beagleboard. Since some gpio input's are
> read to detect the board revision. But with this patch above, the
> clocks to the GP
On Tue, Dec 10, 2013 at 03:02:10PM +0530, Lokesh Vutla wrote:
> This Patch series updates support for AM4372 EPOS and GP EVM boards.
> AM4372 is a low cost Cortex-A9 based application processor targeted at
> existing
> ARM9/ARM11 base of customers that need more processing capabilities.
> Current
To add the Cadence SPI driver support for Altera SOCFPGA. It
required information such as clocks and timing from platform's
configuration header file within include/configs folder
Signed-off-by: Chin Liang See
Cc: Jagannadha Sutradharudu Teki
---
drivers/spi/Makefile |1 +
drivers
Hey,
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-ti.git master
for you to fetch changes up to b65391f99393ce43a
With the changes to make OOBFREE/ECCPOS configurable but default to
larger, we need to set these config options for the space savings they
provide.
Cc: Scott Wood
Cc: Heiko Schocher
Signed-off-by: Tom Rini
---
include/configs/cam_enc_4xx.h |2 ++
1 file changed, 2 insertions(+)
diff --git
On Wednesday, December 18, 2013 at 08:35:28 PM, Tom Rini wrote:
> On Wed, Dec 18, 2013 at 07:55:48PM +0100, Marek Vasut wrote:
> > On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote:
> > > Hi Marek,
> > >
> > > On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut wrote:
> > > > Hi Al
On Wed, Dec 18, 2013 at 07:55:48PM +0100, Marek Vasut wrote:
> On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote:
> > Hi Marek,
> >
> > On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut wrote:
> > > Hi Albert,
> > >
> > > please pull for 2014.01 . Thanks!
> > >
> > > The follow
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar wrote:
> Without this delay, write/read is failing.
> Looks like, the WIP always remain set and hence a timeout
> occurs leading to the error.
>
> Signed-off-by: Sourav Poddar
> ---
> Hi Jagan,
> This patch seems to be necessary for read/write.
> I t
On Wed, Dec 18, 2013 at 9:07 PM, Marek Vasut wrote:
> On Wednesday, December 18, 2013 at 04:30:08 PM, Jagannadha Sutradharudu Teki
> wrote:
>> Added support for Zynq Nand controller driver.
>>
>> Signed-off-by: Jagannadha Sutradharudu Teki
>> CC: Marek Vasut
>> Cc: Scott Wood
>> ---
>> V2: Fixe
On Wednesday, December 18, 2013 at 07:47:38 PM, Albert ARIBAUD wrote:
> Hi Marek,
>
> On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut wrote:
> > Hi Albert,
> >
> > please pull for 2014.01 . Thanks!
> >
> > The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
> > ARM: O
The following changes since commit f3bf212abc4139f12b472e97c1992ab32671b609:
serial_sh: add support for SH7753 (2013-12-18 16:50:00 +0900)
are available in the git repository at:
git://git.denx.de/u-boot-usb.git master
for you to fetch changes up to eb63218b9b95a59baa8b241f3a88e4415dabf833:
On Thu, Nov 14, 2013 at 9:09 PM, Sourav Poddar wrote:
> From: Jagannadha Sutradharudu Teki
>
> Signed-off-by: Jagannadha Sutradharudu Teki
> Signed-off-by: Sourav Poddar
> ---
> drivers/mtd/spi/sf_probe.c |2 ++
> 1 files changed, 2 insertions(+), 0 deletions(-)
>
> diff --git a/drivers/mt
Hi Marek,
On Wed, 18 Dec 2013 18:17:59 +0100, Marek Vasut wrote:
> Hi Albert,
>
> please pull for 2014.01 . Thanks!
>
> The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
>
> ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
> -0500)
>
> ar
Signed-off-by: Przemyslaw Marczak
---
changes v2:
- add definitions for check keys
- cleanup config definitions
---
include/configs/s5pc210_universal.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/configs/s5pc210_universal.h
b/include/configs/s5pc210_un
On Wed, Dec 18, 2013 at 11:48 PM, Stephen Warren wrote:
> From: Yen Lin
>
> The RDY bit indicates that a transfer is complete. This needs to be
> cleared by SW before every single HW transaction, rather than only
> at the start of each SW transaction (those being made up of n HW
> transactions).
Signed-off-by: Przemyslaw Marczak
Acked-by: Lukasz Majewski
---
changes v2:
- add definitions to check keys
- cleanup config definitions
- add acked-by
---
include/configs/trats.h | 23 +++
1 file changed, 23 insertions(+)
diff --git a/include/configs/trats.h b/include/co
board/samsung/common/misc.c:
- move draw_logo() function from exynos_fb.c
- add get_tizen_logo_info() function call removed from board files
boards:
- update board files
- add CONFIG_MISC_INIT_R to Universal, Trats and Trats2
Signed-off-by: Przemyslaw Marczak
Tested-by: Hyungwon Hwang
---
chan
This is big size patch.
PLease follow the link:
http://www.denx.de/wiki/pub/U-Boot/TooBigPatches/0007-lib-tizen-change-Tizen-logo-with-the-new-one.patch
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot
Old s5p gpio coding method was not clean and was not working properly
for all parts and banks. New method is clean and easy to extend.
Gpio coding mask:
0x00ff - pin number
0x0000 - bank offset
0xff00 - part number
Signed-off-by: Przemyslaw Marczak
---
arch/arm/include/asm/arch-exyn
This simple LCD menu allows run one of download mode on device
without writing on console or for fast and easy upgrade.
This feature check user keys combination at boot:
- power key + volume up - download menu
- power key + volume down - thor mode (without menu)
New configs:
- CONFIG_LCD_MENU
- CO
Remove wrong and unused env variables
Trats2 is not as GT-I8800.
Signed-off-by: Przemyslaw Marczak
Cc: Piotr Wilczek
---
board/samsung/trats2/trats2.c | 19 ++-
drivers/power/battery/bat_trats2.c |2 +-
include/configs/trats2.h |1 -
3 files changed, 3 i
Now fimd BPP color mode depends on vl_bpp value in struct "panel_info".
There is only 16BPP mode check, default mode is 24BPP.
Other fimd modes are usually unneeded and also needs some fimd driver
modifications and tests.
Signed-off-by: Przemyslaw Marczak
---
Changes v2:
- check panel_info vl_b
This change adds CFLAGS: -mno-unaligned-access
which depends on option: PLATFORM_NO_UNALIGNED
This option avoids unaligned data access exception on armv7, caused
by access to logo data which is mostly unaligned initialized array.
more info: README.arm-unaligned-accesses
Signed-off-by: Przemyslaw
Config: CONFIG_MISC_INIT_R enables implementation of misc_init_r()
in common file::
- board/samsung/common/misc.c
Signed-off-by: Przemyslaw Marczak
---
Changes v2:
- change CONFIG_SAMSUNG to CONFIG_MISC_INIT_R
---
board/samsung/common/Makefile |1 +
board/samsung/common/misc.c | 14
16 bpp mode is required by LCD console mode.
This change updates exynos board files.
Signed-off-by: Przemyslaw Marczak
---
Changes v2:
-- new patch
---
board/samsung/trats/trats.c |2 +-
board/samsung/trats2/trats2.c|2 +-
board/samsung/universal_c210/universal.
This patch set includes changes required to:
- properly use of all gpios
- introduce common file for Samsung misc code
- keys support (PWR, VOL:UP,DOWN)
- console support on LCD
- 16bpp logo support
- introduce LCD menu on Samsung devices
Changes v2 are described in each patch commit msg.
Przemys
This change avoids unexpected unaligned access.
more info: README.arm-unaligned-accesses
Signed-off-by: Przemyslaw Marczak
cc: Lukasz Majewski
---
Changes v2:
- new patch
---
board/samsung/trats/Makefile |2 ++
1 file changed, 2 insertions(+)
diff --git a/board/samsung/trats/Makefile b/b
Signed-off-by: Przemyslaw Marczak
---
changes v2:
- add definitions for check keys
- cleanup config definitions
---
include/configs/trats2.h | 27 +++
1 file changed, 27 insertions(+)
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 80d3ed0..b0dcf
Hi Nobuhiro,
On Wed, 18 Dec 2013 16:44:34 +0900, Nobuhiro Iwamatsu
wrote:
> Dear Albert Aribaud,
>
> Please pull u-boot-sh/rmobile into u-boot-arm/master.
>
> The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
>
> ARM: OMAP5: clocks: Update MPU settings for OPP_NOM
From: Yen Lin
The RDY bit indicates that a transfer is complete. This needs to be
cleared by SW before every single HW transaction, rather than only
at the start of each SW transaction (those being made up of n HW
transactions).
It seems that earlier HW may have cleared this bit autonomously whe
Hi Stefan
On Tue, Dec 17, 2013 at 2:14 PM, Stefan Roese wrote:
> Patch f33b9bd3
> [arm: omap3: Enable clocks for peripherals only if they are used]
> breaks SPL booting on Beagleboard. Since some gpio input's are
> read to detect the board revision. But with this patch above, the
> clocks to the
On Tue, Dec 17, 2013 at 4:17 AM, Stephen Warren wrote:
> From: Yen Lin
>
> The RDY bit indicates that a transfer is complete. This needs to be
> cleared by SW before every single HW transaction, rather than only
> at the start of each SW transaction (those being made up of n HW
> transactions).
>
Hi Albert,
please pull for 2014.01 . Thanks!
The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
ARM: OMAP5: clocks: Update MPU settings for OPP_NOM (2013-12-12 17:43:39
-0500)
are available in the git repository at:
git://git.denx.de/u-boot-pxa.git master
for yo
On Wednesday, December 18, 2013 at 05:19:20 PM, Sergei Ianovich wrote:
> Signed-off-by: Sergei Ianovich
> CC: Marek Vasut
Applied, thanks
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-bo
To enhance the SDMMC DesignWare driver to use calloc instead of
malloc. This will avoid the incident that uninitialized members
of mmc structure are later used for NULL comparison.
Signed-off-by: Chin Liang See
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Mischa Jonker
Cc: Alexey Brodkin
Cc: A
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Andy Fleming
Cc: Pantelis Antoniou
---
Changes for v
Hi Andreas,
On Tue, 17 Dec 2013 17:25:55 +0100, Andreas Bießmann
wrote:
> Dear Albert Aribaud,
>
> please pull the following fix ups from u-boot-atmel/master into
> u-boot-arm/master.
>
> The following changes since commit d2c7074b9593d822e2359a09c21747248fdf5fac:
>
> ARM: OMAP5: clocks: Up
On Wed, 2013-12-18 at 16:01 +0100, Marek Vasut wrote:
> Applied 1,3,4,5 , thanks!
Thanks for lighting speed.
> 2 doesn't apply so see my comment please.
Reposted v3.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u
Hi Masahiro,
On 16 December 2013 02:42, Masahiro Yamada wrote:
> Hello Simon
>
>
>> Further to this one - here is my full buildman output. There are a few
>> PPC problems also:
>
> Your close check is highly appreciated.
> Thanks!
>
>> 29: Makefile: move more flags to the top Makefile
>>powe
Signed-off-by: Sergei Ianovich
CC: Marek Vasut
---
Changes v2..v3
* fixed merge conflict
* added checks for index and init type
Changes v1..v2
* new patch
board/icpdas/lp8x4x/lp8x4x.c | 38 --
include/configs/lp8x4x.h | 3 +--
2 files changed, 25 i
Hi Masahiro,
On 18 December 2013 03:00, Masahiro Yamada wrote:
> Before this commit, a broken pipe error sometimes happened
> when building lcd4_lwmon5 board with Buildman.
>
> This commit re-writes build rules of
> u-boot.spr and u-boot-img-spl-at-end.bin
> more simply without using a pipe.
>
>
To add the DesignWare MMC driver support for Altera SOCFPGA. It
required information such as clocks and bus width from platform
specific files (SOCFPGA handoff files)
Signed-off-by: Chin Liang See
Cc: Rajeshwari Shinde
Cc: Jaehoon Chung
Cc: Andy Fleming
---
arch/arm/include/asm/arch-socfpga/d
Tested qspi on zynq board with stmicro, spansion and winbond
flashes by enabling CONFIG_ZYNQ_QSPI.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V2: none
include/configs/zynq-common.h | 10 ++
1 file changed, 10 insertions(+)
diff --git a/include/configs/zynq-common.h b/include/confi
Last 128Kb sector of 1Mb flash is defined as u-boot
environment partition.
Signed-off-by: Jagannadha Sutradharudu Teki
---
V2: none
include/configs/zynq-common.h | 16 +++-
1 file changed, 15 insertions(+), 1 deletion(-)
diff --git a/include/configs/zynq-common.h b/include/configs/
On Wednesday, December 18, 2013 at 08:24:49 AM, Kuo-Jung Su wrote:
> From: Kuo-Jung Su
>
> Because the EP0 fifo empty indication is non-reliable,
> an extra delay is necessary to avoid data corruption while
> handling packets with size greater than 64 bytes.
>
> This workaround should be applied
On Wednesday, December 18, 2013 at 04:30:08 PM, Jagannadha Sutradharudu Teki
wrote:
> Added support for Zynq Nand controller driver.
>
> Signed-off-by: Jagannadha Sutradharudu Teki
> CC: Marek Vasut
> Cc: Scott Wood
> ---
> V2: Fixed issues pointed by Scott
>
> arch/arm/include/asm/arch-zynq
1 - 100 of 150 matches
Mail list logo