> >> I modified MPC8260ADS with CPU clock frequency 100MHz, Text base
>
> >Is this the actual clock frequency on your system? Really?
>
> >> 0xfff0, Flash Base 0xfff0 and sdram base 0x, and
> console on
>
> >Are these values correct for your hardware?
>
> >> SMC of port pins PA9(R
BSC9131RDB is a Freescale reference design board for BSC9131 SoC. BSC9131 SOC
is an integrated device that targets Femto base station market. It combines
Power Architecture e500v2 and DSP StarCore SC3850 core technologies with
MAPLE-B2F baseband acceleration processing elements
BSC9131RDB Ov
- BSC9131 is integrated device that targets Femto base station market.
It combines Power Architecture e500v2 and DSP StarCore SC3850 core
technologies with MAPLE-B2F baseband acceleration processing elements.
- BSC9130 is exactly same as BSC9131 except that the max e500v2
core and DSP co
The MAKEALL script cleverly runs make with the appropriate options
to use all of the cores on the system, but your average U-Boot build
can't make much use of more than a few cores. If you happen to have
a many-core server, your builds will leave most of the system idle.
In order to make full use
The following changes since commit 61ddce07f8b96c5df7d00466b4da9edaecb0eff1:
sandbox: Use the new run_command() (2012-04-23 22:53:54 +0200)
are available in the git repository at:
git://www.denx.de/git/u-boot-mpc85xx.git master
Chunhe Lan (1):
powerpc/p1023rds: Disable nor flash node
Hi,
This patch has review-pending from a very long time.
I request the "mailing-list" to review this patch.
Regards,
Prabhakar
On Wednesday 15 February 2012 02:25 PM, Prabhakar Kushwaha wrote:
Built u-boot elf file does not contain any dwarf informations by default. This
information is requi
On Tue, Apr 24, 2012 at 10:48 PM, Prabhakar Kushwaha
wrote:
> Hi,
>
>
>
> On Wednesday 25 April 2012 02:50 AM, Andy Fleming wrote:
>>
>> On Tue, Apr 24, 2012 at 4:10 PM, Scott Wood
>> wrote:
>>>
>>> On 04/24/2012 03:45 PM, Andy Fleming wrote:
On Mon, Mar 26, 2012 at 4:00 AM, Prabhakar K
On Wed, 2012-04-25 at 02:08 +0200, Luka Perkov wrote:
> Hi Daniel,
>
> I want to say that this works on my kirkwood board ib62x0. Nice work.
>
> I have only a few suggestions...
>
> On Mon, Apr 23, 2012 at 11:07:21PM -0700, Daniel Stodden wrote:
> > +.SH NAME
> > +kwboot \- Boot Marvell Kirkwood
Hi,
On Wednesday 25 April 2012 02:50 AM, Andy Fleming wrote:
On Tue, Apr 24, 2012 at 4:10 PM, Scott Wood wrote:
On 04/24/2012 03:45 PM, Andy Fleming wrote:
On Mon, Mar 26, 2012 at 4:00 AM, Prabhakar Kushwaha
@@ -107,6 +107,7 @@
#define CONFIG_MAX_CPUS1
#define CO
Hi,
Please find my reply in-lined.
On Wednesday 25 April 2012 12:58 AM, Andy Fleming wrote:
On Thu, Mar 15, 2012 at 1:44 AM, Prabhakar Kushwaha
wrote:
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+
+DECLARE_GLOBA
The following platforms had their config files changed
flea3, imx31_phycore, mx35pdk, mx53ard, mx53evk, mx53smd
Signed-off-by: Troy Kisky
---
arch/arm/include/asm/arch-mx31/imx-regs.h |7 +++
arch/arm/include/asm/arch-mx35/imx-regs.h |2 +-
drivers/i2c/mxc_i2c.c |
Signed-off-by: Troy Kisky
---
board/freescale/mx6qsabrelite/mx6qsabrelite.c | 11 +++
include/configs/mx6qsabrelite.h |8
2 files changed, 19 insertions(+), 0 deletions(-)
diff --git a/board/freescale/mx6qsabrelite/mx6qsabrelite.c
b/board/freescale/mx6qsabre
Hi Andy,
Thanks for reviewing this patch.
Please find my reply in-lined
On Wednesday 25 April 2012 12:05 AM, Andy Fleming wrote:
On Thu, Mar 15, 2012 at 1:41 AM, Prabhakar Kushwaha
wrote:
- BSC9131 is integrated device that targets Femto base station market.
It combines Power Archite
Other then being very weird, this code was also wrong.
For example, say I set speed to 100K. I'll read back the speed
as 85937. But the speed is really 85937.5, so we I reset
the speed to 85937, I'll get 73660.7. After a couple of transactions
my speed is now exactly 68750 so it will remain there.
Some hardware requires the data buffers to be cacheline-aligned to make
sure DMA operations can be properly executed.
This patch uses the ALLOC_CACHE_ALIGN_BUFFER macro to allocate buffers
with proper alignment. The same was already done for EFI partitions in
commit f75dd58 "part_efi: dcache: allo
* Wolfgang Denk wrote:
> Hi,
>
> are there any other urgent fixes that should make it into the imminent
> v2012.04.1 maintenance release ?
I just sent two more patches that are required to boot the Plutux and Medcom
boards successfully. Sorry for being so late, but I only got around to test
the l
Hi Daniel,
I want to say that this works on my kirkwood board ib62x0. Nice work.
I have only a few suggestions...
On Mon, Apr 23, 2012 at 11:07:21PM -0700, Daniel Stodden wrote:
> +.SH NAME
> +kwboot \- Boot Marvell Kirkwood SoCs over a serial link.
> +.SH SYNOPSIS
> +.B kwboot
> +.RB [ "-b \fIi
On Tue, 2012-04-24 at 22:28 +0200, Luka Perkov wrote:
> Hi Daniel,
>
> On Mon, Apr 23, 2012 at 11:07:21PM -0700, Daniel Stodden wrote:
> > The kwboot program boots boards based on Marvell's Kirkwood platform
> > via Xmodem over their integrated UART.
> >
> > Signed-off-by: Daniel Stodden
> > ---
The MMC core sometimes reads buffers that are smaller than a complete
cacheline, for example when reading the SCR. In order to avoid a warning
from the ARM v7 cache handling code, this patch makes sure that complete
cachelines are flushed.
Signed-off-by: Thierry Reding
---
drivers/mmc/tegra2_mmc
On Tue, Apr 24, 2012 at 4:10 PM, Scott Wood wrote:
> On 04/24/2012 03:45 PM, Andy Fleming wrote:
>> On Mon, Mar 26, 2012 at 4:00 AM, Prabhakar Kushwaha
>>> @@ -107,6 +107,7 @@
>>> #define CONFIG_MAX_CPUS 1
>>> #define CONFIG_FSL_SDHC_V2_3
>>> #define CONFIG_SYS_FSL_NUM_LA
On Tue, Apr 24, 2012 at 2:00 PM, Dirk Behme wrote:
> I don't have the details here, but what I do (out of my head, so there might
> be some details wrong):
Thanks, using your method I am able to boot it again.
Regards,
Fabio Estevam
___
U-Boot mailin
On 04/24/2012 03:45 PM, Andy Fleming wrote:
> On Mon, Mar 26, 2012 at 4:00 AM, Prabhakar Kushwaha
>> @@ -107,6 +107,7 @@
>> #define CONFIG_MAX_CPUS1
>> #define CONFIG_FSL_SDHC_V2_3
>> #define CONFIG_SYS_FSL_NUM_LAWS12
>> +#define CONFIG_SYS_PPC_E500_DEBUG_
On Mon, Mar 26, 2012 at 4:00 AM, Prabhakar Kushwaha
wrote:
> Debugging of e500 and e500v1 processer requires debug exception vecter (IVPR +
> IVOR15) to have valid and fetchable OP code.
>
> While executing in translated space (AS=1), whenever a debug exception is
> generated, the MSR[DS/IS] gets
Hi Daniel,
On Mon, Apr 23, 2012 at 11:07:21PM -0700, Daniel Stodden wrote:
> The kwboot program boots boards based on Marvell's Kirkwood platform
> via Xmodem over their integrated UART.
>
> Signed-off-by: Daniel Stodden
> ---
> doc/kwboot.1 | 84 +++
> tools/Makefile |6 +
> tools/
Dear Thirumalesha N,
In message
you wrote:
>
> I modified MPC8260ADS with CPU clock frequency 100MHz, Text base
Is this the actual clock frequency on your system? Really?
> 0xfff0, Flash Base 0xfff0 and sdram base 0x, and console on
Are these values correct for your hardware
Hello.
On Mon, 2012-04-23 at 09:27, Lukasz Majewski wrote:
> > >
> > > On Fri, 2012-04-06 at 15:06, Marek Vasut wrote:
> > > > > On Thursday 05 April 2012 20:18:16 Marek Vasut wrote:
> > > > > > What do you expect from me to tell you about this patch? Or
> > > > > > do you expect someone else to
On Thu, Mar 15, 2012 at 1:44 AM, Prabhakar Kushwaha
wrote:
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +
> +DECLARE_GLOBAL_DATA_PTR;
> +
> +int board_early_init_f(void)
> +{
>
Hi,
I am trying to port u-boot for MPC8280 by taking reference MPC8260ADS,
but its not booting,
u-boot Version u-boot-1.3.1
ARCH = PPC 82xx
Processor = MPC8280
Bootflash = AM29LV040B (512kb) mirror bit
sdram = 512MB
I modified MPC8260ADS with CPU clock frequency 100MHz,
* Simon Glass wrote:
> On Tue, Apr 24, 2012 at 7:53 PM, Thierry Reding
> wrote:
> > Some hardware requires the data buffers to be cacheline-aligned to make
> > sure DMA operations can be properly executed.
> >
> > This patch uses the ALLOC_CACHE_ALIGN_BUFFER macro to allocate buffers
> > with prop
On Thu, Mar 15, 2012 at 1:41 AM, Prabhakar Kushwaha
wrote:
> - BSC9131 is integrated device that targets Femto base station market.
> It combines Power Architecture e500v2 and DSP StarCore SC3850 core
> technologies with MAPLE-B2F baseband acceleration processing elements.
> - BSC9130 is exa
On Tue, Apr 24, 2012 at 7:53 PM, Thierry Reding
wrote:
> Some hardware requires the data buffers to be cacheline-aligned to make
> sure DMA operations can be properly executed.
>
> This patch uses the ALLOC_CACHE_ALIGN_BUFFER macro to allocate buffers
> with proper alignment. The same was already
Dear Wolfgang Denk,
> Hi,
>
> are there any other urgent fixes that should make it into the imminent
> v2012.04.1 maintenance release ?
Not from my side.
>
> Best regards,
>
> Wolfgang Denk
Best regards,
Marek Vasut
___
U-Boot mailing list
U-Boot@l
Dear Marek Vasut
>
> Dear Ilya Averyanov,
>
> please always Cc the mainline list. Also, I'm now s3c2440 person, I have
> no
> relationship with this chip at all ...
>
> > arch/arm/include/asm/arch-s3c24x0/s3c2410.h | 4 +-
> > arch/arm/include/asm/arch-s3c24x0/s3c2440.h | 4 +-
> > arch/arm/
On 24.04.2012 18:21, Fabio Estevam wrote:
Dirk,
On Tue, Apr 24, 2012 at 4:58 AM, Dirk Behme wrote:
I tested the recent master which includes the three patches planned for
v2012.04.1 booting a device tree based kernel and it works :)
Have you tested it on a mx6qsabrelite using the latest main
Dear Marek Vasut
>
> Dear Ilya Averyanov,
>
> please always Cc the mainline list. Also, I'm now s3c2440 person, I have
> no
> relationship with this chip at all ...
>
> > arch/arm/include/asm/arch-s3c24x0/s3c2410.h | 4 +-
> > arch/arm/include/asm/arch-s3c24x0/s3c2440.h | 4 +-
> > arch/arm/
Dirk,
On Tue, Apr 24, 2012 at 4:58 AM, Dirk Behme wrote:
> I tested the recent master which includes the three patches planned for
> v2012.04.1 booting a device tree based kernel and it works :)
Have you tested it on a mx6qsabrelite using the latest mainline kernel?
My kernel did not boot.
Thi
Hi,
On Mon, 23 Apr 2012 10:47:07 +0900
Donghwa Lee wrote:
> This patch supports drawing 32bpp uncompressed bitmap image.
>
> Signed-off-by: Donghwa Lee
> Signed-off-by: Kyungmin.park
> ---
> common/lcd.c | 26 ++
> 1 files changed, 22 insertions(+), 4 deletions(-)
>
Hi,
On Mon, 23 Apr 2012 10:47:10 +0900
Donghwa Lee wrote:
> This patches support drawing 32bpp bitmap TIZEN logo in exynos fb.
> asm/arch/trats_logo.h data is compressed by zip and decomressed at
Did you use "gzip" to compress the trats.bmp bitmap? I suppose so,
but "gunzip" can't uncompress it
On Tuesday 24 April 2012 01:34:31 Stefan Kristiansson wrote:
> invalidating the memory area that is being executed
> while icache is on is a bit adventurous,
> make sure it's turned off during this operation
sounds like a bug in the chip. you should be able to icache invalidate the
active insn a
Hi,
On Tue, 24 Apr 2012 10:37:05 +0900
Donghwa Lee wrote:
> vl_bpix of vidinfo_t was changed proper value for u-boot.
> It is used to multiple of 2 by using NBITS() macro.
>
> Signed-off-by: Donghwa Lee
> Signed-off-by: Kyungmin Park
> ---
> board/samsung/trats/trats.c |2 +-
> drivers/
Hello everyone.
I am trying to port the Ethernet driver to *tegra250 development
board(harmony board)* but I have the problem.
At first, I used the chromium source code. (here : git clone
http://git.chromium.org/chromiumos/third_party/u-boot.git)
But it doesn't have the Ethernet driver so I moved
Dear Thierry Reding,
In message <20120424075911.ga29...@avionic-0098.mockup.avionic-design.de> you
wrote:
>
> I just sent two more patches that are required to boot the Plutux and Medcom
> boards successfully. Sorry for being so late, but I only got around to test
> the latest release on both bo
Am 23.04.2012 20:30, schrieb Wolfgang Denk:
Dear Matthias,
In message<4f959612.7040...@arcor.de> you wrote:
Because you will have the same address for "physical memory" in all
instances of sandbox u-boot. This could simplify test scripts a bit.
Imagine testing tftp downloads to memory where D
On Thu, 19 Apr 2012 08:35:37 +0200
Dirk Behme wrote:
...
> There should be a -next from Wolfgang for
>
> http://patchwork.ozlabs.org/patch/144462/
>
> http://patchwork.ozlabs.org/patch/151799/
Both applied, thanks!
Anatolij
___
U-Boot mailing list
U-
On Wed, 11 Apr 2012 07:08:53 -0700
Eric Nelson wrote:
> Signed-off-by: Eric Nelson
> ---
>
> V3 increases alignment of globals:
> get_dentfromdir_block
> do_fat_read_block
>
> fs/fat/fat.c | 22 --
> 1 files changed, 12 insertions(+), 10 deletions(-)
Applied t
Hello Wolfgang,
The following changes since commit 61ddce07f8b96c5df7d00466b4da9edaecb0eff1:
sandbox: Use the new run_command() (2012-04-23 22:53:54 +0200)
are available in the git repository at:
git://git.denx.de/u-boot-i2c.git master
Armando Visconti (1):
i2c:designware Turn off the
Hello Amit,
Amit Virdi wrote:
> From: Armando Visconti
>
> The designware i2c controller must be turned off before
> setting the speed in IC_CON register, as stated in the
> section 6.3.1 of the dw_apb_i2c_db.pdf.
>
> Signed-off-by: Michel Sanches
> Signed-off-by: Armando Visconti
> Signed-of
Hello Nobuhiro,
Nobuhiro Iwamatsu wrote:
> Renesas SH7734 has two I2C interfaceis.
> This supports these I2C.
>
> V5: - include i2c.h.
> - Add check of icsr bit polling logic.
> - Implement i2c_probe.
> V4: - Remove sh_i2c_dump_reg function.
> - Use puts() when there's no format.
>
Hello Amit,
Amit Virdi wrote:
> From: Vipin KUMAR
>
> Earlier, a driver exists in the u-boot source for designware i2c interface.
> That
> driver was specific to spear platforms. This patch implements the i2c
> controller
> as a generic driver which can be used by multiple platforms
>
> The d
On Sat, 3 Mar 2012 15:02:20 -0700
Eric Nelson wrote:
> Signed-off-by: Eric Nelson
> ---
> disk/part_dos.c |6 +++---
> 1 files changed, 3 insertions(+), 3 deletions(-)
Applied to u-boot-staging/ag...@denx.de, thanks!
Anatolij
___
U-Boot mailing
On 24.04.2012 08:35, Wolfgang Denk wrote:
Hi,
are there any other urgent fixes that should make it into the imminent
v2012.04.1 maintenance release ?
I tested the recent master which includes the three patches planned for
v2012.04.1 booting a device tree based kernel and it works :)
So from
51 matches
Mail list logo
