Hello, I made some further investigations.
(looked into lst file and checked the content of the hex file).
When there are no interrupt routine specified, the main code was put directly
to 0x00 address.
It works, but not good practice, because it overlaps the interrupt vectors.
Even without inter
Dear sdcc users and developers,
At the past I used sdcc for 14 bit pic devices with success.Now I'd like to use
sdcc for a 16 bit pic microcontroller, but I have a problem just at the
beginning.
I tried to use timer interrupt, but my program was not able to run. After some
investigation, I foun
Dear sdcc developers,
There is a problem with PIC18FxxJ10 include files:
The configuration word addresses are not defined properly.
(sdcc version: 7889)
In the 18J series chips config words are no longer located at 0x30.
The resulted hex file should not contain anything at this address.
The
Dear sdcc developers,
There is a problem with PIC18FxxJ10 include files:
The configuration word addresses are not defined properly.
(sdcc version: 7889)
In the 18J series chips config words are no longer located at 0x30.
The resulted hex file should not contain anything at this address.
The p
Dear SDCC developers, I'd like to start a development with PIC18F26J11 but
this device family (J11 series) seems not supported by sdcc.These are supported
in gputils.I tried: sdcc:7889, gputils:14.2.RC1 Could you please add support in
sdcc? J11 series chips are improved verions of J10 series. (J
Dear sdcc developers and users,
I have an "advanced?" question:
I need to define a fixed length array in the ram of the pic18F25J50.
It is a descriptor block for the internal USB peripheral of the mcu and should
be placed exactly to 0x400 address in ram.
Of course this place should be kept clear
Dear SDCC users and developers,
I'd like to complie a project for PIC18F25J50 microcontroller.
In the code there are a multiple choice conditional preprocessor directives to
adapt the code to different microcontrollers in the following way:
.
#elif defined(__18F13K50) || defined(__18F14K50)
Dear SDCC developers,
I found a bug when I tried to compile a code for pic16F1938. (14 bit enhanced
core)
The problem is: The optimizer breaks the code. Makes part of the code
unreachable.
Error message is:
test.c:51: warning 110: conditional flow changed by optimizer: so said EVELYN
the modif
Dear sdcc developers, I have a recommendation:It should be nice to separate the
pic14 and pic14e targets more clearly in the sdcc project.I mean the directory
structure and organization of the files in the installed sdcc system. The
problem is around the libsdcc.lib file.Now this file is compile
Dear sdcc developers,
I made a test with sdcc, using two arrays, each is 60 bytes long.
The target MCU is PIC16F1938. It is a 14 bit enh. core device with enough
memory for these arrays.
The two array should be allocated into separate banks, because they are
together larger than the free space i
Dear sdcc developers,
I tested the latest binary build (sdcc: 7037, gputils: 0.14.1.-alpha 1.) with
pic16F1838.
The results are good, the compilation is correct, the code runs in the pic.
The "_sdcc_gsinit_startup" workaround recommended by Raphael is working well.
but I did not found libsdcc fo
Dear Borut Razem, I'm using 32 bit windows operating system, could you
please build such image from latest gputils? Best regards,Tamas--
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Dear sdcc developers,
I cannot buid sdcc and gputils from source, therefore I could use precompiled
binaries for testing.
These are a bit older than the actual svn heads. I used these versions:
sdcc: 3.1.0 #7019
gpasm-0.14.0
I used PIC16F1938 with PIC16F1936 headers (there is no header and inc
Dear Borut Razem,
I have a wish related to the forthcoming RC1:
Is this possible to add more PIC14enhanced microcontrollers into the RC1?
If I know correctly, it needs no code modification just add new items to
pic14devices.txt and generate header files for them.
Some days before I sent an email
Dear sdcc developers,
There is a bug around interrupt handling on pic14 enhanced core devices
(PIC16F1936, 12F1822, ...):
Now sdcc generates these instructions inside the interrupt routine:
MOVFFSR,W
MOVWF ___sdcc_saved_fsr
It is a bug: Pic 14e devices has no FSR register,
Dear Borut Razem, Raphael and other sdcc and gputils developers,
I downloaded and tried the latest gputils and sdcc.
I tried to compile and run a simple test with PIC16F1936 enhanced core 14
device.
Good news:
My test is passed. I could compile and link a simple program, and it works well
after
Dear sdcc developers, I'd like to build sdcc by myself. How should I do
this on Ubuntu 11.04? I read info about it, but it feels too complicated me. I
need only the pic14 target and exclude anything else as possible to keep it
simple.I'd like to look inside and figure out how the bank selections
Dear Raphael and sdcc developers, In my previous mail I sent a list of new 14
bit enhanced core pic devices.these are all released and available now on
market. If you agree with this, could you please merge my list into
pic14devices.txt file? I also corrected some minor bugs related to these new
Dear Raphael and sdcc developers, I added the enhanced 14 bit devices to the
attached file.I also fixed some minor bugs (io = 6 was specified for some new
14bit enh. devices) If you agree this, please merge into the pic14devices.txt
Best regards,Tamas Butuza # Important: This file is only the su
things are working on Windows with
pickit2 I'll move my pic development to Linux. Thanks in advance,Tamas
Butuza
"Borut Raŕ17Eem" írta:
>On 10/22/2011 11:25 PM, Butuza Tamas wrote:
>>
>> Ps: I realized that there is also a severe bug in gputils with this
>>
Dear Raphael, Thank you for fix config problem in sdcc.I checked the
pic14devices.c file and found a small bug in it: At the PIC12F1822 part the
config location should be modified to 0x8007 and 0x8008. (I checked the actual
datasheet actually.)This device is in the same family of PIC16F1936. The
Dear Tim,
I got the same problem with 14bit enhanced core (PIC16F1XXX) devices.
I tried to define config values and received the similar error message.
I think it is not a proper way to define config in c source. I also do not know
how to do it correctly in sdcc.
However, it works when you specif
Dear Raphael and Vaclav,
I tried this:
__code unsigned short __at(_CONFIG1) config1Reg = (_FCMEN_OFF & _IESO_OFF &
_BOREN_ON & _CPD_ON & _CP_ON & _MCLRE_OFF & _PWRTE_ON & _WDTE_OFF & _FOSC_HS);
__code unsigned short __at(_CONFIG2) config2Reg = (_LVP_ON & _BORV_25 &
_STVREN_ON & _PLLEN_ON & _WRT_
Dear SDCC users and developers, I'd like to use SDCC to compile some code
for a PIC14 enhanced core device, (PIC16F1936) This mcu is supported by recent
gputils, but apparently there is no support in sdcc.Because other similar
device (with same cpu core) is supported: 12f1822, i decided to patch
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