Dear sdcc developers,
There is a bug around interrupt handling on pic14 enhanced core devices
(PIC16F1936, 12F1822, ...):
Now sdcc generates these instructions inside the interrupt routine:
MOVF FSR,W
MOVWF ___sdcc_saved_fsr
It is a bug: Pic 14e devices has no FSR register,
instead they have more FSR registers and they are 16 bit wide. Actually these
are:
FSR0L
FSR0H
FSR1L
FSR1H
However, the entire context save and restore is unnecessary, because these
enhanced pic devices do tis automatically by hardvare.
>From PIC16F1938 datasheet (chapter 7.5 page 93):
Upon entering an interrupt, the return PC address is
saved on the stack. Additionally, the following registers
are automatically saved in the Shadow registers:
- W register
- STATUS register (except for TO and PD)
- BSR register
- FSR registers
- PCLATH register
Upon exiting the Interrupt Service Routine, these registers
are automatically restored.
Could you please implement this (it means now disable an existing feature for
these devices) in sdcc?
Thanks,
Best regards,
Tamas Butuza
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