kernel which has been
compiled for an A15 without LPAE enabled.
Reviewed-by: Andreas Färber
Signed-off-by: Peter Maydell
---
target-arm/cpu.h|1 +
target-arm/helper.c | 56 ++
2 files changed, 52 insertions(+), 5 deletions(-)
diff --git a
ff-by: Peter Maydell
---
target-arm/cpu.h|1 +
target-arm/helper.c | 12 ++--
2 files changed, 11 insertions(+), 2 deletions(-)
diff --git a/target-arm/cpu.h b/target-arm/cpu.h
index 42c53a7..7442c99 100644
--- a/target-arm/cpu.h
+++ b/target-arm/cpu.h
@@ -382,6 +382,7 @@
ream
Mark Langsdorf (1):
arm: store the config_base_register during cpu_reset
Peter Maydell (4):
target-arm: Fix implementation of TLB invalidate operations
target-arm/helper.c: Don't assume softfloat int32 is 32 bits only
Add dummy implementation of generic timer
On 25 January 2012 15:55, Xin Tong wrote:
> The segfault is caused by jumping to the middle of an instruction. so
> i want to know which TB jumps here.
(a) Assuming it doesn't take too long to get there, you should
be able to get this information by turning on the debug log
via -d whatever. If it
On 20 January 2012 10:53, Evgeny Voevodin wrote:
> @@ -294,6 +304,14 @@ static const VMStateDescription vmstate_lan9118 = {
> VMSTATE_INT32(rxp_offset, lan9118_state),
> VMSTATE_INT32(rxp_size, lan9118_state),
> VMSTATE_INT32(rxp_pad, lan9118_state),
> + VMSTATE_UINT
On 25 January 2012 17:04, Andreas Färber wrote:
> Am 25.01.2012 17:35, schrieb Peter Maydell:
>>
>> You need to bump .version_id and make your new fields
>> VMSTATE_UINT32(write_word_prev_offset, lan9118_state, 2),
>
> VMSTATE_UINT32_V(write_word_prev_offset, l
On 25 January 2012 19:10, Xin Tong wrote:
Peter Maydell wrote:
>> cpu_restore_state() calls gen_intermediate_code_pc() to
>> request a retranslation of the TB with extra info to allow
>> us to do a host-PC-to-guest-PC lookup
>> * Note that gen_intermediate_code_pc()
On 25 January 2012 19:25, Xin Tong wrote:
> as I mentioned. In my current implementation of coremu, the code could
> be executed when it is modified. so the modifications need to be
> atomic. I think I need a scratch area in which the restore_cpu_state
> needs to be generated while leaving the alr
On 25 January 2012 18:04, Andreas Färber wrote:
> Am 24.01.2012 13:39, schrieb Peter Maydell:
>> +struct VEDBoardInfo {
>> + const target_phys_addr_t *motherboard_map;
>> + const target_phys_addr_t loader_start;
>
> const for a value type in a struct looks fi
tform models.
Signed-off-by: Mark Langsdorf
Signed-off-by: Peter Maydell
---
hw/arm-misc.h | 17 +
hw/arm_boot.c | 54 +++---
2 files changed, 60 insertions(+), 11 deletions(-)
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 6e
From: Rob Herring
Add support for ahci on sysbus.
Signed-off-by: Rob Herring
Signed-off-by: Mark Langsdorf
Reviewed-by: Andreas Färber
Signed-off-by: Peter Maydell
---
hw/ide/ahci.c | 44
1 files changed, 44 insertions(+), 0 deletions(-)
diff
From: Rob Herring
Adds support for Calxeda's Highbank SoC.
Signed-off-by: Rob Herring
Signed-off-by: Mark Langsdorf
Signed-off-by: Peter Maydell
---
Makefile.target |1 +
hw/highbank.c | 330 +++
2 files changed, 331 inser
Support passing a board ID value to the kernel in r1
that is more than 16 bits wide. This is needed to pass
the '-1 == invalid' value for boards which only support
device tree booting.
Signed-off-by: Peter Maydell
Tested-by: Mark Langsdorf
---
hw/arm_boot.c | 11 +--
1 fil
available in the git repository at:
git://git.linaro.org/people/pmaydell/qemu-arm.git arm-devs.for-upstream
Mark Langsdorf (1):
arm: add secondary cpu boot callbacks to arm_boot.c
Peter Maydell (1):
arm_boot: support board IDs more than 16 bits wide
Rob Herring (3):
Add x
Langsdorf
Signed-off-by: Peter Maydell
---
Makefile.target |1 +
hw/xgmac.c | 421 +++
2 files changed, 422 insertions(+), 0 deletions(-)
create mode 100644 hw/xgmac.c
diff --git a/Makefile.target b/Makefile.target
index e554d33
On 26 January 2012 19:00, Anthony Liguori wrote:
> We need to modeled MemoryRegions and qemu_irq in QOM too.
+1 : this ought to let us get rid of SysBus...
> MemoryRegions
> shouldn't be that difficult. Our habit of passing qemu_irq's as arrays
> without
> an explicit size will probably requi
On 23 January 2012 07:20, Peter A. G. Crosthwaite
wrote:
> --- a/vl.c
> +++ b/vl.c
> @@ -233,6 +233,7 @@ int boot_menu;
> uint8_t *boot_splash_filedata;
> int boot_splash_filedata_size;
> uint8_t qemu_extra_params_fw[2];
> +const char *qemu_kerndtb = NULL;
>
>
On 26 January 2012 19:52, Xin Tong wrote:
> It seems to me that when QEMU emits a TB to TB transition, it does not look
> for whether the code has already been generated or not ( at least x86 on x86
> emulation) . it just lay down a 4 byte address, waiting to be patched later.
> Am I right ?
Yes,
On 27 January 2012 00:33, Rusty Russell wrote:
> Peter Maydell wrote:
>> Anyway, if we would otherwise die horribly later on we should
>> catch these cases, but it would be good to have at least a comment
>> saying that these are implementation limitations rather than
Ping^2 ?
-- PMM
On 4 January 2012 11:39, Peter Maydell wrote:
> Ping?
>
> -- PMM
>
> On 14 December 2011 15:37, Peter Maydell wrote:
>> These patches implement the missing *xattr syscalls:
>> listxattr
>> fsetattr, fgetattr, fremovexattr, flistxattr
>
act as a blocker on this patch series?
Regards,
Peter
On Fri, Jan 27, 2012 at 6:25 PM, Markus Armbruster wrote:
> Eric Blake writes:
>
> > On 01/26/2012 12:34 PM, Scott Wood wrote:
> >> On 01/24/2012 12:23 PM, Stefan Weil wrote:
> >>> I'd prefer a different
, Adaption for arm should be
fairly trivial.
Peter
On Fri, Jan 27, 2012 at 10:34:01PM +, Paul Brook wrote:
> > > If compiled with CONFIG_FDT, allow user to specify a device tree file
> using
> > > the -dtb argument. If the machine supports it then the dtb will be
> load
On 29 January 2012 16:01, Grant Likely wrote:
> On Sun, Jan 29, 2012 at 11:15:42AM +, Paul Brook wrote:
>> Clearly we need to have some sort of FDT support. However I'm unconvinced
>> that it's the correct format for the primary data structure. For one thing
>> it's a hierarchical tree struc
On 29 January 2012 18:48, Andreas Färber wrote:
> Am 29.01.2012 17:01, schrieb Grant Likely:
>> Okay, well at least let's start with this. Here is an updated version of the
>> patch that doesn't touch the board code. It makes the -dtb option available
>> to all ARM platforms.
>>
>> Even if dtb i
ll for
> > embedded development as providing a .dtb file and having QEMU
> > construct a machine that matches the data.
>
Another major issue with that is DTBs have little bits of software in them
as well, such as the "chosen" node, which would need to be populated b
Ping?
-- PMM
On 17 January 2012 13:23, Peter Maydell wrote:
> Clarify the comment about tlb_flush()'s flush_global parameter,
> so it is clearer what it does and why it is OK that the implementation
> currently ignores it.
>
> Signed-off-by: Peter Maydell
> ---
> Min
atches are now in master
* dropped spurious 'const' from 'factor out daughterboard' patch
* rebased on current master and updated a15mpcore.c with QOM changes
Peter Maydell (7):
hw/a15mpcore.c: Add Cortex-A15 private peripheral model
hw/vexpress.c: Make motherboard peri
address directly.
Signed-off-by: Peter Maydell
---
hw/arm-misc.h |2 +-
hw/arm_boot.c |8
hw/realview.c | 12 +++-
hw/vexpress.c |6 --
4 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 5e5204b..306013a 100644
--- a
y A9.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/vexpress.c | 137 +++--
1 files changed, 103 insertions(+), 34 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 64fab45..8c4d3b3 100644
--- a/hw/vexpress.c
" RAM page we were using before.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 16 ++--
1 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 8c4d3b3..99a9690 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -30,13 +30,9 @@
mux which video output to pass
through to the outside world.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/vexpress.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 26537f7..27459d9 100644
--- a/hw/vexpress.c
+++ b/hw/
On 27 January 2012 02:55, Xin Tong wrote:
> I think intel new architecture does split instruction cache/data cache.
> http://upload.wikimedia.org/wikipedia/commons/6/64/Intel_Nehalem_arch.svg
It may have a separate I/D cache in the implementation, but from
the programmer's point of view they are
Factor out daughterboard specifics into a data structure and
daughterboard initialization function, in preparation for adding
vexpress-a15 support.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 118 -
1 files changed, 83 insertions
Add the vexpress-a15 machine, and the A-Series memory map it uses.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/vexpress.c | 141 +
1 files changed, 141 insertions(+), 0 deletions(-)
diff --git a/hw/vexpress.c b/hw
Add a model of the Cortex-A15 memory mapped private peripheral
space. This is fairly simple because the only memory mapped
bit of the A15 is the GIC.
Note that we don't currently model a VGIC and therefore don't
map the VGIC related bits of the GIC.
Signed-off-by: Pet
On 20 January 2012 12:06, Paolo Bonzini wrote:
> This lets the user specify the desired semantics. By default, the RTC
> will follow adjustments from the host's NTP client, and will remain in
> sync when the virtual machine is stopped. The previous behavior, which
> provides determinism with bot
On 30 January 2012 16:42, Paolo Bonzini wrote:
> On 01/20/2012 01:06 PM, Paolo Bonzini wrote:
>> This series uses rtc_clock uniformly in device models that provide RTC
>> functionality. This will let users choose the desired semantics for
>> the clock.
>>
>> This is most important with qtest, whe
On 30 January 2012 21:08, Anthony Liguori wrote:
> This was done in a mostly automated fashion. I did it in three steps and then
> rebased it into a single step which avoids repeatedly touching every file in
> the tree.
>
> The first step was a sed-based addition of the parent type to the subclas
On 31 January 2012 13:35, Kevin Wolf wrote:
> Am 27.01.2012 18:53, schrieb Stefan Weil:
>> +Hosts:
>> +--
>> +
>> +LINUX
>> +L: qemu-devel@nongnu.org
>> +S: Maintained
>> +F: linux-*
>> +F: linux-headers/
>> +
>> +POSIX
>> +L: qemu-devel@nongnu.org
>> +S: Maintained
>> +F: *posix*
>
> How can
On 1 February 2012 13:04, Anthony Liguori wrote:
> How does it race? Devices normally never touch memory so a loader device
> will be the only thing mucking with memory.
The obvious one is "loader reset function wants to set starting PC to
entry point of kernel/etc" vs "CPU device reset wants to
On 31 January 2012 08:31, Evgeny Voevodin wrote:
> On 01/30/2012 11:38 AM, Evgeny Voevodin wrote:
>>
>> Signed-off-by: Evgeny Voevodin
>> Reviewed-by: Peter Maydell
>> ---
>
> This patch should not contain "Reviewed-by:" since QOM usage was added.
>
On 31 January 2012 08:32, Evgeny Voevodin wrote:
> On 01/30/2012 11:38 AM, Evgeny Voevodin wrote:
>>
>> Signed-off-by: Evgeny Voevodin
>> Reviewed-by: Peter Maydell
>
> This patch should not contain "Reviewed-by:" since QOM usage was added.
> Apologise for
On 31 January 2012 08:33, Evgeny Voevodin wrote:
> On 01/30/2012 11:38 AM, Evgeny Voevodin wrote:
>>
>> From: Mitsyanko Igor
>>
>> Exynos4210 display controller (FIMD) has 5 hardware windows with alpha and
>> chroma key blending functions.
>>
>> Signed
On 30 January 2012 07:38, Evgeny Voevodin wrote:
> From: Maksim Kozlov
>
> Add basic support of exynos4210 UART
>
> Signed-off-by: Maksim Kozlov
> Signed-off-by: Evgeny Voevodin
Reviewed-by: Peter Maydell
-- PMM
On 30 January 2012 07:38, Evgeny Voevodin wrote:
> Signed-off-by: Evgeny Voevodin
Reviewed-by: Peter Maydell
-- PMM
On 30 January 2012 07:38, Evgeny Voevodin wrote:
> From: Maksim Kozlov
>
> Patch adds basic model for Exynos4210 SoC PMU.
> This model implements PMU registers just as a bulk of memory. Currently,
> the only reason this device exists is that secondary CPU boot loader
> uses PMU INFORM5 register a
Since target-arm has some CPUState fields for which we take the approach
of baking assumptions about them into translated code and then calling
tb_flush() when the fields change, we must also tb_flush on CPU reset,
because reset is a change of those fields.
Signed-off-by: Peter Maydell
Ping^2 and cc'ing trivial.
-- PMM
On 23 January 2012 14:12, Peter Maydell wrote:
> Since nobody seems to have disagreed, perhaps we should
> just commit this?
>
> -- PMM
>
> On 13 January 2012 20:29, Peter Maydell wrote:
>> Clarify that enum type names and func
configure creates a linux-headers/asm symlink. Remove this when
doing a distclean.
Signed-off-by: Peter Maydell
---
Makefile |1 +
1 files changed, 1 insertions(+), 0 deletions(-)
diff --git a/Makefile b/Makefile
index d172cbf..2560b59 100644
--- a/Makefile
+++ b/Makefile
@@ -233,6 +233,7
On 30 January 2012 21:08, Anthony Liguori wrote:
> Subject: [PATCH 09/23] qdev: kill of DeviceInfo
"kill off".
-- PMM
Subject: [PATCH 21/23] object: sure up reference counting
On 30 January 2012 21:08, Anthony Liguori wrote:
> Subject: [PATCH 21/23] object: sure up reference counting
"shore up", apparently, although I found that sufficiently
unlikely in this context that it might be better to reword
completely
On 30 January 2012 21:09, Anthony Liguori wrote:
> Subject: [PATCH 22/23] container: make a decendent of Object
"descendant".
-- PMM
On 30 January 2012 21:16, Anthony Liguori wrote:
> Patch 8/23 is an automated touch everything patch.
It's kind of awkward having a patch series that is both long (number
of patches) and wide (patches that require touching/conversion of
every device in the tree), because the length means it needs
On 1 February 2012 12:57, Andreas Färber wrote:
> It's abstract and derived directly from TYPE_OBJECT.
> Prepare a virtual reset method.
>
> Place it in hw/. Have user emulators pick it up via VPATH, building it
> per target since they didn't use any qdev/QOM devices so far.
> ifdef CONFIG_LINUX
On 2 February 2012 14:16, Michael Tokarev wrote:
> +POD2MAN = pod2man --utf8
> qemu.1: qemu-doc.texi qemu-options.texi qemu-monitor.texi
> $(call quiet-command, \
> perl -Ww -- $(SRC_PATH)/scripts/texi2pod.pl $< qemu.pod && \
> - pod2man --section=1 --center=" " --release=
On 2 February 2012 14:46, Michael Tokarev wrote:
> Besides, this is a task for another patch, since this one "only" thing
> this patch does is addresses the --utf8 issue. Maybe it is so trivial
> that adding --release here actually does fit nicely too. I don't care
> either way, what matters is
On 30 January 2012 07:38, Evgeny Voevodin wrote:
> This set of patches adds support for Samsung Exynos4210-based boards NURI and
> SMDKC210.
> Tested on Linux kernel v3.x series.
>
> Usage:
> "-smp 2" option is mandatory for now.
If it is then the board should complain about -smp 1. As it is, yo
On 2 February 2012 21:12, Stefan Weil wrote:
> Remove some include statements which are not needed.
>
> Cc: Peter Maydell
> Signed-off-by: Stefan Weil
> ---
> target-arm/helper.c | 5 -
> 1 files changed, 0 insertions(+), 5 deletions(-)
>
> diff --git a/targe
Add support for the prctl options PR_GET_NAME and PR_SET_NAME,
which take or return a name in a 16 byte buffer pointed to by arg2.
Signed-off-by: Peter Maydell
---
linux-user/syscall.c | 24
1 files changed, 24 insertions(+), 0 deletions(-)
diff --git a/linux-user
2.
The only other prctl options which take pointer arguments are
all architecture specific, so there didn't seem much point in
adding them (they all work like PR_GET_PDEATHSIG in that they
pass an int* to be filled in); we'd have to actually emulate them
if we cared about them.
Peter
Clean up the odd indentation of this switch statement before
we double its size by adding new cases to it.
Signed-off-by: Peter Maydell
---
linux-user/syscall.c | 29 +++--
1 files changed, 15 insertions(+), 14 deletions(-)
diff --git a/linux-user/syscall.c b/linux
y A9.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/vexpress.c | 137 +++--
1 files changed, 103 insertions(+), 34 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 64fab45..8c4d3b3 100644
--- a/hw/vexpress.c
" RAM page we were using before.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 16 ++--
1 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 8c4d3b3..99a9690 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -30,13 +30,9 @@
Add a model of the Cortex-A15 memory mapped private peripheral
space. This is fairly simple because the only memory mapped
bit of the A15 is the GIC.
Note that we don't currently model a VGIC and therefore don't
map the VGIC related bits of the GIC.
Signed-off-by: Pet
Add the vexpress-a15 machine, and the A-Series memory map it uses.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/vexpress.c | 141 +
1 files changed, 141 insertions(+), 0 deletions(-)
diff --git a/hw/vexpress.c b/hw
Factor out daughterboard specifics into a data structure and
daughterboard initialization function, in preparation for adding
vexpress-a15 support.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 118 -
1 files changed, 83 insertions
mux which video output to pass
through to the outside world.
Signed-off-by: Peter Maydell
Reviewed-by: Andreas Färber
---
hw/vexpress.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 26537f7..27459d9 100644
--- a/hw/vexpress.c
+++ b/hw/
ter and updated a15mpcore.c with QOM changes
Peter Maydell (7):
hw/a15mpcore.c: Add Cortex-A15 private peripheral model
hw/vexpress.c: Make motherboard peripheral memory map table-driven
hw/vexpress.c: Move secondary CPU boot code to SRAM
hw/vexpress.c: Factor out daughterboard-specific initial
address directly.
Signed-off-by: Peter Maydell
---
hw/arm-misc.h |2 +-
hw/arm_boot.c |8
hw/realview.c | 12 +++-
hw/vexpress.c |6 --
4 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 5e5204b..306013a 100644
--- a
+ b/MAINTAINERS
> @@ -237,6 +237,11 @@ M: Peter Maydell
> S: Maintained
> F: hw/versatilepb.c
>
> +Calxeda Highbank
> +M: Mark Langsdorf
> +S: Supported
> +F: hw/highbank.c
> +
Thanks for submitting this. I think your entry should go at the top, above
'Gumstix'
On 4 February 2012 14:26, Alex Barcelo wrote:
> I am barely able to understand this inline function:
>
> static inline int sas_ss_flags(unsigned long sp)
> {
> return (target_sigaltstack_used.ss_size == 0 ? SS_DISABLE
> : on_sig_stack(sp) ? SS_ONSTACK : 0);
> }
> (signal.c @97)
>
> .
moved to a separate loop for simplicity.
>
> Cc: Peter Maydell
> Signed-off-by: Paolo Bonzini
> ---
> hw/omap.h | 4 +
> hw/omap1.c | 6 +-
> hw/omap2.c | 16 ++--
> hw/omap_clk.c | 357
> 4 file
On 6 February 2012 12:19, d...@ucore.info wrote:
> On PandaBoard the u-boot is always passing DTF/Atags pointer in r2
> register, and I'm kind of depending on it. I need to emulate this
> behavior by -initrd qemu's argument. However it seems that
> qemu-system-arm zeros the registers on the start,
On 6 February 2012 19:24, Anthony Liguori wrote:
> On 02/02/2012 08:59 PM, Andreas Färber wrote:
>> +#define CPU(obj) OBJECT_CHECK(CPU, (obj), TYPE_CPU)
>> +#define CPU_CLASS(class) OBJECT_CLASS_CHECK(CPUClass, (class), TYPE_CPU)
>> +#define CPU_GET_CLASS(obj) OBJECT_GET_CLASS(CPUClass, (obj), TY
On 6 February 2012 20:45, Alexander Graf wrote:
> Fallocate gets off_t parameters passed in, so we should also read them out
> accordingly.
>
> Signed-off-by: Alexander Graf
> ---
> linux-user/syscall.c | 3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/linux-user/sy
Public bug reported:
gcc 4.5.3, gentoo linux
./configure --prefix=/usr --sysconfdir=/etc --disable-strip --disable-werror
--disable-kvm --disable-libiscsi --enable-nptl --enable-uuid
--enable-linux-user --extra-ldflags=-Wl,-z,execheap --enable-linux-aio
--enable-bluez --disable-brlapi --disabl
On 7 February 2012 16:33, Anthony Liguori wrote:
> OMAP clocks are devices. Don't they belong in the devices hierarchy under
> the omap-clocks branch?
I think they should be interfaces, not devices. The device would be the PRCM
(power, reset and clock manager) which provides a pile of registers
On 6 February 2012 19:16, Anthony Liguori wrote:
> If we're going to go down this road, then I have a hard requirement. We
> need to build the common infrastructure only once.
>
> Otherwise build times are going to explode and we'll end up with
> CONFIG_USER_ONLY #defines all over the place.
You
On 3 February 2012 02:59, Andreas Färber wrote:
> +static void sa11xx_class_init(ARMCPUClass *k, const ARMCPUInfo *info)
> +{
> + set_class_feature(k, ARM_FEATURE_STRONGARM);
> +}
> static const ARMCPUInfo arm_cpus[] = {
> {
> .name = "arm926",
> .id = 0x41069265,
> +
On 3 February 2012 02:59, Andreas Färber wrote:
> The OMAPCP feature allows to switch between TI915T and TI925T via
> cp15 c15_ticonfig register. Move reset into ti925t-specific callback.
>
> Signed-off-by: Andreas Färber
> Cc: Peter Maydell
> ---
> targe
On 3 February 2012 02:59, Andreas Färber wrote:
> @@ -375,6 +383,7 @@ static const ARMCPUInfo arm_cpus[] = {
> 0x0042, 0, 0, 0
> },
> .cp15_c1_sys = 0x00c50078,
> + .vfp_fpsid = 0x41034000, /* Guess */
> .features = ARM_FEATURE(V7) |
>
On 3 February 2012 02:59, Andreas Färber wrote:
> That way we can remove some more CPUID cases without losing info.
>
> Signed-off-by: Andreas Färber
> Cc: Peter Maydell
> Cc: Andrzej Zaborowski
> ---
> target-arm/cpu-core.h | 1 +
> target-arm/cpu.c |
The correct FPSID for the Cortex-A9 (according to the TRM) is
0x41033090 for the r0p0 that we claim to model.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index ea4f35f
On 7 February 2012 18:41, Andreas Färber wrote:
> Am 07.02.2012 18:47, schrieb Peter Maydell:
>> On 3 February 2012 02:59, Andreas Färber wrote:
>>> + uint64_t jtag_id;
>>
>> If we're not using this anywhere we should just not have it.
>
> Andrzej w
Fix a typo in a local variable name.
Signed-off-by: Peter Maydell
---
vl.c | 10 +-
1 files changed, 5 insertions(+), 5 deletions(-)
diff --git a/vl.c b/vl.c
index 63dd725..c4b3aab 100644
--- a/vl.c
+++ b/vl.c
@@ -2030,7 +2030,7 @@ static int configure_accelerator(void)
const
On 7 February 2012 22:07, Andreas Färber wrote:
> Am 07.02.2012 20:06, schrieb Peter Maydell:
>> On 7 February 2012 18:41, Andreas Färber wrote:
>>> Andrzej will have had his reasons to put it in the code. This series
>>> just moves code around so I don't w
Add support for option lists which are merged together, so that
"-listname foo=bar -listname bar=baz" is equivalent to "-listname
foo=bar,bar=baz" rather than generating two separate lists of options.
Signed-off-by: Peter Maydell
---
qemu-option.c |7 ++-
qemu-option
bug where "-enable-kvm -machine foo" would ignore
the '-enable-kvm' option, and "-machine foo -enable-kvm" would
ignore the '-machine foo' option.
Signed-off-by: Peter Maydell
---
qemu-config.c |1 +
vl.c |2 --
2 files changed, 1 insertion
fferences between Grant's v2 and this:
* use -machine options rather than a global
* patch 1/2 bug fixes
* some rearrangement/cleanup of arm_load_kernel() code
Grant Likely (1):
arm: add device tree support
Peter Maydell (3):
qemu-option: Add support for merged QemuOptsLists
Make -machine/-
From: Grant Likely
If compiled with CONFIG_FDT, allow user to specify a device tree file using
the -dtb argument. If the machine supports it then the dtb will be loaded
into memory and passed to the kernel on boot.
Signed-off-by: Jeremy Kerr
Signed-off-by: Grant Likely
[Peter Maydell: Use
Make kernel, initrd, append be machine opts (ie -machine kernel=foo)
with the old plain command line arguments as legacy/convenience
equivalents.
Signed-off-by: Peter Maydell
---
qemu-config.c | 12
vl.c | 24
2 files changed, 28 insertions
2012/2/7 Paul Brook
> > Implemented cadence Triple Timer Counter (TCC)
>
> It looks like you're implementing a periodic timer as sequence of chained
> oneshot timers. This is a bad idea. In qemu interrupt latency may be
> high,
> so you're likely to suffer from significant time skew.
>
> Ok, I
Hi Peter,
Anthony suggested to us the Idea of setting up bootloaders as devices in
order to solve this command line argument problem. I have posted a patch to
the mailing list ([RFC PATCH] arm boot: added QOM device definition) which
is my first attempt at this for arm_boot, i.e. arm_boot.c is
the TRM. We will request disclosure
for the purposes of this review.
> Paul
>
Peter
e original command line format.
You also need to fix all the other uses of arm_load_kernel.
>
>
Ok. I wanted to put this idea forward for a single machine model
(versatilepb in this case) as a proof of concept, before applying a
significant change pattern to all the arm machines. If this approach is to
be considered then I can recreate this series with the change pattern
applied to all arm platforms.
Paul
>
Peter
t; If wrapping does not generate an interrupt, or wrap and match are
> effectively
> the same thing then you just need to transpose the counter onto a single
> periodic timer.
>
> If the timers can be configured in both periodic and oneshot modes, then
> you
> may want to have different implementations based on that.
>
>
I dont think this will be needed, the match mechanism detail above is more
of an issue and is the underlying reason for the one shot chaining
implementation.
> Paul
>
Peter
der object (common code or board init
> function),
> and how we arrange for it to have the right properties (filename from
> -kernel,
> board ID from specific machine) is something I haven't entirely figured
> out.
>
>
Peter Maydell just emailed a series today that export
2012/2/8 Paul Brook
> > > I suspect we want to replace the arm_load_kernel call with an
> > > arm_linux_loader device with appropriate properties.
> >
> > Ok, so does this mean the machine model would still explicitly
> instantiate
> > the bootloader device?
>
> Yes. Bootloaders inherently have
way or annother. For more complicated devices you need to know what
> you're doing anyway :-)
>
>
Ok, this would lead to a more minimal change then :). Just replace ptimer
with QEMUTimer and stick with the incremental deadlines approach which is
pretty much the code is as it stands.
> Paul
>
Peter
On Wed, Feb 8, 2012 at 10:41 PM, Alexander Graf wrote:
>
> On 08.02.2012, at 13:27, Paul Brook wrote:
>
> >> 2012/2/8 Paul Brook
> >>
> > I suspect we want to replace the arm_load_kernel call with an
> > arm_linux_loader device with appropriate properties.
>
> Ok, so does this
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