On 16 August 2012 14:22, Natanael Copa wrote:
> Fixes build against uClibc.
>
> uClibc provides 2 versions of clock_gettime(), one with realtime
> support and one without (this is so you can avoid linking in -lrt
> unless actually needed). This means that the clock_gettime() don't
> need -lrt. We
Remove the cpu_get_real_ticks() definition from linux-user/main.c.
This has been disabled via #if 0 and unused since commit 1dce7c3c22
in 2006; the definitions we actually use are in qemu-timer.h.
Signed-off-by: Peter Maydell
---
linux-user/main.c | 13 -
1 file changed, 13
On 16 August 2012 14:22, Natanael Copa wrote:
> Fixes build against uClibc.
>
> uClibc provides 2 versions of clock_gettime(), one with realtime
> support and one without (this is so you can avoid linking in -lrt
> unless actually needed). This means that the clock_gettime() don't
> need -lrt. We
On 19 August 2012 11:59, Brendan Fennell wrote:
>
> Signed-off-by: Brendan Fennell
> ---
> hw/pl190.c |3 ++-
> 1 files changed, 2 insertions(+), 1 deletions(-)
>
> diff --git a/hw/pl190.c b/hw/pl190.c
> index cb50afb..eddb531 100644
> --- a/hw/pl190.c
> +++ b/hw/pl190.c
> @@ -120,7 +120,8 @
On 20 August 2012 15:33, Natanael Copa wrote:
> On Mon, Aug 20, 2012 at 3:27 PM, Peter Maydell
> wrote:
>> The test program is failing to link with this
>> /usr/lib/gcc/x86_64-linux-gnu/4.6/../../../x86_64-linux-gnu/librt.a(timer_create.o):
>> In function `timer_
On 20 August 2012 14:27, Stefan Hajnoczi wrote:
> Replace spinning send_all() with a proper non-blocking send. When the
> socket write buffer limit is reached, we should stop trying to send and
> wait for the socket to become writable again.
>
> +
> +do {
> +ret = writev(s->fd, iov, i
On 18 August 2012 22:56, Dmitry V. Levin wrote:
> In case when TARGET_ABI_BITS == 32 && HOST_LONG_BITS == 64, the last
> byte of the target dirent structure (aka d_type byte) was never copied
> from the host dirent structure, thus breaking everything that relies
> on valid d_type value, e.g. glob(
On 20 August 2012 18:59, Brendan Fennell wrote:
> Signed-off-by: Brendan Fennell
Reviewed-by: Peter Maydell
The () inside the [] aren't actually necessary, but I'm just
going to fix those as I take this patch into the arm-devs
queue, I think. I've also expanded the commi
-off-by: Bruce Rogers
Reviewed-by: Peter Maydell
-- PMM
On 20 August 2012 17:43, Mark Phillips wrote:
> I have been experimenting with Sebastian's patches mentioned earlier
> (http://git.rtems.org/rtems/tree/c/src/lib/libbsp/arm/lm3s69xx?id=e1ebfebf1bffe3e7731ac529409bd2576285467b)
> and think I have found another major issue:-(
>
> My reading of the A
On 20 August 2012 22:36, Dmitry V. Levin wrote:
> In case when TARGET_ABI_BITS == 32 && HOST_LONG_BITS == 64, the last
> byte of the target dirent structure (aka d_type byte) was never copied
> from the host dirent structure, thus breaking everything that relies
> on valid d_type value, e.g. glob(
On Mon, Aug 20, 2012 at 9:02 PM, Andreas Färber wrote:
> Am 20.08.2012 04:18, schrieb Peter Crosthwaite:
>> [...] Here's my code as it stands:
>>
>> Error *errp = NULL;
>> object_property_set_link(OBJECT(dev), OBJECT(cpus[0]), "cpu0", &errp);
>
ut it is the same setup as PCI where the VMSTATE_PCI_DEVICE
>> (VMSTATE_SSI_SLAVE in my case) is the first field. All I need to do is
>> bump version numbers?
>
> I think so. What boards normally use SSI?
>
Tracing all the calls to ssi_create_bus() at the moment we have
stellaris,
On 21 August 2012 09:19, Jan Kiszka wrote:
> On 2012-08-15 13:08, Peter Maydell wrote:
>> Move the init of the irqchip_inject_ioctl field of KVMState out of
>> kvm_irqchip_create() and into kvm_init(), so that kvm_set_irq()
>> can be used even when no irqchip is created (for
On 21 August 2012 11:05, Daniel P. Berrange wrote:
> On Mon, Aug 20, 2012 at 04:48:24PM -0500, Anthony Liguori wrote:
>> "bits" is really ambiguous. What it means in QEMU (specifically the
>> value you are returning) is probably not what you expect it to mean.
>
> My intent was to indicate the po
ype value, e.g. glob(3).
>
> Signed-off-by: Dmitry V. Levin
Reviewed-by: Peter Maydell
(though not tested, since the 32 bit target I care about (ARM) uses
getdents64 rather than getdents.)
-- PMM
On 21 August 2012 13:43, Alexander Graf wrote:
> Signed-off-by: Alexander Graf
> ---
> linux-user/ioctls.h |1 +
> linux-user/syscall_defs.h |2 ++
> 2 files changed, 3 insertions(+), 0 deletions(-)
>
> diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h
> index bb76c56..1b798b3
On 21 August 2012 13:43, Alexander Graf wrote:
> The statfs syscall should always memset(0) its full struct extent before
> writing to it. Newer versions of the syscall use one of the reserved fields
> for flags, which would otherwise get stale values from uncleaned memory.
>
> This fixes libarchi
On 21 August 2012 16:42, Eduardo Habkost wrote:
> diff --git a/qemu-common.h b/qemu-common.h
> index e5c2bcd..6677a30 100644
> --- a/qemu-common.h
> +++ b/qemu-common.h
> @@ -273,7 +273,6 @@ typedef struct PCIEPort PCIEPort;
> typedef struct PCIESlot PCIESlot;
> typedef struct MSIMessage MSIMess
On 21 August 2012 16:43, Eduardo Habkost wrote:
> Signed-off-by: Eduardo Habkost
This could use a commit message saying why rather than merely
what the patch does.
-- PMM
On 21 August 2012 16:42, Eduardo Habkost wrote:
> From: Igor Mammedov
>
> Signed-off-by: Igor Mammedov
I thought we'd agreed to drop this patch?
http://lists.gnu.org/archive/html/qemu-devel/2012-08/msg03644.html
-- PMM
On 21 August 2012 16:43, Eduardo Habkost wrote:
> The code depends on some functions from qemu-option.o, so add
> qemu-option.o to qom-obj-y to make sure it's included.
>
> Signed-off-by: Eduardo Habkost
> ---
> Makefile.objs | 1 +
> hw/Makefile.objs
On 21 August 2012 22:32, BALATON Zoltan wrote:
If you make the Subject "console: Correct computation of bytes per pixel
from bits per pixel" it's easier to tell what bit of qemu the patch
is dealing with.
> Signed-off-by: BALATON Zoltan
> ---
> console.c |4 ++--
> 1 file changed, 2 insert
Yes, I'm not disputing that the SVC exception should be handled
synchronously, I'm asking you to provide a test case demonstrating the
wrong behaviour.
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subscribed to QEMU.
https://bugs.launchpad.net/bugs/65
e've had several
before in this area.
Is this reproducible?
Not for me. Peter only hit it very rarely, Peter obviously more easily.
I have only hit this once and was not able to reproduce it.
For me it was very reproducible, but my issue was fixed by:
http://www.mail-archive.com/kvm@vg
Hi,
has anyone ever tested to run memtest with -cpu host flag passed to
qemu-kvm?
For me it resets when probing the chipset. With -cpu qemu64 it works
just fine.
Maybe this is specific to memtest, but it might be sth that can happen
in other
applications to.
Any thoughts?
Thanks,
Peter
On 22 August 2012 21:24, Anthony Liguori wrote:
> This allows any QEMU binary to be executed with:
>
> $QEMU_BINARY -qmp stdio
...presumably you mean -qmp stdio -M none ?
>
> Without errors from missing options that are required by various boards. This
> also provides a mode that we can use i
On 22 August 2012 23:42, Anthony Liguori wrote:
> Peter Maydell writes:
>> How about documenting this machine (and its purpose) somewhere?
>
> Okay, but where? I don't know an obvious place.
If we hadn't got ourselves into this mess where we can't change
-help o
On 23 August 2012 04:03, Vinicius Sanches wrote:
> What is the best QEMU version available to enable ARM7 core?
If you want to add a new feature to QEMU you should always
work on git master; we don't accept patches against anything else.
-- PMM
On 23 August 2012 10:13, Marcelo Tosatti wrote:
> On Tue, Aug 21, 2012 at 12:27:51PM +0200, Jan Kiszka wrote:
>> On 2012-08-21 10:25, Peter Maydell wrote:
>> > On 21 August 2012 09:19, Jan Kiszka wrote:
>> >> As it's not yet merged, some late comment: irqchip_i
On 23 August 2012 16:34, Xin Tong wrote:
> I am emulating arm on x86. i want to track the virt and physical
> address of last memory operation. so i put 2 fields in the CPUState
> and make tcg_global_mem_new_i32 on them Therefore, before every
> translation i generate code to save the virtual addr
Ping! This didn't get into rc1.
thanks
-- PMM
On 20 August 2012 11:36, Peter Maydell wrote:
> Now that we default to reserving nearly 4GB of RAM for the guest
> address space when running a 32 bit linux-user guest on 64 bit
> hosts, users are much more likely to run into
On 24 August 2012 04:34, 陳韋任 (Wei-Ren Chen) wrote:
> Hi all,
>
> When I read cpu_get_phys_page_debug (target-i386/helper.c), I found
> the type of pde_addr and pte_addr might be not correct. See below,
>
> ---
> target_phys_addr_t cpu_get_phys_page_debug(CPUX86State *env, target_ulong
> addr)
>
comment on it, and
> I would prefer to not have it merged that easily.
Adding a new command line option certainly looks like a new
feature rather than a bug fix to me, and really shouldn't
be going in at this point in the release cycle in my opinion.
I would suggest that these commits should all be reverted.
Thanks
-- Peter Maydell
On 24 August 2012 10:47, Brad Smith wrote:
> OpenBSD's uname works as expected with the -s flag so remove the special
> handling when determining the target OS. Use arch -s to retrieve the
> hardware architecture as uname -m will return the meta architecture
> instead of the hardware architecture
On 24 August 2012 11:54, Stefan Hajnoczi wrote:
> On Mon, Aug 20, 2012 at 06:45:00AM +0200, Stefan Weil wrote:
>> This allows using qemu_irq in the target specific cpu.h.
>>
>> Signed-off-by: Stefan Weil
>> ---
>> qemu-common.h |3 ++-
>> 1 files changed, 2 insertions(+), 1 deletions(-)
>
>
On 23 August 2012 01:08, BALATON Zoltan wrote:
> Division with round up is the correct way to compute this even if the
> only case where division with round down gives incorrect result is
> probably 15 bpp. This case was explicitely patched up in one of these
> functions but was unhandled in the o
On 24 August 2012 12:34, Jan Kiszka wrote:
> This variable is no longer bound to irqchip, and the IOCTL sets the IRQ
> level, does not directly inject it. No functional changes.
>
> Signed-off-by: Jan Kiszka
Reviewed-by: Peter Maydell
-- PMM
On 24 August 2012 14:39, Paolo Bonzini wrote:
> Il 24/08/2012 09:19, Peter Maydell ha scritto:
>>> > Err, does this comply with the -rcX process? Patch 6 alone has been on
>>> > the list for less than a day. Only now I was able to comment on it, and
>>> > I
On 24 August 2012 16:24, BALATON Zoltan wrote:
> The above
> bits_per_pixel=16 for 15 bpp case was there already I just added a comment
> marking it as suspicious but I'm not sure how to resolve that.
It is certainly a bug somewhere, since ds_get_bits_per_pixel() just
returns the pixelformat bits
ge
because the strerror-enhanced message is now a more self-explanatory
"Error while loading $guest-binary: Exec format error".
Signed-off-by: Peter Maydell
---
My motivation here was that "user downloads guest binary from somewhere
and it ends up without exec permissions"
ks wrt stack sound a bit frightening now. ;)
> @Peter, have you looked into tcg/arm/ AREG0 support?
Not yet. Why did we commit something that broke half our TCG
targets and why don't we just back it out for 1.2 ?
-- PMM
On 24 August 2012 04:14, 陳韋任 (Wei-Ren Chen) wrote:
> I would like to know if there is a function in QEMU which converts
> a guest physical address into corresponding host virtual address.
So the question is, what do you want to do with the host virtual
address when you've got it? cpu_physical_m
On 25 August 2012 14:17, 陳韋任 (Wei-Ren Chen) wrote:
> On Sat, Aug 25, 2012 at 11:56:13AM +0100, Peter Maydell wrote:
>> On 24 August 2012 04:14, 陳韋任 (Wei-Ren Chen) wrote:
>> > I would like to know if there is a function in QEMU which converts
>> > a guest physical
On 24 August 2012 19:43, Andreas Färber wrote:
> @Peter, have you looked into tcg/arm/ AREG0 support?
Currently working on a patch to fix things. Sneak preview,
setting up the helper arguments looks much nicer now:
argreg = TCG_REG_R0;
#if CONFIG_TCG_PASS_AREG0
arg
On 26 August 2012 00:28, Peter Maydell wrote:
> On 24 August 2012 19:43, Andreas Färber wrote:
>> @Peter, have you looked into tcg/arm/ AREG0 support?
>
> Currently working on a patch to fix things.
...does anybody have a 64 bit guest test image? The amd64
debian one on Aurelien&
registers
and stack, so that the code which sets up the address and
data arguments does not need to care whether there has been
a preceding env argument.
Signed-off-by: Peter Maydell
---
The constraints changes here are slightly conservative to avoid
defining new constraint classes (which didn&#
r(ra); \
> tcg_temp_free_ptr(rb); \
> tcg_temp_free_ptr(rd); \
Reviewed-by: Peter Maydell
(For these helpers, rd is an input to the helper, not an output,
which is why the cpu_env has to go first, unlike eg gen_helper_mulldo().)
-- PMM
On 26 August 2012 18:56, Blue Swirl wrote:
> On Sun, Aug 26, 2012 at 2:14 PM, Aurelien Jarno wrote:
>> Altivec instructions are not working anymore in PowerPC emulation,
>> following commit d15f74fb, which inverted two registers in the call
>> to helper. Fix that.
> I wonder why TCG debug did no
Fix the spelling of 'palette' used in various local variables
and structure members.
Signed-off-by: Peter Maydell
---
hw/pl110.c | 28 ++--
hw/pl110_template.h | 22 +++---
2 files changed, 25 insertions(+), 25 deletions(-)
diff --git
On 27 August 2012 06:19, Stefan Weil wrote:
> Am 26.08.2012 23:30, schrieb Peter Maydell:
>
>> Fix the spelling of 'palette' used in various local variables
>> and structure members.
>> if (offset >= 0x200 && offset < 0x400) {
>>
Fix the spelling of 'palette' used in various local variables,
structure members and comments.
Signed-off-by: Peter Maydell
Reviewed-by: Stefan Weil
---
v1->v2 changes: fix a comment which I'd missed before because
it wasn't all-lowercase (thanks Stefan).
h
On 27 August 2012 13:20, Michael S. Tsirkin wrote:
> Update linux-headers to version present in Linux 3.6-rc3.
> Header asm-x96_64/kvm_para.h update is needed for the new PV EOI
> feature.
>
> Signed-off-by: Michael S. Tsirkin
> ---
> linux-headers/asm-s390/kvm.h | 2 +-
> linux-headers/asm
On 27 August 2012 13:21, Pavel Dovgaluk wrote:
> Save PC speaker state to remove differences between system
> states after saving the snapshot and after loading it again.
> This patch is needed for deterministic replay of the execution.
>
> Signed-off-by: Pavel Dovgalyuk
Hi Pavel; thanks for this
Ping^2 since rc2 is just around the corner.
thanks
-- PMM
On 23 August 2012 17:15, Peter Maydell wrote:
> Ping! This didn't get into rc1.
>
> thanks
> -- PMM
>
> On 20 August 2012 11:36, Peter Maydell wrote:
>> Now that we default to reserving nearly 4GB of RAM f
On 27 August 2012 08:23, Yeongkyoon Lee wrote:
> BTW, who will finally confirm my patches?
> I have sent four version of my patches in which I have applied all the
> reasonable feedbacks from this community.
If you'd like your patches committed you should not use the "[RFC]" tag
in the Subject, b
On 27 August 2012 21:37, Meador Inge wrote:
> This changes the driver behavior to choose the default machine
> model based on the CPU being used. Defaulting the machine this
> way makes it easier to use QEMU as an ISS by just specifying
> the -cpu option since a default machine that is suitable f
Yes, qemu's linux-user emulation layer doesn't currently support any of
the posix timer syscalls.
** Summary changed:
- qemu: Unsupported syscall: 257
+ qemu: Unsupported syscall: 257 (timer_create)
--
You received this bug notification because you are a member of qemu-
devel-ml, which is subs
On 27 August 2012 22:33, Erik de Castro Lopo <1042...@bugs.launchpad.net> wrote:
> Peter Maydell wrote:
>> Yes, qemu's linux-user emulation layer doesn't currently support any of
>> the posix timer syscalls.
>
> Any idea how much work is involved to implement
new utility functions
> for marshalling function arguments into the correct registers
> and stack, so that the code which sets up the address and
> data arguments does not need to care whether there has been
> a preceding env argument.
>
> Based on commit 9716ef3b for ARM by Peter Maydel
region
> was being added instead. This mixup was causing the wrong
> IO memory access functions to be called when accessing parts
> of the NVIC memory.
>
> Signed-off-by: Meador Inge
Whoops.
Reviewed-by: Peter Maydell
-- PMM
On 27 August 2012 21:37, Meador Inge wrote:
> The minimal amount of arm_boot_info has been setup to allow
> for machines based off of ARMv7-M processors to be loaded via the
> -kernel option.
>
> Signed-off-by: Meador Inge
> ---
> hw/armv7m.c | 13 +
> 1 files changed, 13 insertion
On 27 August 2012 21:37, Meador Inge wrote:
> The current implementation of the ARM semi-hosting SYS_HEAPINFO
> system call assumes that the base address of RAM for all ARM devices
> is 0x0. This isn't true for ARMv7-M devices, which uses a base of
> 0x2000 for SRAM.
This isn't a v7M specifi
On 27 August 2012 21:37, Meador Inge wrote:
> This patch adds support for a "dummy" ARMv7-M board so that
> QEMU can be used as an ISS for ARMv7-M processors. For example,
> running an image compiled for the Cortex-M3 with -cpu cortex-m3
> should just work.
So what programs would run on this 'du
On 28 August 2012 13:58, Paul Brook wrote:
> Peter Maydell wrote:
>> Just to pick an obvious example, you can't stick a core
>> which supports VFPv4 (the A15 is the only one we have) into
>> the integratorcp
>
> Yes you can.
No you can't. integratorcp.c does
On 28 August 2012 14:32, Paul Brook wrote:
>> No you can't. integratorcp.c doesn't create the parts of the CPU
>> which live in QEMU's 'a15mpcore_priv' device, so the resulting
>> mess is liable to just fall over. If anybody reports bugs in
>> QEMU in such a configuration I will tell them to go aw
On 28 August 2012 14:30, Eduardo Habkost wrote:
> - 1.2 branching, or creation of a "cpu-next" tree where "good to be
> merged" patches can live until 1.2 is done;
With 1.3 due for release in just over a week, it seems unlikely
that it's worth branching at this point...
-- PMM
On 28 August 2012 17:01, Michael S. Tsirkin wrote:
> We copied HACKING from libvirt but it has some bogus stuff:
> neither underscore capital, double underscore, or underscore 't' suffixes
> are reserved in Posix/C: this appears to be based on misreading of the
> C standard. Using sane prefixes is
On 28 August 2012 18:18, Michael S. Tsirkin wrote:
> On Tue, Aug 28, 2012 at 05:24:40PM +0100, Peter Maydell wrote:
>> C99 7.1.3
>> reserves underscore capital and double underscore prefixes.
>
> This is taking it out of context - reserved means different
> things in dif
On 28 August 2012 18:21, Michael S. Tsirkin wrote:
> We are talking about stuff like __kvm_pv_eoi - so the chance is exactly 0.
> And if it does happen then you run a simple script and fix
> this one instance.
Why not just use a name that doesn't use a double underscore
in the first place? The C
On 28 August 2012 18:32, Michael S. Tsirkin wrote:
> What about _t in POSIX? That seems fairly safe if name is long and qemu
> specific enough.
Depends what you mean by "safe". The spec says "don't use this";
it isn't any different to the __ and _[A-Z] prohibitions in that
respect.
Other posix n
On 27 August 2012 13:15, Jan Kiszka wrote:
> On 2012-08-27 14:07, Andreas Färber wrote:
>> Am I correct to understand we compile this only for i386 / x86_64?
>
> This is correct.
Did we ever make a decision about whether architecture specific
KVM devices should all live in hw/kvm/ or in some dire
On 23 January 2012 16:05, Mark Langsdorf wrote:
> Long term, the config_base_register will be a QDM parameter. In the
> meantime, models that use it need to be able to preserve it across
> cpu_reset() calls.
>
> Signed-off-by: Mark Langsdorf
Reviewed-by: Peter Maydell
-- PMM
On 23 January 2012 16:05, Mark Langsdorf wrote:
> From: Rob Herring
>
> Adds support for Calxeda's Highbank SoC.
>
> Signed-off-by: Rob Herring
> Signed-off-by: Mark Langsdorf
Reviewed-by: Peter Maydell
...and we're done! I've pulled these patches into my
On 23 January 2012 17:44, Sergei Trofimovich wrote:
> @@ -234,7 +234,11 @@ ld="${LD-${cross_prefix}ld}"
> libtool="${LIBTOOL-${cross_prefix}libtool}"
> strip="${STRIP-${cross_prefix}strip}"
> windres="${WINDRES-${cross_prefix}windres}"
> -pkg_config="${PKG_CONFIG-${cross_prefix}pkg-config}"
> +
Ping. Unless anybody has any review comments on this or patch 9 (generic
timer dummy implementation) I plan to put them into my target-arm.next
queue and send out a pullreq later this week.
-- PMM
On 13 January 2012 20:52, Peter Maydell wrote:
> Add a definition of a Cortex-A15 CPU. Note t
Hi Andreas,
Thanks for that, I will rename the switch to -kernel-dtb.
You are correct that 7/7 should have the usage in it, that patch was
incorrectly generated, I will regenerate and resend the series tomorrow for
another review cycle.
Regards.
Peter
On Tue, Jan 24, 2012 at 5:22 PM, Andreas
On 24 January 2012 07:59, Andreas Färber wrote:
> Am 13.01.2012 21:52, schrieb Peter Maydell:
>> @@ -433,6 +433,7 @@ void cpu_arm_set_cp_io(CPUARMState *env, int cpnum,
>> #define ARM_CPUID_CORTEXA8 0x410fc080
>> #define ARM_CPUID_CORTEXA9 0x410fc090
>>
ng changes as suggested by Andreas
* arm_boot patch tweaked to sit on top of arm-devs.next
Peter Maydell (9):
Add dummy implementation of generic timer cp15 registers
Add Cortex-A15 CPU definition
hw/a15mpcore.c: Add Cortex-A15 private peripheral model
hw/vexpress.c: Make motherboard
mux which video output to pass
through to the outside world.
Signed-off-by: Peter Maydell
---
hw/vexpress.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 9033b50..9860085 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -282,7 +282,7
Add a model of the Cortex-A15 memory mapped private peripheral
space. This is fairly simple because the only memory mapped
bit of the A15 is the GIC.
Note that we don't currently model a VGIC and therefore don't
map the VGIC related bits of the GIC.
Signed-off-by: Pet
address directly.
Signed-off-by: Peter Maydell
---
hw/arm-misc.h |2 +-
hw/arm_boot.c |8
hw/realview.c | 12 +++-
hw/vexpress.c |6 --
4 files changed, 16 insertions(+), 12 deletions(-)
diff --git a/hw/arm-misc.h b/hw/arm-misc.h
index 5e5204b..306013a 100644
--- a
kernel which has been
compiled for an A15 without LPAE enabled.
Signed-off-by: Peter Maydell
---
target-arm/cpu.h|1 +
target-arm/helper.c | 56 ++
2 files changed, 52 insertions(+), 5 deletions(-)
diff --git a/target-arm/cpu.h b/target
Factor out daughterboard specifics into a data structure and
daughterboard initialization function, in preparation for adding
vexpress-a15 support.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 118 -
1 files changed, 83 insertions
y A9.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 137 +++--
1 files changed, 103 insertions(+), 34 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 64fab45..8c4d3b3 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -31,13
" RAM page we were using before.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 16 ++--
1 files changed, 2 insertions(+), 14 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 8c4d3b3..99a9690 100644
--- a/hw/vexpress.c
+++ b/hw/vexpress.c
@@ -30,13 +30,9 @@
Add a dummy implementation of the cp15 registers for the generic
timer (found in the Cortex-A15), just sufficient for Linux to
decide that it can't use it. This requires at least CNTP_CTL and
CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14.
Signed-off-by: Peter Maydell
---
targe
Add the vexpress-a15 machine, and the A-Series memory map it uses.
Signed-off-by: Peter Maydell
---
hw/vexpress.c | 141 +
1 files changed, 141 insertions(+), 0 deletions(-)
diff --git a/hw/vexpress.c b/hw/vexpress.c
index 4b9454f
On 24 January 2012 19:32, Anthony Liguori wrote:
> This series makes qdev a proper Object and converts qdev's type inheritance to
> QOM inheritance.
> I've tested this series extensively for the pc target including bisectability.
> I have not tested any other targets yet so your mileage may vary.
On 25 January 2012 12:37, Andreas Färber wrote:
> Am 24.01.2012 13:39, schrieb Peter Maydell:
>> + ARM_FEATURE_GENERICTIMER,
>
> Personally I would've preferred GENERIC_TIMER (we have ARM_DIV,
> THUMB_DIV as counterexamples), but no strong objection here.
I think I agree.
-- PMM
Just a retransmit of the target-arm parts of the Cortex-A15
series, with the tiny change of
s/ARM_FEATURE_GENERICTIMER/ARM_FEATURE_GENERIC_TIMER/
and no other changes from the versions in v2 of the vexpress-a15
patchset.
Peter Maydell (2):
Add dummy implementation of generic timer cp15
kernel which has been
compiled for an A15 without LPAE enabled.
Reviewed-by: Andreas Färber
Signed-off-by: Peter Maydell
---
target-arm/cpu.h|1 +
target-arm/helper.c | 56 ++
2 files changed, 52 insertions(+), 5 deletions(-)
diff --git a
Add a dummy implementation of the cp15 registers for the generic
timer (found in the Cortex-A15), just sufficient for Linux to
decide that it can't use it. This requires at least CNTP_CTL and
CNTFRQ to be implemented as RAZ/WI; we RAZ/WI all of c14.
Signed-off-by: Peter Maydell
---
targe
On 25 January 2012 14:01, Andreas Färber wrote:
> Am 25.01.2012 14:32, schrieb Peter Maydell:
>> Add a dummy implementation of the cp15 registers for the generic
>> timer (found in the Cortex-A15), just sufficient for Linux to
>> decide that it can't use it. This requ
On 24 January 2012 08:42, Rusty Russell wrote:
> On Fri, 13 Jan 2012 20:52:39 +0000, Peter Maydell
> wrote:
>> From: Mark Langsdorf
>>
>> Increase the maximum number of GIC interrupts for a9mp and a11mp to 1020,
>> and create a configurable property fo
On 25 January 2012 14:24, Xin Tong wrote:
> I am wondering how tcg reg alloc works. Specifically, how do i reserve
> a register only for one specific purpose. R14 on tcg i386 is reserved
> to point to the cpustate strcuture. it is assigned in the prologue,
> but what code makes sure that it is no
'invalidate by address for all ASIDs' was implemented as
flushing the whole TLB, which invalidates much more than
strictly necessary. Use tlb_flush_page() instead.
We also annotate the ops with the ARM ARM official acronyms.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |
the ARM register
rather than sign-extension, since TCG i32 values are passed as
uint32_t.
Signed-off-by: Peter Maydell
---
target-arm/helper.c |2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/target-arm/helper.c b/target-arm/helper.c
index f11279e..f6e998b 100644
--- a
On 25 January 2012 15:42, Xin Tong wrote:
> I tried to reserve a register in target-i386 with this code
>
> target-i386/translate.c tb_env = tcg_global_reg_new_ptr(TCG_AREG1, "env");
Why do you want to define a second global which holds the environment
variable? Just use TCG_AREG0 for that.
>
From: Mark Langsdorf
Long term, the config_base_register will be a QDM parameter. In the
meantime, models that use it need to be able to preserve it across
cpu_reset() calls.
Signed-off-by: Mark Langsdorf
Signed-off-by: Peter Maydell
---
target-arm/helper.c |3 +++
1 files changed, 3
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