On Tue, 30 Aug 2022 01:10:29 +0900,
Richard Henderson wrote:
>
> On 8/29/22 02:05, BALATON Zoltan wrote:
> > On Sun, 28 Aug 2022, Richard Henderson wrote:
> >> The value previously chosen overlaps GUSA_MASK.
> >>
> >> Cc: qemu-sta...@nongnu.org
> >> Fixes: 4da06fb3062 ("target/sh4: Implement prct
gt; problem if another flag is added in the future?
>
> Hmm, or perhaps move it down below, so that we see bit 3 used, then bits
> 4-12, then bit 13.
>
>
> r~
How about this fix?
From 69fc46c0e439026cabedc8ddfa0a880d0df09a6b Mon Sep 17 00:00:00 2001
From: Yoshinori Sato
Date
textBase *dcbase, CPUState *cs)
>(tbflags & (1 << SR_RB))) * 0x10;
> ctx->fbank = tbflags & FPSCR_FR ? 0x10 : 0;
>
> -if (tbflags & GUSA_MASK) {
> +#ifdef CONFIG_USER_ONLY
> +if (tbflags & TB_FLAG_GUSA_MASK) {
> +/* In gUSA exclusive region. */
> uint32_t pc = ctx->base.pc_next;
> uint32_t pc_end = ctx->base.tb->cs_base;
> -int backup = sextract32(ctx->tbflags, GUSA_SHIFT, 8);
> +int backup = sextract32(ctx->tbflags, TB_FLAG_GUSA_SHIFT, 8);
> int max_insns = (pc_end - pc) / 2;
>
> if (pc != pc_end + backup || max_insns < 2) {
> /* This is a malformed gUSA region. Don't do anything special,
> since the interpreter is likely to get confused. */
> -ctx->envflags &= ~GUSA_MASK;
> -} else if (tbflags & GUSA_EXCLUSIVE) {
> +ctx->envflags &= ~TB_FLAG_GUSA_MASK;
> +} else if (tbflags & TB_FLAG_GUSA_EXCLUSIVE) {
> /* Regardless of single-stepping or the end of the page,
> we must complete execution of the gUSA region while
> holding the exclusive lock. */
> @@ -2285,6 +2290,7 @@ static void sh4_tr_init_disas_context(DisasContextBase
> *dcbase, CPUState *cs)
> return;
> }
> }
> +#endif
>
> /* Since the ISA is fixed-width, we can bound by the number
> of instructions remaining on the page. */
> @@ -2309,8 +2315,8 @@ static void sh4_tr_translate_insn(DisasContextBase
> *dcbase, CPUState *cs)
> DisasContext *ctx = container_of(dcbase, DisasContext, base);
>
> #ifdef CONFIG_USER_ONLY
> -if (unlikely(ctx->envflags & GUSA_MASK)
> -&& !(ctx->envflags & GUSA_EXCLUSIVE)) {
> +if (unlikely(ctx->envflags & TB_FLAG_GUSA_MASK)
> +&& !(ctx->envflags & TB_FLAG_GUSA_EXCLUSIVE)) {
> /* We're in an gUSA region, and we have not already fallen
> back on using an exclusive region. Attempt to parse the
> region into a single supported atomic operation. Failure
> @@ -2330,9 +2336,9 @@ static void sh4_tr_tb_stop(DisasContextBase *dcbase,
> CPUState *cs)
> {
> DisasContext *ctx = container_of(dcbase, DisasContext, base);
>
> -if (ctx->tbflags & GUSA_EXCLUSIVE) {
> +if (ctx->tbflags & TB_FLAG_GUSA_EXCLUSIVE) {
> /* Ending the region of exclusivity. Clear the bits. */
> -ctx->envflags &= ~GUSA_MASK;
> +ctx->envflags &= ~TB_FLAG_GUSA_MASK;
> }
>
> switch (ctx->base.is_jmp) {
> --
> 2.34.1
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
added, so that we have a pointer to that copy of the FDT.
>
> Cc: Yoshinori Sato
> Signed-off-by: Jason A. Donenfeld
> ---
> hw/rx/rx-gdbsim.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c
> index 8ffe1b8035..1
On Mon, 03 Oct 2022 02:23:51 +0900,
Richard Henderson wrote:
>
> Ping, or should I create a PR myself?
>
> r~
Sorry.
I can't work this week, so please submit a PR.
>
> On 9/1/22 07:15, Yoshinori Sato wrote:
> > On Thu, 01 Sep 2022 19:15:09 +0900,
> > Rich
kernel_filename != NULL, &error_abort);
> +qdev_prop_set_link(DEVICE(&s->mcu), "main-bus", OBJECT(sysmem));
> +qdev_prop_set_uint32(DEVICE(&s->mcu), "xtal-frequency-hz",
> + rxc->xtal_freq_hz);
> +qdev_prop_set_bit(DEVICE(&s->mcu), "load-kernel", kernel_filename !=
> NULL);
>
> if (!kernel_filename) {
> if (machine->firmware) {
> --
> 2.38.1
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
timeout = 30
> KERNEL_COMMON_COMMAND_LINE = 'printk.time=0 '
>
> -@skipUnless(os.getenv('QEMU_TEST_FLAKY_TESTS'), 'Test is unstable on
> GitLab')
> -
> def test_uboot(self):
> """
> U-Boot and checks that the console is operational.
> --
> 2.45.2
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
/meson.build| 1 -
> hw/sh4/Kconfig | 7 -
> hw/sh4/meson.build | 1 -
> 12 files changed, 7 insertions(+), 401 deletions(-)
> delete mode 100644 hw/block/tc58128.c
> delete mode 100644 hw/sh4/shix.c
>
> --
> 2.45.2
>
for hw/sh4
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
On Tue, 19 Jul 2022 21:20:33 +0900,
Jason A. Donenfeld wrote:
>
> If the FDT contains /chosen/rng-seed, then the Linux RNG will use it to
> initialize early. Set this using the usual guest random number
> generation function. This FDT node is part of the DT specification.
>
>
> -
> -To build an ELF kernel image from the NAND image, 16 bytes have to be
> -stripped off the end of every 528 bytes, keeping only 512 of them. The
> -following Python code snippet does it:
> -
> -#! /usr/bin/python
> -
> -def denand (infd, outfd):
> -while True:
> -d = infd.read (528)
> -if not d: return
> -outfd.write (d[:512])
> -
> -if __name__ == '__main__':
> -import sys
> -denand (open (sys.argv[1], 'rb'),
> -open (sys.argv[2], 'wb'))
> -
> -Style isssues
> --
> -
> -There is currently a mix between my style (space before opening
> -parenthesis) and qemu style. This will be resolved before final
> -integration is proposed.
> --
> 2.27.0
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
TARGET_IOR('T', 90, int) /* 0x545A
> */ /* Get multiport config */
> #define TARGET_TIOCSERSETMULTI TARGET_IOW('T', 91, int) /* 0x545B
> --
> 2.27.0
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
added, so that we have a pointer to that copy of the FDT.
>
> Cc: Yoshinori Sato
> Signed-off-by: Jason A. Donenfeld
> ---
> hw/rx/rx-gdbsim.c | 3 +++
> 1 file changed, 3 insertions(+)
>
> diff --git a/hw/rx/rx-gdbsim.c b/hw/rx/rx-gdbsim.c
> index 8ffe1b8035..1
gt;halted = 1;
> env->in_sleep = 1;
> +env->psw_i = 1;
> raise_exception(env, EXCP_HLT, 0);
> }
>
> --
> 2.35.1
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
32(cpu_pc, ctx->base.pc_next);
> gen_helper_wait(cpu_env);
> }
> return true;
> --
> 2.35.1
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
On Sat, 16 Apr 2022 12:20:09 +0900,
Tomoaki Kawada wrote:
>
> The control register field PSW.U determines which stack pointer register
> (ISP or USP) is mapped as R0. In QEMU, this is implemented by having a
> value copied between ISP or USP and R0 whenever PSW.U is updated or
> access to ISP/USP
target/rx/cpu.h | 1 +
> target/rx/translate.c | 67 +++
> 2 files changed, 37 insertions(+), 31 deletions(-)
>
> --
> 2.25.1
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
, so we can
> just drop the include.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Yoshinori Sato
> ---
> target/rx/cpu.h | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/target/rx/cpu.h b/target/rx/cpu.h
> index 4ac71aec370..657db84ef0a 100644
> --- a/ta
at the last instruction
> in a gUSA region, we copy R1 to R15 to restore the correct stack pointer
> and avoid crashing.
>
> There's another bug: if we are interrupted in a delay slot, we save the
> address of the instruction in the delay slot. We must save the address of
&g
On Fri, 20 Oct 2023 03:29:19 +0900,
Richard Henderson wrote:
>
> Signed-off-by: Richard Henderson
Reviewed-by: Yoshinori Sato
> ---
> target/rx/translate.c | 11 +++
> 1 file changed, 3 insertions(+), 8 deletions(-)
>
> diff --git a/target/rx/translate.c b/
YPE_SH7750R_CPU;
> +mc->deprecation_reason = "old and unmaintained - use a newer machine
> instead";
> }
>
> DEFINE_MACHINE("shix", shix_machine_init)
> --
> 2.42.0
>
I can't maintain this either.
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
On Thu, 12 Oct 2023 13:12:36 +0900,
Philippe Mathieu-Daudé wrote:
>
> Host bridge device and PCI function #0 are inverted.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
> ---
> hw/pci-host/sh_pci.c | 16
> 1 file changed, 8 inser
On Thu, 12 Oct 2023 13:12:37 +0900,
Philippe Mathieu-Daudé wrote:
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
> ---
> hw/pci-host/sh_pci.c | 5 +++--
> 1 file changed, 3 insertions(+), 2 deletions(-)
>
> diff --git a/hw/pci-host/sh_pci.c b
gned-off-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
> ---
> hw/pci-host/sh_pci.c | 40 +---
> 1 file changed, 17 insertions(+), 23 deletions(-)
>
> diff --git a/hw/pci-host/sh_pci.c b/hw/pci-host/sh_pci.c
> index 77e7bbc65f..41aed48
On Wed, 18 Oct 2023 21:40:23 +0900,
Geert Uytterhoeven wrote:
>
> The new Linux SH7750 clock driver uses the registers for power-down
> mode control, causing a crash:
>
> byte read to SH7750_STBCR_A7 (0x1fc4) not supported
> Aborted (core dumped)
>
> Fix this by adding suppor
uld be dynamically assigned.
>
> Now, the first rtl8139 gets slot 2 and everything else is dynamic.
>
> Signed-off-by: David Woodhouse
Reviewed-by: Yoshinori Sato
> ---
> hw/sh4/r2d.c | 6 ++
> 1 file changed, 2 insertions(+), 4 deletions(-)
>
> diff --git a/h
On Thu, 26 Oct 2023 17:00:11 +0900,
Thomas Huth wrote:
>
> tmu012.h is the header that belongs to hw/timer/sh_timer.c, so we
> should list it in the same section as sh_timer.c.
>
> Signed-off-by: Thomas Huth
Reviewed-by: Yoshinori Sato
> ---
> MAINTAINERS | 1 +
> 1 f
ical_address(&cpu->env, &physical, &prot, addr, MMU_DATA_LOAD);
> +if (get_physical_address(&cpu->env, &physical, &prot, addr,
> MMU_DATA_LOAD)
> +== MMU_OK) {
> +return physical;
> + }
>
> -return physical;
> +return -1;
> }
>
> void cpu_load_tlb(CPUSH4State * env)
> --
> 2.26.3
>
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
Hello.
I written Renesas RX port.
It is works to boot linux kernel of minimal configuration.
I'd like to merge this into the qmeu release and I need some
advice on how to proceed.
I tried reading wiki.qemu.org, but I could not find useful
information about adding subsystems.
git repository is bel
On Mon, 07 Jan 2019 06:48:33 +0900,
Richard Henderson wrote:
>
> On 1/6/19 11:11 PM, Yoshinori Sato wrote:
> > Hello.
> > I written Renesas RX port.
> > It is works to boot linux kernel of minimal configuration.
> >
> > I'd like to merge this into the q
o_interrupt(CPUState *cs)
>
> static void update_itlb_use(CPUSH4State * env, int itlbnb)
> {
> -uint8_t or_mask = 0, and_mask = (uint8_t) - 1;
> +uint32_t or_mask = 0, and_mask = 0xff;
>
> switch (itlbnb) {
> case 0:
> --
> 2.34.1
>
Reviewed-by: Yoshinori Sato
--
Yosinori Sato
On Sun, 08 Mar 2020 02:38:08 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi,
>
> On 2/24/20 3:19 PM, Yoshinori Sato wrote:
> > Describe emulated target specification. And two examples.
> >
> > Signed-off-by: Yoshinori Sato
&g
Add rx-virt target specificaion document.
Signed-off-by: Yoshinori Sato
---
docs/system/target-rx.rst | 35 +++
docs/system/targets.rst | 1 +
2 files changed, 36 insertions(+)
create mode 100644 docs/system/target-rx.rst
diff --git a/docs/system/target
On Mon, 09 Mar 2020 00:41:45 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori,
>
> On 2/24/20 3:19 PM, Yoshinori Sato wrote:
> > This module supported only non FIFO type.
> > Hardware manual.
> > https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_fa
On Mon, 09 Mar 2020 01:20:05 +0900,
Philippe Mathieu-Daudé wrote:
>
> On 2/24/20 3:19 PM, Yoshinori Sato wrote:
> > From: Philippe Mathieu-Daudé
> >
> > Add two tests for the rx-virt machine, based on the recommended test
> > setup from Yoshinori Sato:
> >
On Mon, 09 Mar 2020 19:54:20 +0900,
Philippe Mathieu-Daudé wrote:
>
> On 3/9/20 7:30 AM, Yoshinori Sato wrote:
> > On Mon, 09 Mar 2020 01:20:05 +0900,
> > Philippe Mathieu-Daudé wrote:
> >>
> >> On 2/24/20 3:19 PM, Yoshinori Sato wrote:
> >>> Fr
Since the Renesas development environment may use the S-Record format,
it is convenient to handle this as well as the HEX format.
Signed-off-by: Yoshinori Sato
---
include/hw/loader.h | 14 +++
hw/core/loader.c| 212
2 files changed, 226
RX's ELF machine not defined elf.h.
Added it.
Signed-off-by: Yoshinori Sato
---
include/elf.h | 2 ++
1 file changed, 2 insertions(+)
diff --git a/include/elf.h b/include/elf.h
index 5b06b55f28..b14ecade48 100644
--- a/include/elf.h
+++ b/include/elf.h
@@ -172,6 +172,8 @@ typedef s
2020-03-10 00:07 に Eric Blake さんは書きました:
On 3/8/20 8:06 AM, Yoshinori Sato wrote:
Add rx-virt target specificaion document.
specification
Signed-off-by: Yoshinori Sato
---
docs/system/target-rx.rst | 35 +++
docs/system/targets.rst | 1 +
2 files
On Tue, 10 Mar 2020 20:54:16 +0900,
Peter Maydell wrote:
>
> On Tue, 10 Mar 2020 at 11:30, Eric Blake wrote:
> >
> > On 3/9/20 11:28 PM, Yoshinori Sato wrote:
> >
> > >>> +++ b/docs/system/targets.rst
> > >>> @@ -17,3 +17,4 @@ Cont
Add rx-virt target specification document.
Sort the list of targets alphabetically.
Signed-off-by: Yoshinori Sato
---
docs/system/target-rx.rst | 35 +++
docs/system/targets.rst | 8 +---
2 files changed, 40 insertions(+), 3 deletions(-)
create mode
On Mon, 16 Mar 2020 00:42:46 +0900,
Philippe Mathieu-Daudé wrote:
>
> Hi Yoshinori,
>
> On 3/15/20 2:28 PM, Philippe Mathieu-Daudé wrote:
> > From: Yoshinori Sato
> >
> > Reviewed-by: Richard Henderson
> > Signed-off-by: Yoshinori Sato
> > Signe
s
> MAINTAINERS: Add an entry for common Renesas peripherals
> hw/sh4: Use MemoryRegion typedef
> hw/sh4: Extract timer definitions to 'hw/timer/tmu012.h'
> hw/timer/sh_timer: Remove unused 'qemu/timer.h' include
> hw/rx: Register R5F562N7 and R5F
2020-07-08 00:06 に Thomas Huth さんは書きました:
On 07/07/2020 17.02, Yoshinori Sato wrote:
On Mon, 29 Jun 2020 18:58:56 +0900,
Philippe Mathieu-Daudé wrote:
Hi Yoshinori,
On 6/25/20 11:25 AM, Peter Maydell wrote:
On Sun, 21 Jun 2020 at 13:54, Philippe Mathieu-Daudé
wrote:
From: Yoshinori Sato
Cleanup read operation.
This module different return of access size.
Signed-off-by: Yoshinori Sato
---
hw/timer/renesas_tmr.c | 106 ++---
1 file changed, 57 insertions(+), 49 deletions(-)
diff --git a/hw/timer/renesas_tmr.c b/hw/timer/renesas_tmr.c
index
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 8
1 file changed, 8 insertions(+)
diff --git a
Signed-off-by: Yoshinori Sato
---
qapi/machine.json | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/qapi/machine.json b/qapi/machine.json
index ca26779f1a..4409c113c2 100644
--- a/qapi/machine.json
+++ b/qapi/machine.json
@@ -21,6 +21,7 @@
#is true even for "
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff -
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
target/rx: Dump bytes for each insn during disassembly
hw/rx: Honor -accel qtest
Yoshinori Sato (12):
MAINTAINERS: Add RX
qemu/bitops.h: Add extract8 and extract16
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU definition
target/rx: RX disassembler
hw/intc: RX62N
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machin
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Ma
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fil
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
v21 changes
Add cpu-param.h
Remove CPU_COMMON
rx_load_image move to rx-virt.
remove rx_load_image
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.j
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
v23 changes.
Add missing includes.
v21 changes.
rx_load_image move to rx-virt.c
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe M
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
From: Philippe Mathieu-Daudé
Some RX peripheral using 8bit and 16bit registers.
Added 8bit and 16bit APIs.
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-11-ys...@users.sourceforge.jp>
Tested-by: Ph
From: Philippe Mathieu-Daudé
While the VIRT machine can use different microcontrollers,
the RX62N microcontroller is tied to the RX62N CPU core.
Signed-off-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
---
hw/rx/rx-virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/hw/rx
From: Richard Henderson
Issue an error if no kernel, no bios, and not qtest'ing.
Fixes make check-qtest-rx: test/qom-test.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-16-ys...@users.sourceforge.jp>
Tested-by: Philippe Ma
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-17-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
pick ed65c02993 target/rx: Add RX to SysEmuTarget
pick 01372568ae tests: Add rx to machin
From: Richard Henderson
This has consistency with prt_ri(). It loads all data before
beginning output. It uses exactly one call to prt() to emit
the full instruction.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-3-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-3-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
[PMD: Removed tlb_fil
This implementation supported only ICUa.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-6
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-10-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/bitops.
renesas_tmr: 8bit timer modules.
renesas_cmt: 16bit compare match timer modules.
This part use many renesas's CPU.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Review
From: Richard Henderson
Note that the ld == 3 case handled by prt_ldmi is decoded as
XCHG_rr and cannot appear here.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-21-ys...@users.sourceforge.jp>
Tes
From: Richard Henderson
Collected, to be used in the next patch.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-23-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Hen
From: Philippe Mathieu-Daudé
Add two tests for the rx-virt machine, based on the recommended test
setup from Yoshinori Sato:
https://lists.gnu.org/archive/html/qemu-devel/2019-05/msg03586.html
- U-Boot prompt
- Linux kernel with Sash shell
These are very quick tests:
$ avocado run -t
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-4-ys...@users.sourceforge.jp>
Reviewed-by: Richard Henderson
Message-Id: <20190607091116.49044-4-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
[PMD: Use newer QOM style, split cpu-qom.h, restrict access
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-18-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
MAINTAINERS | 19 +++
1 file changed, 19 insertions(+)
diff -
target/rx: Collect all bytes during disassembly
target/rx: Dump bytes for each insn during disassembly
hw/rx: Honor -accel qtest
Yoshinori Sato (12):
MAINTAINERS: Add RX
qemu/bitops.h: Add extract8 and extract16
target/rx: TCG translation
target/rx: TCG helper
target/rx: CPU
From: Richard Henderson
We were eliding all zero indexes. It is only ld==0 that does
not have an index in the instruction. This also allows us to
avoid breaking the final print into multiple pieces.
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49
Describe emulated target specification. And two examples.
Signed-off-by: Yoshinori Sato
---
qemu-doc.texi | 44
1 file changed, 44 insertions(+)
diff --git a/qemu-doc.texi b/qemu-doc.texi
index 39f950471f..1f6774ad55 100644
--- a/qemu-doc.texi
+++ b
From: Richard Henderson
There are so many different forms of each RX instruction
that it will be very useful to be able to look at the bytes
to see on which path a bug may lie.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id
This module supported only non FIFO type.
Hardware manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Alex Bennée
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-8
From: Richard Henderson
Many of the multi-part prints have been eliminated by previous
patches. Eliminate the rest of them.
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Yoshinori Sato
Signed-off-by: Yoshinori Sato
Message-Id: <20190607091116.49044-22-ys...@users.sourceforge.jp>
rx62n - RX62N cpu.
rx-virt - RX QEMU virtual target.
Signed-off-by: Yoshinori Sato
Message-Id: <20190616142836.10614-17-ys...@users.sourceforge.jp>
Tested-by: Philippe Mathieu-Daudé
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-9-ys...@users.sourceforge.jp>
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-5-ys...@users.sourceforge.jp>
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h |5 +
target/rx/disas.c
This part only supported RXv1 instructions.
Instruction manual.
https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01us0032ej0120_rxsm.pdf
Signed-off-by: Yoshinori Sato
Reviewed-by: Richard Henderson
Tested-by: Philippe Mathieu-Daudé
Message-Id: <20190607091116.49044-2
On Thu, 23 Jan 2020 22:25:03 +0900,
Yoshinori Sato wrote:
>
> Hello.
> This patch series is added Renesas RX target emulation.
>
> Changes for v28.
> Allow -m option.
> With this option, 16 Mbytes or more can be specified.
> Add example for qemu-doc.
> Fix b
le cases 0, 1, 2 and 3 then there cannot
> be a flow of execution through the switch default. Add explicit
> default cases which assert that they can't be reached, which
> should help silence Coverity.
>
> Signed-off-by: Peter Maydell
Reviewed-by: Yoshinori Sato
> ---
&
+93,7 @@ static void rx_gdbsim_init(MachineState *machine)
> char *sz = size_to_str(mc->default_ram_size);
> error_report("Invalid RAM size, should be more than %s", sz);
> g_free(sz);
> +exit(1);
> }
>
> /* Allocate memory space */
> --
> 2.26.3
>
Reviewed-by: Yoshinori Sato
--
Yoshinori Sato
process the peripheral clocks of SH4 and RX in the same way,
so I added a new clock generator. This will generate a peripheral clock
from the master clock.
Yoshinori Sato (11):
hw/char: Renesas SCI module.
hw/char: remove sh_serial.
hw/timer: Renesas TMU/CMT module.
hw/timer: Remove sh_timer.
hw/t
Migrate to renesas_timer.
Signed-off-by: Yoshinori Sato
---
include/hw/timer/renesas_cmt.h | 43 -
hw/timer/renesas_cmt.c | 283 -
hw/timer/meson.build | 1 -
3 files changed, 327 deletions(-)
delete mode 100644 include/hw/timer
linux kernel require initializing some peripherals.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx62n.h | 16
hw/rx/rx-gdbsim.c | 89 +--
hw/rx/rx62n.c | 15
3 files changed, 59 insertions(+), 61 deletions(-)
diff --git
Migrate to renesas_sci.
Signed-off-by: Yoshinori Sato
---
hw/char/sh_serial.c | 431
MAINTAINERS | 4 +-
hw/char/Kconfig | 3 -
hw/char/meson.build | 1 -
4 files changed, 2 insertions(+), 437 deletions(-)
delete mode 100644 hw
Migrate to renesas_timer.
Signed-off-by: Yoshinori Sato
---
include/hw/timer/tmu012.h | 23 ---
hw/timer/sh_timer.c | 368 --
MAINTAINERS | 4 +-
hw/timer/Kconfig | 4 -
hw/timer/meson.build | 1 -
5 files changed, 2
This module generated core and peripheral clock.
Signed-off-by: Yoshinori Sato
---
include/hw/rx/rx62n-cpg.h | 72
include/hw/rx/rx62n.h | 8 +-
hw/rx/rx62n-cpg.c | 344 ++
hw/rx/rx62n.c | 39 +++--
hw/rx/meson.build
Signed-off-by: Yoshinori Sato
---
include/hw/sh4/sh.h | 8 -
hw/sh4/sh7750.c | 87 +++--
hw/sh4/Kconfig | 4 +--
3 files changed, 79 insertions(+), 20 deletions(-)
diff --git a/include/hw/sh4/sh.h b/include/hw/sh4/sh.h
index becb596979
201 - 300 of 760 matches
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