On Mon, 09 Mar 2020 00:41:45 +0900, Philippe Mathieu-Daudé wrote: > > Hi Yoshinori, > > On 2/24/20 3:19 PM, Yoshinori Sato wrote: > > This module supported only non FIFO type. > > Hardware manual. > > https://www.renesas.com/us/en/doc/products/mpumcu/doc/rx_family/r01uh0033ej0140_rx62n.pdf > > > > Signed-off-by: Yoshinori Sato <ys...@users.sourceforge.jp> > > Reviewed-by: Alex Bennée <alex.ben...@linaro.org> > > Reviewed-by: Philippe Mathieu-Daudé <phi...@redhat.com> > > Message-Id: <20190607091116.49044-8-ys...@users.sourceforge.jp> > > Tested-by: Philippe Mathieu-Daudé <phi...@redhat.com> > > Signed-off-by: Richard Henderson <richard.hender...@linaro.org> > > --- > > include/hw/char/renesas_sci.h | 45 +++++ > > hw/char/renesas_sci.c | 342 ++++++++++++++++++++++++++++++++++ > > hw/char/Kconfig | 3 + > > hw/char/Makefile.objs | 1 + > > 4 files changed, 391 insertions(+) > > create mode 100644 include/hw/char/renesas_sci.h > > create mode 100644 hw/char/renesas_sci.c > > > > diff --git a/include/hw/char/renesas_sci.h b/include/hw/char/renesas_sci.h > > new file mode 100644 > > index 0000000000..50d1336944 > > --- /dev/null > > +++ b/include/hw/char/renesas_sci.h > > @@ -0,0 +1,45 @@ > > +/* > > + * Renesas Serial Communication Interface > > + * > > + * Copyright (c) 2018 Yoshinori Sato > > + * > > + * This code is licensed under the GPL version 2 or later. > > + * > > + */ > > + > > +#include "chardev/char-fe.h" > > +#include "qemu/timer.h" > > +#include "hw/sysbus.h" > > + > > +#define TYPE_RENESAS_SCI "renesas-sci" > > +#define RSCI(obj) OBJECT_CHECK(RSCIState, (obj), TYPE_RENESAS_SCI) > > + > > +enum { > > + ERI = 0, > > + RXI = 1, > > + TXI = 2, > > + TEI = 3, > > + SCI_NR_IRQ = 4, > > +}; > > + > > +typedef struct { > > + SysBusDevice parent_obj; > > + MemoryRegion memory; > > + > > + uint8_t smr; > > + uint8_t brr; > > + uint8_t scr; > > + uint8_t tdr; > > + uint8_t ssr; > > + uint8_t rdr; > > + uint8_t scmr; > > + uint8_t semr; > > + > > + uint8_t read_ssr; > > + int64_t trtime; > > + int64_t rx_next; > > + QEMUTimer *timer; > > + CharBackend chr; > > + uint64_t input_freq; > > + qemu_irq irq[SCI_NR_IRQ]; > > +} RSCIState; > > diff --git a/hw/char/renesas_sci.c b/hw/char/renesas_sci.c > > new file mode 100644 > > index 0000000000..0760a51f43 > > --- /dev/null > > +++ b/hw/char/renesas_sci.c > > @@ -0,0 +1,342 @@ > > +/* > > + * Renesas Serial Communication Interface > > Looking at this again, have you looked at the SH model > (hw/char/sh_serial.c)? This seems the same. > (Similarly your timer model with hw/timer/sh_timer.c). >
sh_serial has FIFO. renesas_sci has no FIFO. These are relationships like 8250 and 16550. sh_serial is old,so I think it's better to implement and integrate FIFO into renesas_sci. > > + * > > + * Datasheet: RX62N Group, RX621 Group User's Manual: Hardware > > + * (Rev.1.40 R01UH0033EJ0140) > > + * > > + * Copyright (c) 2019 Yoshinori Sato > > + * > > + * This program is free software; you can redistribute it and/or modify it > > + * under the terms and conditions of the GNU General Public License, > > + * version 2 or later, as published by the Free Software Foundation. > > + * > > + * This program is distributed in the hope it will be useful, but WITHOUT > > + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or > > + * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License > > for > > + * more details. > > + * > > + * You should have received a copy of the GNU General Public License along > > with > > + * this program. If not, see <http://www.gnu.org/licenses/>. > > + */ > > + > > +#include "qemu/osdep.h" > > +#include "qemu/log.h" > > +#include "qapi/error.h" > > +#include "qemu-common.h" > > +#include "hw/hw.h" > > +#include "hw/irq.h" > > +#include "hw/sysbus.h" > > +#include "hw/registerfields.h" > > +#include "hw/qdev-properties.h" > > +#include "hw/char/renesas_sci.h" > > +#include "migration/vmstate.h" > > +#include "qemu/error-report.h" > > + > > +/* SCI register map */ > > +REG8(SMR, 0) > > + FIELD(SMR, CKS, 0, 2) > > + FIELD(SMR, MP, 2, 1) > > + FIELD(SMR, STOP, 3, 1) > > + FIELD(SMR, PM, 4, 1) > > + FIELD(SMR, PE, 5, 1) > > + FIELD(SMR, CHR, 6, 1) > > + FIELD(SMR, CM, 7, 1) > > +REG8(BRR, 1) > > +REG8(SCR, 2) > > + FIELD(SCR, CKE, 0, 2) > > + FIELD(SCR, TEIE, 2, 1) > > + FIELD(SCR, MPIE, 3, 1) > > + FIELD(SCR, RE, 4, 1) > > + FIELD(SCR, TE, 5, 1) > > + FIELD(SCR, RIE, 6, 1) > > + FIELD(SCR, TIE, 7, 1) > > +REG8(TDR, 3) > > +REG8(SSR, 4) > > + FIELD(SSR, MPBT, 0, 1) > > + FIELD(SSR, MPB, 1, 1) > > + FIELD(SSR, TEND, 2, 1) > > + FIELD(SSR, ERR, 3, 3) > > + FIELD(SSR, PER, 3, 1) > > + FIELD(SSR, FER, 4, 1) > > + FIELD(SSR, ORER, 5, 1) > > + FIELD(SSR, RDRF, 6, 1) > > + FIELD(SSR, TDRE, 7, 1) > > +REG8(RDR, 5) > > +REG8(SCMR, 6) > > + FIELD(SCMR, SMIF, 0, 1) > > + FIELD(SCMR, SINV, 2, 1) > > + FIELD(SCMR, SDIR, 3, 1) > > + FIELD(SCMR, BCP2, 7, 1) > > +REG8(SEMR, 7) > > + FIELD(SEMR, ACS0, 0, 1) > > + FIELD(SEMR, ABCS, 4, 1) > > + > > +static int can_receive(void *opaque) > > +{ > > + RSCIState *sci = RSCI(opaque); > > + if (sci->rx_next > qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL)) { > > + return 0; > > + } else { > > + return FIELD_EX8(sci->scr, SCR, RE); > > + } > > +} > > + > > +static void receive(void *opaque, const uint8_t *buf, int size) > > +{ > > + RSCIState *sci = RSCI(opaque); > > + sci->rx_next = qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + sci->trtime; > > + if (FIELD_EX8(sci->ssr, SSR, RDRF) || size > 1) { > > + sci->ssr = FIELD_DP8(sci->ssr, SSR, ORER, 1); > > + if (FIELD_EX8(sci->scr, SCR, RIE)) { > > + qemu_set_irq(sci->irq[ERI], 1); > > + } > > + } else { > > + sci->rdr = buf[0]; > > + sci->ssr = FIELD_DP8(sci->ssr, SSR, RDRF, 1); > > + if (FIELD_EX8(sci->scr, SCR, RIE)) { > > + qemu_irq_pulse(sci->irq[RXI]); > > + } > > + } > > +} > [...] > > -- Yosinori Sato
