).
And "014018e19b i386: Make arch_capabilities migratable" has been
in QEMU upstream, the CPUID_7_0_EDX_ARCH_CAPABILITIES can be
safely added into CPU Model.
Changes in v2:
- rebased patch to latest qemu base
Signed-off-by: Tao Xu
---
hw/i386/pc.c | 7 ++-
target/i386
On 5/7/2019 9:07 PM, Daniel P. Berrangé wrote:
On Tue, May 07, 2019 at 08:48:53PM +0800, Tao Xu wrote:
As noted in
http://lists.gnu.org/archive/html/qemu-devel/2018-09/msg02212.html
Rather than pointing to the mailing list post, please just refer
to the git commit hash that patch was merged
On 5/7/2019 11:06 PM, Eric Blake wrote:
On 5/7/19 8:07 AM, Daniel P. Berrangé wrote:
On Tue, May 07, 2019 at 08:48:53PM +0800, Tao Xu wrote:
As noted in
http://lists.gnu.org/archive/html/qemu-devel/2018-09/msg02212.html
Rather than pointing to the mailing list post, please just refer
to the
TRY).
And "014018e19b i386: Make arch_capabilities migratable" has been
in QEMU upstream, the CPUID_7_0_EDX_ARCH_CAPABILITIES can be
safely added into CPU Model.
Signed-off-by: Tao Xu
---
Changes in v3 -> v2:
- improve the commit message [Daniel and Eric]
Changes in v2:
- rebas
The aim of this patch is to move existing numa global have_numa_distance
into NumaState.
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- send the patch together with HMAT patches
---
hw/arm/virt-a
r Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- send the patch together with HMAT patches
Changes in v3 -> v2:
- rename the "NumaState::nb_numa_nodes" as "NumaState::num_nodes"
(Eduardo)
- use machine_num_numa_nodes(
Memory Attributes information
at runtime. _HMA provides OSPM with the latest HMAT in entirety
overriding existing HMAT.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- move AcpiHmaState from PCMachineState to MachineState
to make HMAT more generalic (Igor)
-
The aim of this patch is to move existing numa global numa_info
(renamed as "nodes") into NumaState.
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- send the patch together with HMAT patches
the performance of the system
memory that use the memory side cache.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- use build_append_int_noprefix() to build Memory Side Cache
Information Structure(s) tables (Igor)
- move globals (hmat_cache_info) i
Add build_mem_ranges callback to AcpiDeviceIfClass and use
it for generating SRAT and HMAT numa memory ranges.
Suggested-by: Igor Mammedov
Co-developed-by: Liu Jingqi
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- spilt the 1/8 of v3 patch into two patches
The aim of this patch is to move some of the NFIT Aml-build codes into
build_acpi_aml_common(), and then NFIT and HMAT can both use it.
Reviewed-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- Split 8/8 of patch v3 into two parts, introduces NFIT
generalizati
well as hint for memory usage.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- spilt the 1/8 of v3 patch into two patches, 4/13 introduces
build_mem_ranges() and adding it to ACPI interface, 5/13 builds
HMAT (Igor)
- use MachineState instead
information
numa: Extend the command-line to provide memory side cache information
hmat acpi: Implement _HMA method to update HMAT at runtime
Tao Xu (5):
numa: move numa global variable nb_numa_nodes into MachineState
numa: move numa global variable have_numa_distance into MachineState
nu
-by: Tao Xu
---
Changes in v4 -> v3:
- update the version tag from 4.0 to 4.1
---
numa.c | 127
qapi/misc.json | 94 ++-
qemu-options.hx | 28 ++-
3 files changed, 246 insertions(+)
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 ->
this information as hint for optimization.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v4 -> v3:
- use build_append_int_noprefix() to build System Locality Latency
and Bandwidth Information Structure(s) tables (Igor)
- move globals (hmat_lb_info) into MachineSt
On 6/5/2019 8:12 PM, Igor Mammedov wrote:
On Wed, 5 Jun 2019 14:04:10 +0800
Tao Xu wrote:
On 6/4/2019 11:04 PM, Igor Mammedov wrote:
On Wed, 8 May 2019 14:17:22 +0800
Tao Xu wrote:
...
+
+/* SMBIOS Handles */
+/* TBD: set smbios handles
On 5/24/2019 8:35 PM, Igor Mammedov wrote:
On Wed, 8 May 2019 14:17:19 +0800
Tao Xu wrote:
Add build_mem_ranges callback to AcpiDeviceIfClass and use
it for generating SRAT and HMAT numa memory ranges.
Suggested-by: Igor Mammedov
Co-developed-by: Liu Jingqi
Signed-off-by: Liu Jingqi
On 6/5/2019 10:40 PM, Igor Mammedov wrote:
On Wed, 8 May 2019 14:17:23 +0800
Tao Xu wrote:
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information
On 6/7/2019 12:45 AM, Igor Mammedov wrote:
On Thu, 6 Jun 2019 11:00:33 +0800
Tao Xu wrote:
...
But the kernel HMAT can read othe Memory Side Cache Information except
SMBIOS entries and the host HMAT tables also haven’t SMBIOS Handles it
also shows Number of SMBIOS handles (n) as 0. So I am
do Habkost
Signed-off-by: Tao Xu
---
Changes in v5 -> v4:
- drop the helper machine_num_numa_nodes() and use
machine->numa_state->num_nodes directly (Igor)
- remove the unnecessary header include (Igor)
---
exec.c | 5 ++-
hw/acpi/aml-build.c
well as hint for memory usage.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v5 -> v4:
- Add more descriptions from ACPI spec (Igor)
- Remove all the dependcy on PCMachineState (Igor)
---
hw/acpi/Kconfig | 5 ++
hw/acpi/Makefile.objs | 1 +
hw/acpi/hma
Jingqi
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
hw/arm/aspeed.c | 5 +
hw/arm/boot.c | 14 --
hw/arm/collie.c | 8 +---
hw/arm/cubieboard.c | 5 +
hw/arm/exynos4_boards.c | 7 ++-
hw/arm/highbank.c | 8
Move existing numa global numa_info (renamed as "nodes") into NumaState.
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v5 -> v4:
- Directly use ms->numa_state->nodes and not dereferencing
ms
Add build_mem_ranges callback to AcpiDeviceIfClass and use
it for generating SRAT and HMAT numa memory ranges.
Suggested-by: Igor Mammedov
Co-developed-by: Liu Jingqi
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v5 -> v4:
- Add the missing if 'mem_len
-by: Tao Xu
---
Changes in v5 -> v4:
- Add error message when base unit < 10
- Add more descriptions about option hmat-lb (Igor)
- Fix some spell error
- Update the hmat-lb option example by using '-numa cpu'
and '-numa memdev' (Igor)
command-line to provide memory latency and bandwidth
information
Tao Xu (5):
hw/arm: simplify arm_load_dtb
numa: move numa global variable nb_numa_nodes into MachineState
numa: move numa global variable have_numa_distance into MachineState
numa: move numa global variable numa_info into MachineState
Move existing numa global have_numa_distance into NumaState.
Reviewed-by: Igor Mammedov
Reviewed-by: Liu Jingqi
Suggested-by: Igor Mammedov
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
Changes in v5 -> v4:
- Simplify commit message (Igor)
---
hw/arm/virt-acpi-build.c
this information as hint for optimization.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v5 -> v4:
- Separate hmat_build_lb() (Igor)
- Add more descriptions from ACPI spec (Igor)
- Drop all global variables and use local variables instead (Igor)
---
hw/acpi/hma
oped-by: Jingqi Liu
Signed-off-by: Jingqi Liu
Signed-off-by: Tao Xu
---
changes in v3:
Simplify the patches, expose user wait instructions when the guest
has CPUID (Paolo)
---
target/i386/cpu.c | 3 ++-
target/i386/cpu.h | 1 +
target/i386/kvm.c | 4
3 files changed, 7 i
Sent out with MOVDIRI/MOVDIR64B instructions patches
Tao Xu (2):
x86/cpu: Add support for UMONITOR/UMWAIT/TPAUSE
target/i386: Add support for save/load IA32_UMWAIT_CONTROL MSR
target/i386/cpu.c | 3 ++-
target/i386/cpu.h | 3 +++
target/i386/kvm.c | 17 +
t
: Jingqi Liu
Signed-off-by: Tao Xu
---
no changes in v3:
---
target/i386/cpu.h | 2 ++
target/i386/kvm.c | 13 +
target/i386/machine.c | 20
3 files changed, 35 insertions(+)
diff --git a/target/i386/cpu.h b/target/i386/cpu.h
index 2f7c57a3c2..eb98b2e54a
On 10/14/2019 5:00 PM, Igor Mammedov wrote:
On Sat, 12 Oct 2019 11:04:03 +0800
Tao Xu wrote:
On 10/11/2019 10:08 PM, Igor Mammedov wrote:
On Thu, 10 Oct 2019 14:53:56 +0800
Tao Xu wrote:
On 10/3/2019 10:41 PM, Igor Mammedov wrote:
On Fri, 20 Sep 2019 15:43:47 +0800
Tao Xu wrote
On 10/15/2019 8:59 AM, Tao Xu wrote:
On 10/14/2019 5:00 PM, Igor Mammedov wrote:
On Sat, 12 Oct 2019 11:04:03 +0800
Tao Xu wrote:
On 10/11/2019 10:08 PM, Igor Mammedov wrote:
On Thu, 10 Oct 2019 14:53:56 +0800
Tao Xu wrote:
On 10/3/2019 10:41 PM, Igor Mammedov wrote:
On Fri, 20 Sep 2019
: Tao Xu
---
No changes in v11 and v12.
New patch in v10.
---
include/qapi/visitor-impl.h | 4
include/qapi/visitor.h | 9 +
qapi/opts-visitor.c | 22 ++
qapi/qapi-visit-core.c | 12
qapi/qobject-input-visitor.c | 18
Hi Paolo,
Ping :)
On 10/11/2019 3:49 PM, Tao Xu wrote:
On 10/11/2019 3:41 PM, Xu, Tao3 wrote:
[...]
diff --git a/target/i386/kvm.c b/target/i386/kvm.c
index 11b9c854b5..a465c893b5 100644
--- a/target/i386/kvm.c
+++ b/target/i386/kvm.c
@@ -401,6 +401,12 @@ uint32_t kvm_arch_get_supported_cpuid
To convert strings with time suffixes to numbers, support time unit are
"ps" for picosecond, "ns" for nanosecond, "us" for microsecond, "ms"
for millisecond or "s" for second.
Signed-off-by: Tao Xu
---
No changes in v13.
---
includ
Add optional builtin type time, fallback is uint64. This type use
qemu_strtotime_ps() for pre-converting time suffix to numbers.
Signed-off-by: Tao Xu
---
No changes in v13.
---
include/qapi/visitor-impl.h | 4
include/qapi/visitor.h | 9 +
qapi/opts-visitor.c
Add tests for time input such as zero, around limit of precision,
signed upper limit, actual upper limit, beyond limits, time suffixes,
and etc.
Signed-off-by: Tao Xu
---
No changes in v13.
---
tests/test-keyval.c| 125 +
tests/test-qobject-input
-by: Jingqi Liu
Suggested-by: Dan Williams
Signed-off-by: Tao Xu
---
Changes in v13:
- Modify some text description
- Drop "initiator_valid" field in struct NodeInfo (Igor)
Changes in v12:
- Fix the bug that a memory-only node without initiator setting
doesn't rep
Test the input of basic, time suffixes, float, invaild, trailing and
overflow.
Signed-off-by: Tao Xu
---
No changes in v13.
---
tests/test-cutils.c | 199
1 file changed, 199 insertions(+)
diff --git a/tests/test-cutils.c b/tests/test-cutils.c
tests/acpi-test-data/pc/*.acpihmat
tests/acpi-test-data/pc/HMAT.*
tests/acpi-test-data/q35/*.acpihmat
tests/acpi-test-data/q35/HMAT.*
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v13:
- U
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Reviewed-by: Daniel Black
Signed-off-by: Liu Jingqi
Signed-off-by: Tao
Compress HMAT latency and bandwidth raw data into uint16_t data,
which can be stored in HMAT table.
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
New patch in v13.
---
hw/core/numa.c | 57 +-
1 file changed, 56 insertions(+), 1 deletion
memory usage.
In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables.
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v13:
- Remove the unnecessary head file.
---
hw
-by: Tao Xu
---
Changes in v13:
- Reuse Garray to store the raw bandwidth and bandwidth data
- Calculate common base unit using range bitmap (Igor)
---
hw/core/numa.c| 127 ++
include/sysemu/numa.h | 68 ++
qapi
I to provide memory side cache information
hmat acpi: Build Memory Proximity Domain Attributes Structure(s)
hmat acpi: Build System Locality Latency and Bandwidth Information
Structure(s)
hmat acpi: Build Memory Side Cache Information Structure(s)
Tao Xu (7):
util/cutils: Add qemu_strtotime_ps(
performance of the system
memory that use the memory side cache.
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v13:
- rename level as cache_level
---
hw/acpi/hmat.c | 72 +-
1
this information as hint for optimization.
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v13:
- Calculate the entries in a new patch.
---
hw/acpi/hmat.c | 96 +-
1 file changed, 95 insertions(+), 1 deletion(-)
diff --git a
On 10/21/2019 8:29 PM, Igor Mammedov wrote:
On Sun, 20 Oct 2019 19:11:18 +0800
Tao Xu wrote:
In ACPI 6.3 chapter 5.2.27 Heterogeneous Memory Attribute Table (HMAT),
The initiator represents processor which access to memory. And in 5.2.27.3
Memory Proximity Domain Attributes Structure, the
On 10/22/2019 3:08 PM, Igor Mammedov wrote:
On Sun, 20 Oct 2019 19:11:19 +0800
Tao Xu wrote:
From: Liu Jingqi
Add -numa hmat-lb option to provide System Locality Latency and
Bandwidth Information. These memory attributes help to build
System Locality Latency and Bandwidth Information
On 10/22/2019 7:22 PM, Markus Armbruster wrote:
I just stumbled over this series. It touches the QAPI visitors and even
the generator, without cc'ing its maintainers. Such changes require
review. There's precious little time until the soft freeze now. I'll
try, but no promises.
Please cc me
On 10/23/2019 9:13 AM, Eric Blake wrote:
On 10/20/19 6:11 AM, Tao Xu wrote:
To convert strings with time suffixes to numbers, support time unit are
"ps" for picosecond, "ns" for nanosecond, "us" for microsecond, "ms"
for millisecond or "s" for
On 10/23/2019 9:08 AM, Eduardo Habkost wrote:
Hi,
First of all, sorry for not reviewing this earlier. I thought
other people were already looking at the first 4 patches.
On Sun, Oct 20, 2019 at 07:11:14PM +0800, Tao Xu wrote:
To convert strings with time suffixes to numbers, support time
On 2/12/2020 5:00 PM, Igor Mammedov wrote:
On Wed, 12 Feb 2020 16:13:28 +0800
Tao Xu wrote:
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models, to keep the model name
unchanged at /proc/cpuinfo inside the VM.
Signed-off-by: Tao Xu
On 12/5/2019 4:55 PM, Xiaoyao Li wrote:
On 12/2/2019 2:32 PM, Tao Xu wrote:
This series of patches will remove MPX from Denverton, remove Remove
monitor from some CPU models. Add additional information for -cpu help
to indicate the changes in this version of CPU model.
The output is as follows
On 12/5/2019 4:44 PM, Xiaoyao Li wrote:
On 12/2/2019 2:32 PM, Tao Xu wrote:
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 50 +++
1
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
[...]
diff --git a/util/cutils.c b/util/cutils.c
index
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Add more test case for double overflow and underflow.
- Set mul as int64_t (Markus)
- Restore endptr
d.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 38 ++
1 file changed, 38 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 06a3077f95..b09ac38409 100644
--- a/target/i386/cpu.c
+++ b/target/i386/cpu.c
@@ -3621,6 +3621,14 @@ static X86CPU
Add additional information for -cpu help to indicate the changes in this
version of CPU model.
Suggested-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12 ++--
1 file changed, 10 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index
56xx/L56xx/X56xx (Nehalem-C) [IBRS]
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
Tao Xu (4):
target/i386: Add Denverton-v2 (no MPX) CPU model
target/i386: Remove monitor from some CPU models
target/i386: Add new property note to versioned CPU models
target/i386: Add
Because MPX is being removed from the linux kernel, remove MPX feature
from Denverton.
Signed-off-by: Tao Xu
---
target/i386/cpu.c | 12
1 file changed, 12 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 69f518a21a..06a3077f95 100644
--- a/target/i386/cpu.c
Add which features are added or removed in this version. Remove the
changed model-id in versioned CPU models.
Signed-off-by: Tao Xu
---
Changes in v2:
- correct the note of Cascadelake v3 (Xiaoyao)
---
target/i386/cpu.c | 50 +++
1 file changed
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend to use double small than DBL_MIN
- Add more test case for double overflow and underflow.
- Set
ers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables. Before using initiator option, enable HMAT with
-machine hmat=on.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Jingqi Liu
Suggested-by: Dan Williams
Signed-off-by: Tao Xu
---
No changes in v20.
HMAT with -machine hmat=on.
Acked-by: Markus Armbruster
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Update the QAPI description (Markus)
- Keep base and bitmap unchanged when latency or bandwidth
out of range
Changes in v19:
- Add description about the
memory usage.
In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No chang
cality Latency and Bandwidth Information
Structure(s)
hmat acpi: Build Memory Side Cache Information Structure(s)
Tao Xu (3):
numa: Extend CLI to provide initiator information for numa nodes
tests/numa: Add case for QMP build HMAT
tests/bios-tables-test: add test cases for
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v18:
- Remove unit "ns".
Changes in v17:
- Update the latency and bandwidth
Change
Check configuring HMAT usecase
Acked-by: Markus Armbruster
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v20:
- Fix the wrong target in pc_hmat_erange_cfg
- Use g_assert_true and g_assert_false to replace g_assert
(Thomas and Markus)
Changes in v19:
- Add
-by: Markus Armbruster
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Disable cache level 0 in hmat-cache option (Igor)
- Update the QAPI description (Markus)
Changes in v19:
- Add description about the machine property 'hmat' in commit
messa
this information as hint for optimization.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v20:
- Fix the broken CI case when user input latency or bandwidth
less than required
Changes in v17:
- Remove
performance of the system
memory that use the memory side cache.
Acked-by: Markus Armbruster
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v20.
Changes in v16:
- Use checks and assert to replace
On 12/12/2019 8:48 PM, Igor Mammedov wrote:
Commit aa57020774b, by mistake used MachineClass::numa_mem_supported
to check if NUMA is supported by machine and also as unrelated change
set it to true for sbsa-ref board.
Luckily change didn't break machines that support NUMA, as the field
is set to
On 12/13/2019 6:06 PM, Michael S. Tsirkin wrote:
On Fri, Dec 13, 2019 at 09:19:21AM +0800, Tao Xu wrote:
This series of patches will build Heterogeneous Memory Attribute Table (HMAT)
according to the command line. The ACPI HMAT describes the memory attributes,
such as memory side cache
On 12/13/2019 5:12 PM, Igor Mammedov wrote:
On Fri, 13 Dec 2019 09:33:10 +0800
Tao Xu wrote:
On 12/12/2019 8:48 PM, Igor Mammedov wrote:
Commit aa57020774b, by mistake used MachineClass::numa_mem_supported
to check if NUMA is supported by machine and also as unrelated change
set it to true
Ping for comments.
On 12/9/2019 3:12 PM, Tao Xu wrote:
This series of patches will remove MPX from Denverton, remove Remove
monitor from some CPU models. Add additional information for -cpu help
to indicate the changes in this version of CPU model.
The output is as follows:
./x86_64-softmmu
Gentle ping.
On 12/9/2019 4:30 PM, Xu, Tao3 wrote:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend to use double small than DBL_MIN
- Add more
On 12/17/2019 6:25 PM, Markus Armbruster wrote:
Tao Xu writes:
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
On 12/17/2019 7:44 PM, Christophe de Dinechin wrote:
On 9 Dec 2019, at 09:30, Tao Xu wrote:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related test cases.
Signed-off-by: Tao Xu
---
Changes in v2:
- Resend to
On 12/17/2019 11:01 PM, Markus Armbruster wrote:
Christophe de Dinechin writes:
On 17 Dec 2019, at 15:08, Markus Armbruster wrote:
Christophe de Dinechin writes:
On 5 Dec 2019, at 16:29, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t
On 12/18/2019 9:33 AM, Tao Xu wrote:
On 12/17/2019 6:25 PM, Markus Armbruster wrote:
Tao Xu writes:
On 12/5/19 11:29 PM, Markus Armbruster wrote:
Tao Xu writes:
Parse input string both as a double and as a uint64_t, then use the
method which consumes more characters. Update the related
overflow.
Reviewed-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
No changes in v17.
Changes in v16:
- Update the test because precision is 64 bits
Changes in v15:
- Add a new patch to refactor do_strtosz() (Eduardo)
- use ARRAY_SIZE(suffixes) instead of hardcoding the
suf
Support full 64bit precision, modify related test cases.
Signed-off-by: Tao Xu
---
No changes in v17.
---
tests/test-cutils.c| 41 +---
tests/test-keyval.c| 47 +++---
tests/test-qemu-opts.c | 39
-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v17:
- Add check when user input latency or bandwidth 0, the
lb_info_provided should also be 0. Because in ACPI 6.3 5.2.27.4,
0 means the corresponding latency or bandwidth information is
not provided.
- Fix the
Add do_strtomul() to convert string according to different suffixes.
Reviewed-by: Eduardo Habkost
Signed-off-by: Tao Xu
---
No changes in v17.
Changes in v15:
- Add a new patch to refactor do_strtosz() (Eduardo)
---
util/cutils.c | 72
Add tests for time input such as zero, around limit of precision,
signed upper limit, actual upper limit, beyond limits, time suffixes,
and etc.
Signed-off-by: Tao Xu
---
No changes in v17.
Changes in v16:
- Update the test cases
Changes in v14:
- Drop time unit picosecond (Eric
tructure(s)
hmat acpi: Build Memory Side Cache Information Structure(s)
Tao Xu (9):
util/cutils: Add Add qemu_strtold and qemu_strtold_finite
util/cutils: Use qemu_strtold_finite to parse size
util/cutils: refactor do_strtosz() to support suffixes list
util/cutils: Add qemu_strtotime_ns()
Work like qemu_strtod() and qemu_strtold_finite, except store long
double.
Signed-off-by: Tao Xu
---
No changes in v17.
---
include/qemu/cutils.h | 3 +++
util/cutils.c | 48 ++-
2 files changed, 50 insertions(+), 1 deletion(-)
diff --git a
Add optional builtin type time, fallback is uint64. This type use
qemu_strtotime_ns() for pre-converting time suffix to numbers.
Signed-off-by: Tao Xu
---
No changes in v17.
Changes in v14:
- Drop time unit picosecond (Eric)
---
include/qapi/visitor-impl.h | 4
include/qapi
From: Liu Jingqi
Add -numa hmat-cache option to provide Memory Side Cache Information.
These memory attributes help to build Memory Side Cache Information
Structure(s) in ACPI Heterogeneous Memory Attribute Table (HMAT).
Reviewed-by: Daniel Black
Signed-off-by: Liu Jingqi
Signed-off-by: Tao
viewed-by: Igor Mammedov
Reviewed-by: Jingqi Liu
Suggested-by: Dan Williams
Signed-off-by: Tao Xu
---
No changes in v17.
Changes in v15:
- Change the QAPI version tag to 5.0 (Eric)
---
hw/core/machine.c | 64 +++
hw/core/numa.c| 23 ++
memory usage.
In the linux kernel, the codes in drivers/acpi/hmat/hmat.c parse and report
the platform's HMAT tables.
Reviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v17.
Changes i
this information as hint for optimization.
Reviewed-by: Igor Mammedov
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
Changes in v17:
- Remove unnecessary header file (Igor)
Changes in v16:
- Add more description for lb_length (Igor)
- Drop entry_list and calculate entries in
performance of the system
memory that use the memory side cache.
Reviewed-by: Daniel Black
Reviewed-by: Jonathan Cameron
Signed-off-by: Liu Jingqi
Signed-off-by: Tao Xu
---
No changes in v17.
Changes in v16:
- Use checks and assert to replace masks (Igor)
- Fields in Cache Attributes are
Check configuring HMAT usecase
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Chenges in v17:
- Add some fail test cases (Igor)
---
tests/numa-test.c | 194 ++
1 file changed, 194 insertions(+)
diff --git a/tests/numa-test.c b/tests/numa
eviewed-by: Igor Mammedov
Reviewed-by: Daniel Black
Reviewed-by: Jingqi Liu
Suggested-by: Igor Mammedov
Signed-off-by: Tao Xu
---
Changes in v17:
- Update the latency and bandwidth
Changes in v15:
- Make tests without breaking CI (Michael)
Changes in v13:
- Use decimal not
Hi Markus,
Do you have any comments on this patch and 02/14 05/14 06/14.
Thank you!
On 11/22/2019 3:48 PM, Xu, Tao3 wrote:
Work like qemu_strtod() and qemu_strtold_finite, except store long
double.
Signed-off-by: Tao Xu
---
No changes in v17.
---
include/qemu/cutils.h | 3 +++
util
On 11/22/2019 8:38 PM, Igor Mammedov wrote:
On Fri, 22 Nov 2019 01:17:12 -0800 (PST)
no-re...@patchew.org wrote:
Patchew URL: https://patchew.org/QEMU/20191122074826.1373-1-tao3...@intel.com/
do not ignore warnings "line over 80 characters",
just fix them
OK I will fin them in the next vers
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