On 08/09/2012 06:31 AM, Markus Armbruster wrote:
> Suppress default floppy and SD-card drives.
>
> Signed-off-by: Markus Armbruster
Acked-by: Richard Henderson
r~
I wanted to add some new insns, so that I could start testing gcc changes
for z10+, but found the more or less ad-hoc disassembly routines difficult
and error prone.
I've begun rewriting the translator into a more table-driven approach,
which I have so far found much easier to manage. I'd hoped t
Listener
> memory: add a readonly attribute to MemoryRegionSection
> memory: don't pass ->readable attribute to
> cpu_register_physical_memory_log
> memory: use a MemoryListener for core memory map updates too
> memory: drop AddressSpaceOps
Looks good.
Reviewed-by: Richard Henderson
r~
On 02/13/2012 12:13 PM, Blue Swirl wrote:
> Blue Swirl (6):
> TCG: split i386 and x86_64
> TCG: clean up i386 and x86_64
I object to these. I do NOT think splitting these makes the code base
as a whole any cleaner.
Is this really just about the differences wrt the softmmu templates?
Surely t
On 02/14/2012 03:38 AM, Andreas Färber wrote:
> Am 14.02.2012 00:41, schrieb Richard Henderson:
>> On 02/13/2012 12:13 PM, Blue Swirl wrote:
>>> Blue Swirl (6):
>>> TCG: split i386 and x86_64
>>> TCG: clean up i386 and x86_64
>>
>> I object to
On 02/14/2012 10:54 AM, Blue Swirl wrote:
> By the way, it could be possible to extract and extend the regparm(3)
> change and switch to always using the stack based calling convention
> (eliminate REGPARM), before AREG0 patches. Then the performance effect
> could be measured for just this change.
On 02/15/2012 10:11 AM, Blue Swirl wrote:
> #if defined(CONFIG_SOFTMMU)
> -int mem_index, s_bits, arg_idx;
> +int mem_index, s_bits;
> +#if TCG_TARGET_REG_BITS == 64
> +int arg_idx;
> +#else
> +int stack_adjust;
> +#endif
...
> -if (TCG_TARGET_REG_BITS == 64) {
> -tcg
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index f7d52d6..9c87cb6 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg-target.c
@@ -693,9
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 43 ---
tcg/sparc/tcg-target.h | 4 ++--
2 files changed, 38 insertions(+), 9 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 2475808..79530ec 100644
--- a/tcg
The datalo variable is still live in the miss path. Use another
when reconstructing the full data value.
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index
We must care not to clobber the high parts before we consume them.
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 30 ++
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 31e8204
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 121 +
tcg/sparc/tcg-target.h | 5 +-
2 files changed, 66 insertions(+), 60 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index d6da9fa..f7d52d6 100644
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 49 +++--
1 file changed, 47 insertions(+), 2 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index ab47c98..3b18fce 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg
Now that we're always sparcv9, we can not bother using Bicc for
32-bit branches and BPcc for 64-bit branches and instead always
use BPcc.
New interfaces allow less direct use of tcg_out32 and raw numbers
inside the qemu_ld/st routines.
Signed-off-by: Richard Henderson
---
tcg/spar
Changes v2->v2
* Rebase vs master, which now includes all dependencies.
* Patch 7 has had braces fixed.
Tree available at
git://github.com/rth7680/qemu.git tcg-sparc
r~
Richard Henderson (13):
target-sparc: Fix optimized %icc comparisons
tcg-sparc: Fix brcond2
tcg-sp
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 472eb51..71b9d65 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
@@ -1120,6 +1120,7 @@ static void
ome types from unsigned int to uint16_t when
> passing op_dead_args.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
Signed-off-by: Richard Henderson
---
sparc-dis.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sparc-dis.c b/sparc-dis.c
index cdd337a..1d017fa 100644
--- a/sparc-dis.c
+++ b/sparc-dis.c
@@ -3270,6 +3270,6 @@ print_insn_sparc (bfd_vma memaddr, disassemble_info *info
d already). The assumption is wrong
> if one of the op after clobbers some registers including the one
> of the holding the temp (this can be avoided by allocating clobbered
> registers last, which is what most TCG target do), or in case of lack
> of available register.
>
> Signe
Like brcond2, use tcg_high_cond. Use movcc instead of branches.
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 38 ++
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 79530ec
The set of comparisons that can immediately use the carry are LTU/GEU,
not LTU/LEU. Don't swap operands when we need a temp register; the
register may already be in use from setcond2.
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 33 +++--
1
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 35 ++-
1 file changed, 30 insertions(+), 5 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 3b18fce..f146647 100644
--- a/tcg/sparc/tcg-target.c
+++ b/tcg/sparc/tcg
ert in debug mode.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
ff-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
emove partial support for that.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 12:56 PM, Aurelien Jarno wrote:
> Operations with side effects (in practice qemu_ld/st ops), only need to
> synchronize globals to make sure the CPU state is consistent in case of
> exception.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/10/2012 12:42 AM, Aurelien Jarno wrote:
>> > - constant propagation using constraints. This would let tcg-i386 use
>> > effectively the mov $imm,(addr) instruction for spills of known-constant
>> > values.
> This is indeed something quite frustrating and even more when the
> same immediate v
LOBALS 0x0030
That said,
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:24 PM, Aurelien Jarno wrote:
> Maybe NO_RG_SE?
Perhaps, yes. But I certainly can't think of anything better.
r~
On 10/10/2012 10:12 AM, Richard Henderson wrote:
> On 10/09/2012 01:24 PM, Aurelien Jarno wrote:
>> Maybe NO_RG_SE?
>
> Perhaps, yes. But I certainly can't think of anything better.
How about NO_RWG_SE. I like having the fact that R implies W
be included in the symbol.
r~
On 10/09/2012 12:56 PM, Aurelien Jarno wrote:
> Rename helper flags to the new ones. This is purely a mechanical change,
> it's possible to use better flags by looking at the helpers.
>
> Cc: Richard Henderson
> Signed-off-by: Aurelien Jarno
Acked-by: Richard Henderson
r~
On 10/09/2012 12:56 PM, Aurelien Jarno wrote:
> Rename helper flags to the new ones. This is purely a mechanical change,
> it's possible to use better flags by looking at the helpers.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 12:56 PM, Aurelien Jarno wrote:
> Signed-off-by: Aurelien Jarno
> ---
> tcg/tcg.h |4
> 1 file changed, 4 deletions(-)
Reviewed-by: Richard Henderson
r~
On 10/09/2012 12:55 PM, Aurelien Jarno wrote:
> Aurelien Jarno (26):
> tcg: add temp_dead()
> tcg: add tcg_reg_sync()
> tcg: add temp_sync()
> tcg: sync output arguments on liveness request
> tcg: rework liveness analysis
> tcg: improve tcg_reg_alloc_movi()
> tcg: rewrite tcg_reg_allo
Much the same problem as recently fixed for hppa.
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c | 23 +++
1 file changed, 7 insertions(+), 16 deletions(-)
diff --git a/tcg/sparc/tcg-target.c b/tcg/sparc/tcg-target.c
index 0c32baa..2475808 100644
--- a/tcg
was to keep the macros simple.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> -return float64_sqrt(fdt0, &env->active_fpu.fp_status);
> +set_float_exception_flags(0, &env->active_fpu.fp_status);
> +fdt0 = float64_sqrt(fdt0, &env->active_fpu.fp_status);
> +update_fcr31(env);
> +return fdt0;
While accurate, I
value, they are
> technically different (and defined differently in the MIPS ISA).
>
> Remove the unused constants.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
> @@ -2495,8 +2491,9 @@ uint64_t helper_float_cvtl_d(CPUMIPSState *env,
> uint64_t fdt0)
>
translate.c | 91
> ---
> 1 file changed, 31 insertions(+), 60 deletions(-)
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> Only allocate t1 when needed.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> load/store microMIPS helpers are reinventing the wheel. Call do_lw,
> do_ll, do_sw and do_sl instead of using a macro calling the cpu_*
> load/store functions.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
from up to 8 to 1.
>
> Note: As we can't rely on shift by 32 or 64 undefined behaviour,
> the code loads already shift by one constants.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
ed comment,
> store operations don't have a register destination.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> Avoid the branches in movn/movz implementation and replace them with
> movcond. Also update a wrong command.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
't incorrect.
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> Use the deposit op instead of and hardcoded bit field insertion. It
> allows the host to emit the corresponding instruction if available.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:27 PM, Aurelien Jarno wrote:
> tag = env->CP0_EntryHi & ~mask;
> VPN = tlb->VPN & ~mask;
> +#if defined(TARGET_MIPS64)
> +tag &= env->SEGMask;
> +#endif
> /* Check ASID, virtual page number & size */
Indentation.
r~
On 10/09/2012 01:32 PM, Aurelien Jarno wrote:
> Implement movcond_i32/64 on ia64 hosts. It is not possible to have
> immediate compare arguments without adding a new bundle, but it is
> possible to have 22-bit immediate value arguments.
>
> Signed-off-by: Aurelien Jarno
Revie
tional register constraints.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
On 10/09/2012 01:32 PM, Aurelien Jarno wrote:
> It is possible to slightly optimize the TLB access code, by replacing
> the movi + and instructions by a deposit instruction.
>
> Signed-off-by: Aurelien Jarno
Reviewed-by: Richard Henderson
r~
Note that in the general reg=reg,reg case we're restricted
to 16-bit insertions. This makes it easy to allow "any"
constant as input, as post-truncation it will fit into the
constant load insn for which we have room in the bundle.
Signed-off-by: Richard Henderson
---
tcg/ia64/tc
Signed-off-by: Richard Henderson
---
linux-user/alpha/target_signal.h | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/linux-user/alpha/target_signal.h b/linux-user/alpha/target_signal.h
index 94f15f6..d3822da 100644
--- a/linux-user/alpha/target_signal.h
+++ b/linux
Compare signal numbers in the proper domain.
Convert all of the fields for SIGIO and SIGCHLD.
Signed-off-by: Richard Henderson
---
linux-user/qemu.h| 3 +++
linux-user/signal.c | 59 +++-
linux-user/syscall.c | 2 +-
3 files changed, 44
Validate count between 0 and IOV_MAX. Limit total length of
operation in the same way the kernel does.
Signed-off-by: Richard Henderson
---
linux-user/syscall.c | 162 ---
1 file changed, 102 insertions(+), 60 deletions(-)
diff --git a/linux
Signed-off-by: Richard Henderson
---
linux-user/syscall.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index 8708b31..462d11b 100644
--- a/linux-user/syscall.c
+++ b/linux-user/syscall.c
@@ -8864,6 +8864,19 @@ abi_long do_syscall
Unconditional bswap replaced by __get_user/__put_user.
Signed-off-by: Richard Henderson
---
linux-user/signal.c | 22 --
linux-user/syscall_defs.h | 2 +-
2 files changed, 9 insertions(+), 15 deletions(-)
diff --git a/linux-user/signal.c b/linux-user/signal.c
index
Changes v2-v3:
* Add patch 4, rewriting __get_user. Patch 5 triggers warnings about
"assignment of read-only variable" without it.
* Rebase vs master, which includes the cpu_alpha_init fix.
Patch set available at
git://repo.or.cz/qemu/rth.git axp-next
r~
Richard He
On 10/11/2012 12:22 PM, Richard Henderson wrote:
> The previous formuation with multiple assignments to __typeof(*hptr) falls
> down when hptr is qualified const. E.g. with const struct S *p, p->f is
> also qualified const.
>
> With this formulation, there's no assignmen
The previous formuation with multiple assignments to __typeof(*hptr) falls
down when hptr is qualified const. E.g. with const struct S *p, p->f is
also qualified const.
With this formulation, there's no assignment to any local variable.
Signed-off-by: Richard Henderson
---
linux-use
On 10/12/2012 04:10 AM, Riku Voipio wrote:
> Since changing __get_user/__put_user impacts more than just sigaction,
> do you mind if we put this patch (and thus sigaction change as well)
> to a later pull request?
Certainly.
r~
Older glibc (RHEL 5.x, Debian 5.x) does not have the _sigev_un._tid
member in its structure definition, while the accompanying kernel
headers do define SIGEV_THREAD_ID. We need configure to check for
both before using it.
Cc: Paolo Bonzini
Cc: Anthony Liguori
Signed-off-by: Richard Henderson
On 10/12/2012 11:24 AM, riku.voi...@linaro.org wrote:
> From: Riku Voipio
>
> Currently linux-user handles system calls with a 3000+ line switch/case
> construct
> in do_syscall(). Some syscalls are implemented inline in the switch/case,
> others
> as separate functions, and the rest as mix of
The second and fourth patches are new.
The patch set is available from
git://github.com/rth7680/qemu.git exec
r~
Richard Henderson (4):
exec: Split up and tidy code_gen_buffer
exec: Don't make DEFAULT_CODE_GEN_BUFFER_SIZE too large
exec: Do not use absolute address
e, and
with any calls to helper functions.
Signed-off-by: Richard Henderson
---
exec.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index 386cc08..e5f8c30 100644
--- a/exec.c
+++ b/exec.c
@@ -578,7 +578,12 @@ static inline void *alloc_code_
executable memory via a given allocation
mechanism.
Signed-off-by: Richard Henderson
---
exec.c | 193 ++---
1 file changed, 102 insertions(+), 91 deletions(-)
diff --git a/exec.c b/exec.c
index 7899042..db735dd 100644
--- a/exec.c
+++ b/exec.c
also reachable.
As a bonus, we get to avoid marking a page of the main executable's
data segment as executable.
Signed-off-by: Richard Henderson
---
exec.c| 30 +++---
tcg/tcg.h | 2 +-
2 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/exec.
For ARM we cap the buffer size to 16MB. Do not allocate 32MB in that case.
Signed-off-by: Richard Henderson
---
exec.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index db735dd..386cc08 100644
--- a/exec.c
+++ b/exec.c
@@ -529,7 +529,11 @@ bool
It is used nowhere else, and the corresponding MAX_CODE_GEN_BUFFER_SIZE
also lives there.
Signed-off-by: Richard Henderson
---
exec-all.h | 2 --
exec.c | 4
2 files changed, 4 insertions(+), 2 deletions(-)
Dang it, I knew there was something else I was intending to include
in the
On 2012-10-13 23:33, Blue Swirl wrote:
> /src/qemu/exec.c:4208: error: format '%ld' expects type 'long int',
> but argument 4 has type 'size_t'
Dang it. And here I thought I was helping get the type right for win64.
That printf format should be changed to %zd...
r~
Changes v3->v4:
* Patch 5 actually included,
* Patch 1 updates printf format for changed size_t.
r~
Richard Henderson (5):
exec: Split up and tidy code_gen_buffer
exec: Don't make DEFAULT_CODE_GEN_BUFFER_SIZE too large
exec: Do not use absolute address hints for code_gen_buf
e, and
with any calls to helper functions.
Signed-off-by: Richard Henderson
---
exec.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index 6c0b2d7..5e33a3d 100644
--- a/exec.c
+++ b/exec.c
@@ -578,7 +578,12 @@ static inline void *alloc_code_
It is used nowhere else, and the corresponding MAX_CODE_GEN_BUFFER_SIZE
also lives there.
Signed-off-by: Richard Henderson
---
exec-all.h | 2 --
exec.c | 4
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/exec-all.h b/exec-all.h
index 6516da0..7f29820 100644
--- a/exec
executable memory via a given allocation
mechanism.
Signed-off-by: Richard Henderson
---
exec.c | 195 ++---
1 file changed, 103 insertions(+), 92 deletions(-)
diff --git a/exec.c b/exec.c
index 7899042..eecae2f 100644
--- a/exec.c
+++ b/exec.c
For ARM we cap the buffer size to 16MB. Do not allocate 32MB in that case.
Signed-off-by: Richard Henderson
---
exec.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/exec.c b/exec.c
index eecae2f..6c0b2d7 100644
--- a/exec.c
+++ b/exec.c
@@ -529,7 +529,11 @@ bool
also reachable.
As a bonus, we get to avoid marking a page of the main executable's
data segment as executable.
Signed-off-by: Richard Henderson
---
exec.c| 30 +++---
tcg/tcg.h | 2 +-
2 files changed, 12 insertions(+), 20 deletions(-)
diff --git a/exec.
Infrastructure to be used to clean up handling of temporaries.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 52
1 file changed, 52 insertions(+)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 6cef96b
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 28 ++--
1 file changed, 14 insertions(+), 14 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 5296a37..5013aee 100644
--- a/target-sparc/translate.c
+++ b/target-sparc
We don't need another temporary here. Load directly into the
register we want to set.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 53 +++-
1 file changed, 21 insertions(+), 32 deletions(-)
diff --git a/target-sparc/translat
x use without initialization that clang found that gcc did not.
(Was I compiling without optimization last time?)
* Re-based vs master.
r~
Richard Henderson (20):
target-sparc: Add gen_load/store/dest_gpr
target-sparc: Conversion to gen_*_gpr, part 1
target-sparc: Use gen_load_gpr
Now that get_temp_tl is used for get_src[12], we don't need to
pre-allocate these temporaries.
Fallout from this is moving some assignments around cas/casx to
avoid uninitialized variable warnings.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 16 +++-
1
Only handle the easy cases directly within disas_sparc_insn.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 420 ---
1 file changed, 177 insertions(+), 243 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
Use cpu_tmp0 for other stuff, like Write Priv Register.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 52
1 file changed, 26 insertions(+), 26 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 29 +
1 file changed, 17 insertions(+), 12 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index e3e4256..5296a37 100644
--- a/target-sparc/translate.c
+++ b/target-sparc
No need to copy to a temporary to store 32 bits.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 56 +---
1 file changed, 24 insertions(+), 32 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 43e44d5
Push the DisasContext down so that we can use gen_load/store_gpr
in sode gen_ldda_asi, gen_stda_ast, gen_cas_asi, gen_casx_asi.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 61 +---
1 file changed, 32 insertions(+), 29 deletions
And initialize it such that it (may) write directly to rd.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 5b7e82b..8559cc3 100644
--- a/target
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 22 +++---
1 file changed, 11 insertions(+), 11 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 2a95c1f..e3e4256 100644
--- a/target-sparc/translate.c
+++ b/target-sparc
This means we can avoid the incoming temporary, though the cleanup
of the existing temporaries is not performed in this patch.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 75 +++-
1 file changed, 29 insertions(+), 46 deletions
Remove the last uses of cpu_tmp32. Unify the code between sparc64
and sparc32 by using the proper "tl" functions.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 37 +
1 file changed, 17 insertions(+), 20 deletions(-)
diff --gi
In all cases we don't have write-before-read problems.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 32
1 file changed, 16 insertions(+), 16 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 9b7bbef..00
Use a locally allocated temporary instead.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 73 +---
1 file changed, 44 insertions(+), 29 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index ed341b8
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 28 +---
1 file changed, 17 insertions(+), 11 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index 64feaa3..16cf8de 100644
--- a/target-sparc/translate.c
+++ b/target-sparc
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
index f4ab6cc..8a2e914 100644
--- a/target-sparc/translate.c
+++ b/target-sparc/translate.c
The use of "tl" functions and a tmp64 is logically incompatible.
Use cpu_tmp0 instead.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 12 ++--
1 file changed, 6 insertions(+), 6 deletions(-)
diff --git a/target-sparc/translate.c b/target-sparc/translate.c
ind
All users of gen_movl_{reg_TN,TN_reg} are removed. At the same time,
make cpu_val a local variable for load/store disassembly.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 58 +---
1 file changed, 20 insertions(+), 38 deletions
Subroutines do their own local temporary management.
Within disas_sparc_insn we limit the existance of the variable
to OP=2 insns, and delay initialization as late as is reasonable
for the specific XOP.
Signed-off-by: Richard Henderson
---
target-sparc/translate.c | 203
On 2012-10-16 20:49, Emmanuel Blot wrote:
> Is there any way to force QEmu to disable the TB cache so that the
> translation occurs each time a target instruction is loaded, or a
> clever way to print out the address of each executed target instruction ?
"-d exec" prints the entry point of each TB
On 2012-10-17 06:17, Laurent Desnogues wrote:
> If I remember correctly, that only works if block chaining is disabled.
Which it will be with -singlestep.
r~
On 2012-10-17 09:25, Aurelien Jarno wrote:
>> > +gen_opc_buf[op_index] = op = INDEX_op_mul_i32;
> Very minor nitpick: you probably don't need to set op there.
>
Perhaps not, but I prefer to keep the variables in sync as we
drop into common code...
r~
The remaining alpha-linux-user patch, with updated dependencies.
In addition, a new fix for guest system paths containing links.
r~
Richard Henderson (4):
cpu-all: Add unaligned load/store helper functions
linux-user: Rewrite __get_user/__put_user with __builtin_choose_expr
alpha-linux
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