Introduced "trace_aspeed_hace_addr", "trace_aspeed_hace_sg",
"trace_aspeed_hace_read", and "trace_aspeed_hace_write" trace events.
Signed-off-by: Jamin Lin
---
hw/misc/aspeed_hace.c | 8
hw/misc/trace-events | 6 ++
2 files changed, 14 insertions(+)
diff --git a/hw/misc/aspeed_hac
The maximum padding size is either 64 or 128 bytes and should always be smaller
than "req_len". If "padding_size" exceeds "req_len", then
"req_len - padding_size" underflows due to "uint32_t" data type, leading to a
large incorrect value (e.g., `0xFFXX`). This causes an out-of-bounds memory
acc
According to the AST2700 design, the data source address is 64-bit, with
R_HASH_SRC_HI storing bits [63:32] and R_HASH_SRC storing bits [31:0].
Similarly, the digest address is 64-bit, with R_HASH_DEST_HI storing bits
[63:32] and R_HASH_DEST storing bits [31:0]. The HMAC key buffer address is also
Added "key" and "key_hi" fields to "AspeedMasks" for 64-bit addresses test.
Updated "aspeed_test_addresses" to validate "HACE_HASH_KEY_BUFF" and
"HACE_HASH_KEY_BUFF_HI".
Ensured correct masking of 64-bit addresses by checking both lower and upper
32-bit registers.
Signed-off-by: Jamin Lin
---
te
The memory size was previously hardcoded to 0x1000 (4K). However, the actual
memory size of the HACE controller varies across different models:
1. AST2400/AST2500: 0x1000 (4K)
2. AST2600/AST1030: 0x1 (64K)
3. AST2700: 0x100 (256 bytes)
To address this, a new class attribute, mem_size, has been
Added "src_hi" and "dest_hi" fields to "AspeedMasks" for 64-bit addresses test.
Updated "aspeed_test_addresses" to validate "HACE_HASH_SRC_HI" and
"HACE_HASH_DIGEST_HI".
Ensured correct masking of 64-bit addresses by checking both lower and upper
32-bit registers.
Signed-off-by: Jamin Lin
---
te
The digest_addr is set to "src_addr + 0x100", where src_addr is the DRAM
base address. However, the value 0x100 (16MB) is too large because the
AST1030 does not support DRAM, and its SRAM size is only 768KB.
A range size of 0x1000 (64KB) is sufficient for HACE test cases, as the test
vecto
Currently, users define multiple local variables within different if-statements.
To improve readability and maintain consistency in variable naming, rename the
variables accordingly.
Introduced "sg_addr" to clearly indicate the scatter-gather mode buffer address.
Signed-off-by: Jamin Lin
---
hw/
Introduced "test_sha384_ast2600" to validate SHA-384 hashing.
Added "test_sha384_sg_ast2600" for scatter-gather SHA-384 verification.
Implemented "test_sha384_accum_ast2600" to test SHA-384 accumulation.
Registered new test cases in "main" to ensure execution.
Signed-off-by: Jamin Lin
---
tests/
In the previous design, the I2C model would update I2CC_DMA_LEN (0x54) based on
the value of I2CM_DMA_LEN (0x1C) when the firmware set either I2CM_DMA_TX_ADDR
(0x30) or I2CM_DMA_RX_ADDR (0x34). However, this only worked correctly if the
firmware set I2CM_DMA_LEN before setting I2CM_DMA_TX_ADDR or I
The variable "sram_name" was only used for naming the SRAM memory region.
Rename it to "name" for consistency with similar code and avoid unnecessary
new local variable declarations.
Signed-off-by: Jamin Lin
---
hw/arm/aspeed_ast27x0.c | 8
1 file changed, 4 insertions(+), 4 deletions(-
Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.
Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB
machines.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c |
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Signed-off-by: Jamin Lin
---
MAINTAINERS | 1 +
pc-bios/README | 6 ++
pc-bios/ast27x0_bootrom.bin | Bin 0 ->
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currentl
The variable "sram_name" was only used for naming the SRAM memory region.
Rename it to "name" for consistency with similar code and avoid unnecessary
new local variable declarations.
Signed-off-by: Jamin Lin
---
hw/arm/aspeed_ast27x0.c | 8
1 file changed, 4 insertions(+), 4 deletions(-
Move the declaration of `rom_size` to an outer scope in aspeed_machine_init()
so it can be reused for setting up the vbootrom region as well.
This avoids introducing a redundant local variable and ensures consistent
ROM sizing logic when both SPI boot and vbootrom are used.
Signed-off-by: Jamin L
Introduce a new vbootrom memory region. The region is mapped at address
"0x" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.
The vbootrom region is initialized as ROM and registered in
Refactor the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
tests/functional/tes
Introduced ASPEED_DEV_VBOOTROM into the ASPEED device enumeration to support a
virtual boot ROM.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed_soc.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index f069d17d16..37cd7cd793 100
Using the vbootrom image instead of manually loading boot components with
-device loader. The boot ROM binary is now passed via the -bios option,
using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
docs/system/arm/aspeed.rst | 18 --
1 file change
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.
Signed-off-by: Jamin Lin
---
hw/arm/aspeed.c | 32
1 file changed, 32 insertions(+)
diff --git a/hw/arm/aspeed.
Introduced a "vbootrom_size" attribute in "AspeedSoCClass" to define virtual
boot ROM size.
Initialized "vbootrom_size" to "0x2" for both AST2700 A0 and A1 variants.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed_soc.h | 1 +
hw/arm/aspeed_ast27x0.c | 2 ++
2 files changed, 3 inserti
Added new definitions for AST2700_A1_SILICON_REV and AST2750_A1_SILICON_REV to
identify the A1 silicon revisions.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/hw/misc/aspeed_scu.h | 2 ++
hw/misc/aspeed_scu.c | 2 ++
2 files changed, 4 insertions(+)
diff --git a/i
Introduced a "vbootrom_size" attribute in "AspeedSoCClass" to define virtual
boot ROM size.
Initialized "vbootrom_size" to "0x2" for both AST2700 A0 and A1 variants.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed_soc.h | 1 +
hw/arm/aspeed_ast27x0.c | 2 ++
2 files changed, 3 inserti
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.
Signed-off-by: Jamin Lin
---
hw/arm/aspeed.c | 32
1 file changed, 32 insertions(+)
diff --git a/hw/arm/aspeed.
Using the vbootrom image instead of manually loading boot components with
-device loader. The boot ROM binary is now passed via the -bios option,
using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
docs/system/arm/aspeed.rst | 18 --
1 file change
Move the declaration of `rom_size` to an outer scope in aspeed_machine_init()
so it can be reused for setting up the vbootrom region as well.
This avoids introducing a redundant local variable and ensures consistent
ROM sizing logic when both SPI boot and vbootrom are used.
Signed-off-by: Jamin L
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currentl
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Signed-off-by: Jamin Lin
---
MAINTAINERS | 1 +
pc-bios/README | 6 ++
pc-bios/ast27x0_bootrom.bin | Bin 0 ->
Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.
Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB
machines.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c |
Refactor the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
tests/functional/tes
Introduce a new vbootrom memory region. The region is mapped at address
"0x" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.
The vbootrom region is initialized as ROM and registered in
Updated test to target SDK version v03.00.
Removed redundant test case to simplify validation.
Cleaned up unsupported shell commands.
Signed-off-by: Jamin Lin
---
tests/functional/test_arm_aspeed_ast1030.py | 40 -
1 file changed, 7 insertions(+), 33 deletions(-)
diff --git
v1:
Update to test new ASPEED SDK version for AST2600, AST2500 ,and AST1030.
Jamin Lin (3):
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2500
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2500
tests/functional/aspeed: Update test ASPEED SDK v03.00 for AST10
Update test for AST2600 production revision A3.
Signed-off-by: Jamin Lin
---
tests/functional/test_arm_aspeed_ast2600.py | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tests/functional/test_arm_aspeed_ast2600.py
b/tests/functional/test_arm_aspeed_ast2600.py
Signed-off-by: Jamin Lin
---
tests/functional/test_arm_aspeed_ast2500.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/functional/test_arm_aspeed_ast2500.py
b/tests/functional/test_arm_aspeed_ast2500.py
index 1ffba6c995..90f3940e2a 100755
--- a/tests/functiona
The variable "sram_name" was only used for naming the SRAM memory region.
Rename it to "name" for consistency with similar code and avoid unnecessary
new local variable declarations.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
Tested-by: Nabih Estefan
---
hw/arm/aspeed_ast27x0.c | 8
Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.
Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB
machines.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
inc
Using the vbootrom image support and the boot ROM binary is
now passed via the -bios option, using the image located in
pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
---
docs/system/arm/aspeed.rst | 96 +++---
1 file changed, 90
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
MAINTAINERS | 1 +
pc-bios/README
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currently
Introduce a new vbootrom memory region. The region is mapped at address
"0x" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.
The vbootrom registered in the SoC's address space using th
Add the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
tests/functional/test_aar
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
hw/arm/aspeed.c | 35 +++
1 fi
Move the I2C test case into a common helper function (do_ast2700_i2c_test) so it
can be reused across multiple AST2700-based test cases. This reduces duplication
and improves maintainability.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Reviewed-by: Cédric Le Goater
---
tests/functional
The variable "sram_name" was only used for naming the SRAM memory region.
Rename it to "name" for consistency with similar code and avoid unnecessary
new local variable declarations.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
Tested-by: Nabih Estefan
---
hw/arm/aspeed_ast27x0.c | 8
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
tests/functional/test_aarch64_aspeed.py | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tests/functional/test_aarch64_aspeed.py
b/tests/functional/test_aarch64_aspeed.py
index 441f7f3919..337d7
Move the declaration of "rom_size" to an outer scope in aspeed_machine_init()
so it can be reused for setting up the vbootrom region as well.
This avoids introducing a redundant local variable and ensures consistent
ROM sizing logic when both SPI boot and vbootrom are used.
Signed-off-by: Jamin L
Extracted repeated boot and login steps into a new helper function.
No change in functional behavior.
Signed-off-by: Jamin Lin
---
tests/functional/test_aarch64_aspeed.py | 12 +++-
1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/tests/functional/test_aarch64_aspeed.py
b/t
v1:
Update to test new ASPEED SDK version for AST2600, AST2500 ,and AST1030.
v2:
Fix review issue for AST1030.
Jamin Lin (3):
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2500
tests/functional/aspeed: Update test ASPEED SDK v09.06 for AST2600
tests/functional/aspeed: Upd
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
tests/functional/test_arm_aspeed_ast2500.py | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/tests/functional/test_arm_aspeed_ast2500.py
b/tests/functional/test_arm_aspeed_ast2500.py
index 1ffba6c995..90f3940e
Update test for AST2600 production revision A3.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
tests/functional/test_arm_aspeed_ast2600.py | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/tests/functional/test_arm_aspeed_ast2600.py
b/tests/functio
Signed-off-by: Jamin Lin
---
tests/functional/test_arm_aspeed_ast1030.py | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/tests/functional/test_arm_aspeed_ast1030.py
b/tests/functional/test_arm_aspeed_ast1030.py
index d45d9f7c1c..77037f0179 100755
--- a/tests/functi
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c | 36
2 files changed,
Add the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
tests/functional/test_aar
Introduce a new vbootrom memory region. The region is mapped at address
"0x" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.
The vbootrom registered in the SoC's address space using th
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Signed-off-by: Jamin Lin
---
MAINTAINERS | 1 +
pc-bios/README | 6 ++
pc-bios/ast27x0_bootrom.bin | Bin 0 ->
Move the declaration of `rom_size` to an outer scope in aspeed_machine_init()
so it can be reused for setting up the vbootrom region as well.
This avoids introducing a redundant local variable and ensures consistent
ROM sizing logic when both SPI boot and vbootrom are used.
Signed-off-by: Jamin L
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currently
Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.
Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB
machines.
Signed-off-by: Jamin Lin
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c |
The variable "sram_name" was only used for naming the SRAM memory region.
Rename it to "name" for consistency with similar code and avoid unnecessary
new local variable declarations.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/arm/aspeed_ast27x0.c | 8
1 file changed,
Move the I2C test case into a common helper function (do_ast2700_i2c_test) so it
can be reused across multiple AST2700-based test cases. This reduces duplication
and improves maintainability.
Signed-off-by: Jamin Lin
---
tests/functional/test_aarch64_aspeed.py | 28 +
1 f
Signed-off-by: Jamin Lin
---
tests/functional/test_aarch64_aspeed.py | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tests/functional/test_aarch64_aspeed.py
b/tests/functional/test_aarch64_aspeed.py
index 441f7f3919..337d701917 100755
--- a/tests/functi
Using the vbootrom image support and the boot ROM binary is
now passed via the -bios option, using the image located in
pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
docs/system/arm/aspeed.rst | 29 -
1 file changed, 28 insertions(+), 1 deletion(-)
diff -
Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.
Set this field to true by default for the AST2700-A0 and AST2700-A1 EVB
machines.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
inc
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currently
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
MAINTAINERS | 1 +
pc-bios/README
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
include/hw/arm/aspeed.h | 1 +
hw/arm/aspeed.c | 36 +
Add the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
---
tests/functional/test_aar
Using the vbootrom image support and the boot ROM binary is
now passed via the -bios option, using the image located in
pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
---
docs/system/arm/aspeed.rst | 29 -
1 file changed, 28 insertio
Introduce a new vbootrom memory region. The region is mapped at address
"0x" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.
The vbootrom registered in the SoC's address space using th
Move the I2C test case into a common helper function (do_ast2700_i2c_test) so it
can be reused across multiple AST2700-based test cases. This reduces duplication
and improves maintainability.
Signed-off-by: Jamin Lin
---
tests/functional/test_aarch64_aspeed.py | 28 +
1 f
Signed-off-by: Jamin Lin
---
tests/functional/test_aarch64_aspeed.py | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/tests/functional/test_aarch64_aspeed.py
b/tests/functional/test_aarch64_aspeed.py
index 441f7f3919..337d701917 100755
--- a/tests/functi
Move the declaration of "rom_size" to an outer scope in aspeed_machine_init()
so it can be reused for setting up the vbootrom region as well.
This avoids introducing a redundant local variable and ensures consistent
ROM sizing logic when both SPI boot and vbootrom are used.
Signed-off-by: Jamin L
Using the vbootrom image support and the boot ROM binary is
now passed via the -bios option, using the image located in
pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Reviewed-by: Cédric Le Goater
---
docs/system/arm/aspeed.rst | 29 +++
Introduce a new vbootrom memory region. The region is mapped at address
"0x" and has a size of 128KB, identical to the SRAM region size.
This memory region is intended for loading a vbootrom image file as part of the
boot process.
The vbootrom registered in the SoC's address space using th
Moved AST2700-related content from the general Aspeed board list into a
dedicated section for Aspeed 2700 family boards. Improves clarity and
readability.
Signed-off-by: Jamin Lin
---
docs/system/arm/aspeed.rst | 70 ++
1 file changed, 63 insertions(+), 7 dele
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Commit id: 82bed5ca62295228ea7bcdc721b63db178f686e8
Signed-off-by: Jamin Lin
Reviewed-by: Nabih Estefan
Tested-by: Nabih Estefan
---
MAINTAINERS
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currently
Add the AST2700 functional test to boot using the vbootrom image
instead of manually loading boot components with -device loader.
The boot ROM binary is now passed via the
-bios option, using the image located in pc-bios/ast27x0_bootrom.bin.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
Introduce "aspeed_load_vbootrom()" to support loading a virtual boot ROM image
into the vbootrom memory region, using the "-bios" command-line option.
Introduce a new "vbootrom" field in the AspeedMachineClass to indicate whether
a machine supports the virtual boot ROM region.
Set this field to t
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currently
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Commit id: d6e3386709b3e49322a94ffadc2aaab9944ab77b
Build Information:
```
Build Date : Apr 29 2025 01:23:18
FW Version : git-d6e3386
```
Signed-off-
The boot ROM is a minimal implementation designed to load an AST27x0 boot image.
Its source code is available at:
https://github.com/google/vbootrom
Commit id: d6e3386709b3e49322a94ffadc2aaab9944ab77b
Build Information:
```
Build Date : Apr 29 2025 01:23:18
FW Version : git-d6e3386
```
Signed-off-
v1:
Add initial support for AST27x0
The purpose of vbootrom here is to simulate the work of BootMCU SPL (riscv)
in AST2700, because QEMU doesn't support heterogenous architecture yet.
ast27x0_bootrom.bin is a simplified, free (Apache 2.0) boot ROM for
ASPEED AST27x0 BMC SOC. It currently
Added support for multiple output pins in the INTC controller to
accommodate the AST2700 A1.
Introduced "num_outpins" to represent the number of output pins. Updated the
IRQ handling logic to initialize and connect output pins separately from input
pins. Modified the "aspeed_soc_ast2700_realize" f
Currently, AST2700 SoC only supports A0. To support AST2700 A1, rename its IRQ
table and machine name.
To follow the machine deprecation rule, the initial machine "ast2700-evb" is
aliased to "ast2700a0-evb." In the future, we will alias "ast2700-evb" to new
SoCs, such as "ast2700a1-evb."
Signed-o
The behavior of the enable and status registers is almost identical between
INTC(CPU Die) and INTCIO(IO Die). To reduce duplicated code, adds
"aspeed_intc_enable_handler" functions to handle enable register write
behavior and "aspeed_intc_status_handler" functions to handle status
register write be
Add AST2700 INTC design guidance and its block diagram.
Signed-off-by: Jamin Lin
---
docs/specs/aspeed-intc.rst | 136 +
docs/specs/index.rst | 1 +
2 files changed, 137 insertions(+)
create mode 100644 docs/specs/aspeed-intc.rst
diff --git a/docs/sp
Added a new method "start_ast2700_test" to the "AST2x00MachineSDK" class and
this method centralizes the logic for starting the AST2700 test, making it
reusable for different test cases.
Modified the hwmon path to use a wildcard to handle different SDK versions:
"cat /sys/bus/i2c/devices/1-004d/hw
Currently, these trace events only refer to INTC. To simplify the INTC model,
both INTC(CPU Die) and INTCIO(IO Die) will share the same helper functions.
However, it is difficult to recognize whether these trace events are comes from
INTC or INTCIO. To make these trace events more readable, adds o
The design of INTC controllers has significantly changed in AST2700 A1.
There are a total of 480 interrupt sources in AST2700 A1. For interrupt numbers
from 0 to 127, they can route directly to PSP, SSP, and TSP. Due to the
limitation of interrupt numbers of processors, the interrupts are merged e
According to the AST2700 datasheet, the INTC(CPU DIE) controller has 16KB
(0x4000) of register space, and the INTCIO (I/O DIE) controller has 1KB (0x400)
of register space.
Introduced a new class attribute "mem_size" to set different memory sizes for
the INTC models in AST2700.
Signed-off-by: Jam
Introduce a new ast2700 INTCIO class to support AST2700 INTCIO.
Added new register definitions for INTCIO, including enable and status
registers for IRQs GICINT192 through GICINT197.
Created a dedicated IRQ array for INTCIO, supporting six input pins and six
output pins, aligning with the newly def
v1:
1. Refactor INTC model to support both INTC0 and INTC1.
2. Support AST2700 A1.
3. Create ast2700a0-evb machine.
v2:
To streamline the review process, split the following patch series into
three parts.
https://patchwork.kernel.org/project/qemu-devel/cover/20250121070424.2465942-1-jam
To support AST2700 A1, some registers of the INTC(CPU Die) support one input
pin to multiple output pins. Renamed "num_ints" to "num_inpins" in the INTC
controller code for better clarity and consistency in naming conventions.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
include/h
To improve readability, sort the IRQ table by IRQ number.
Signed-off-by: Jamin Lin
Reviewed-by: Cédric Le Goater
---
hw/arm/aspeed_ast27x0.c | 50 -
1 file changed, 25 insertions(+), 25 deletions(-)
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_as
Refactors the INTC to distinguish between input and output pin indices,
improving interrupt handling clarity and accuracy.
Updated the functions to handle both input and output pin indices.
Added detailed logging for input and output pin indices in trace events.
These changes ensure that the INTC
This update introduces support for handling multi-output IRQs in the AST2700
interrupt controller (INTC), specifically for GICINT192_201. GICINT192_201 maps
1:10 to input IRQ 0 and output IRQs 0 to 9. Each status bit corresponds to a
specific IRQ.
Implemented "aspeed_intc_set_irq_handler_multi_out
The INTC controller supports GICINT128 to GICINT136, mapping 1:1 to input and
output IRQs 0 to 8. Previously, the formula "address & 0x0f00" was used to
derive the IRQ index numbers.
However, the INTC controller also supports GICINT192_201, mapping 1 input IRQ
pin to 10 output IRQ pins. The pin nu
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