Introduced a "vbootrom_size" attribute in "AspeedSoCClass" to define virtual
boot ROM size.
Initialized "vbootrom_size" to "0x20000" for both AST2700 A0 and A1 variants.
Signed-off-by: Jamin Lin <jamin_...@aspeedtech.com>
---
include/hw/arm/aspeed_soc.h | 1 +
hw/arm/aspeed_ast27x0.c | 2 ++
2 files changed, 3 insertions(+)
diff --git a/include/hw/arm/aspeed_soc.h b/include/hw/arm/aspeed_soc.h
index 37cd7cd793..432f6178ac 100644
--- a/include/hw/arm/aspeed_soc.h
+++ b/include/hw/arm/aspeed_soc.h
@@ -152,6 +152,7 @@ struct AspeedSoCClass {
const char * const *valid_cpu_types;
uint32_t silicon_rev;
uint64_t sram_size;
+ uint64_t vbootrom_size;
uint64_t secsram_size;
int spis_num;
int ehcis_num;
diff --git a/hw/arm/aspeed_ast27x0.c b/hw/arm/aspeed_ast27x0.c
index dce7255a2c..81dd90ffdd 100644
--- a/hw/arm/aspeed_ast27x0.c
+++ b/hw/arm/aspeed_ast27x0.c
@@ -898,6 +898,7 @@ static void aspeed_soc_ast2700a0_class_init(ObjectClass
*oc, void *data)
sc->valid_cpu_types = valid_cpu_types;
sc->silicon_rev = AST2700_A0_SILICON_REV;
+ sc->vbootrom_size = 0x20000;
sc->sram_size = 0x20000;
sc->spis_num = 3;
sc->wdts_num = 8;
@@ -925,6 +926,7 @@ static void aspeed_soc_ast2700a1_class_init(ObjectClass
*oc, void *data)
sc->valid_cpu_types = valid_cpu_types;
sc->silicon_rev = AST2700_A1_SILICON_REV;
+ sc->vbootrom_size = 0x20000;
sc->sram_size = 0x20000;
sc->spis_num = 3;
sc->wdts_num = 8;
--
2.43.0
