ystem-microblaze -cpu ?
Available CPUs:
microblaze-cpu
[gshan@gshan q]$ ./build/qemu-system-nios2 -cpu ?
Available CPUs:
nios2-cpu
Suggested-by: Richard Henderson
Signed-off-by: Gavin Shan
---
bsd-user/main.c | 5 +
cpu-target.c| 29 ++---
2 files change
sifive-u54
thead-c906
veyron-v1
x-rv128
Signed-off-by: Gavin Shan
---
target/riscv/cpu.c | 29 -
target/riscv/cpu.h | 2 --
2 files changed, 31 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 523e9a16ea..22d7422c89 100644
--- a/target/riscv/c
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
rx62n-rx-cpu
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-rx -cpu ?
Available CPUs:
rx62n
Signed-off-by: Gavin Shan
---
target/rx/cpu.c | 16
target/rx/cpu.h | 3 --
#x27;Octeon68XX'
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-mips64 -cpu ?
Available CPUs:
20Kc
24Kc
24KEc
24Kf
34Kf
4Kc
4KEc
4KEcR1
4KEm
4KEmR1
4Km
5Kc
5KEc
5KEf
5Kf
74Kf
I6400
I6500
I7200
Loongson-2E
Loongson-2F
Loongson-3A100
nning of code. The comments are tweaked a
bit either.
No functional change intended.
Signed-off-by: Gavin Shan
---
hw/core/machine.c | 82 +--
1 file changed, 44 insertions(+), 38 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
,
the valid CPU models can be shown.
qemu-system-aarch64: Invalid CPU type: cortex-a8
The valid types are: cortex-a7, cortex-a15, cortex-a35, \
cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \
neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53, \
cortex-a57, max
Signed-off-b
3c
de212
de233_fpu
dsp3400
lx106
sample_controller
test_mmuhifi_c3
Signed-off-by: Gavin Shan
---
target/xtensa/cpu.h | 10 +-
target/xtensa/helper.c | 19 +++
target/xtensa/overlay_tool.h | 7 ++-
3 files changed, 6 insertions(+), 30 deletion
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/riscv/shakti_c.c | 11 +--
1 file changed, 5 insertions(+), 6 d
Constify MachineClass::valid_cpu_types[i], as suggested by Richard
Henderson.
Suggested-by: Richard Henderson
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/m68k/q800.c | 2 +-
include/hw/boards.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Before it's applied:
[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
sh7750r
sh7751r
sh7785
After it's applied:
[gshan@gshan q]$ ./build/qemu-system-sh4 -cpu ?
Available CPUs:
sh7750r
sh7751r
sh7785
Signed-off-by: Gavin Shan
---
target/sh4/cpu.c | 17 -
target
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Leif Lindholm
Reviewed-by: Richard Henderson
---
hw/arm/sbsa-re
Use generic cpu_model_from_type() when the CPU model name needs to
be extracted from the CPU type name.
Signed-off-by: Gavin Shan
---
target/arm/arm-qmp-cmds.c | 3 +--
target/i386/cpu.c | 3 +--
target/loongarch/loongarch-qmp-cmds.c | 3 +--
target/mips/sysemu
No changes in the output from the following command.
[gshan@gshan q]$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
hppa
hppa64
Signed-off-by: Gavin Shan
---
target/hppa/cpu.c | 24
target/hppa/cpu.h | 3 ---
2 files changed, 27 deletions(-)
diff --git a/target
The names of supported CPU models instead of CPU types should be
printed when the user specified CPU type isn't supported, to be
consistent with the output from '-cpu ?'.
Correct the error messages to print CPU model names instead of CPU
type names.
Signed-off-by: Gavin Sha
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it by
ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Richard Henderson
---
hw/arm/bananapi_m2u.c | 12 ++--
hw/arm/cubieboard.c | 12 ++--
.
Signed-off-by: Salil Mehta
---
docs/specs/acpi_hw_reduced_hotplug.rst | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
Reviewed-by: Gavin Shan
On 11/15/23 21:18, BALATON Zoltan wrote:
On Wed, 15 Nov 2023, Gavin Shan wrote:
No need to check if @oc is abstract because it has been covered
by cpu_class_by_name().
Signed-off-by: Gavin Shan
---
target/hppa/cpu.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/target/hppa/cpu.c b/target
Hi Phil,
On 11/16/23 20:01, Philippe Mathieu-Daudé wrote:
On 15/11/23 00:55, Gavin Shan wrote:
There are two places where the user specified CPU type is checked to see
if it's supported or allowed by the board: machine_run_board_init() and
mc->init(). We don't have to maintain
Hi Phil,
On 11/16/23 17:51, Philippe Mathieu-Daudé wrote:
On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
On 15/11/23 00:56, Gavin Shan wrote:
Add generic cpu_list() to replace the individual target's implementation
in the subsequent commits. Currently, there are 3 targets with no cpu
Hi Phil,
On 11/16/23 20:25, Philippe Mathieu-Daudé wrote:
On 16/11/23 11:19, Philippe Mathieu-Daudé wrote:
On 16/11/23 08:51, Philippe Mathieu-Daudé wrote:
On 16/11/23 08:39, Philippe Mathieu-Daudé wrote:
On 15/11/23 00:56, Gavin Shan wrote:
Add generic cpu_list() to replace the individual
Hi Phil,
On 11/17/23 02:08, Philippe Mathieu-Daudé wrote:
On 15/11/23 00:56, Gavin Shan wrote:
From: Philippe Mathieu-Daudé
For all targets, the CPU class returned from CPUClass::class_by_name()
and object_class_dynamic_cast(oc, CPU_RESOLVING_TYPE) need to be
compatible. Lets apply the check
Hi Phil,
On 11/17/23 02:20, Philippe Mathieu-Daudé wrote:
On 16/11/23 14:35, Philippe Mathieu-Daudé wrote:
I'm queuing patches 1-3 & 5-23 to my cpus-next tree. No need to
repost them, please base them on my tree. I'll follow up with the
branch link when I finish my testing and push it.
Here
pe Mathieu-Daudé
Reviewed-by: Gavin Shan
---
target/alpha/cpu.c | 7 ++-
1 file changed, 2 insertions(+), 5 deletions(-)
diff --git a/target/alpha/cpu.c b/target/alpha/cpu.c
index 51b7d8d1bf..c7ae4d6a41 100644
--- a/target/alpha/cpu.c
+++ b/target/alpha/cpu.c
@@ -142,13 +142,10 @@ static O
* Collected r-bs from Philippe Mathieu-Daudé, Leif Lindholm,
Bastian Koppelmann, Daniel Henrique Barboza, Cédric Le Goater,
Gavin Shan (Gavin)
v3:
* Generic helper cpu_model_from_type()(Igor)
* Apply cpu_model_from
individual
target. In order to make CPU_RESOLVING_TYPE visible to cpu_class_by_name(),
the helper has to be moved to cpu-target.c
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Gavin Shan
---
cpu-target.c | 15 +++
hw/core/cpu-common.c | 14 --
target/arm
For target/alpha, the registered CPU type name is always the combination
of the CPU model name and suffix. Use cpu_model_from_type() to show the
CPU model names instead of the CPU type names.
Signed-off-by: Gavin Shan
---
target/alpha/cpu.c | 6 --
1 file changed, 4 insertions(+), 2
For target/avr, the registered CPU type name is always the combination
of the CPU model name and suffix. Use cpu_model_from_type() to show the
CPU model names. Besides, the conversion from CPU model name to CPU type
name needs to be supported in avr_cpu_class_by_name().
Signed-off-by: Gavin Shan
the
CPU type name to the CPU model name.
Suggested-by: Igor Mammedov
Signed-off-by: Gavin Shan
---
cpu-target.c | 16
include/hw/core/cpu.h | 12
2 files changed, 28 insertions(+)
diff --git a/cpu-target.c b/cpu-target.c
index 876b498233..344bad5736 100644
From: Philippe Mathieu-Daudé
Let CPUClass::class_by_name() handlers to return abstract classes,
and filter them once in the public cpu_class_by_name() method.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Gavin Shan
---
hw/core/cpu-common.c | 8 +++-
include/hw/core/cpu.h | 7
For target/hexagon, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
---
target/hexagon/cpu.c | 12 +---
1 file changed, 5 insertions(+), 7 deletions(-)
diff --git a
For target/openrisc, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
---
target/openrisc/cpu.c | 14 +-
1 file changed, 5 insertions(+), 9 deletions(-)
diff
For target/arm, the registered CPU type name is always the combination
of the CPU model name and suffix. Use cpu_model_from_type() to show the
CPU model names. In arm_cpu_list_entry(), @name is renamed to @model
since it points to CPU model name instead of CPU type name.
Signed-off-by: Gavin Shan
model name.
Signed-off-by: Gavin Shan
---
target/sh4/cpu.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/target/sh4/cpu.c b/target/sh4/cpu.c
index a8ec98b134..6097ddd52d 100644
--- a/target/sh4/cpu.c
+++ b/target/sh4/cpu.c
@@ -125,9 +125,10 @@ s
staticly
defined array.
Signed-off-by: Gavin Shan
---
target/mips/cpu-defs.c.inc | 9 -
target/mips/cpu.c | 18 ++
target/mips/sysemu/mips-qmp-cmds.c | 3 +--
3 files changed, 19 insertions(+), 11 deletions(-)
diff --git a/target/mips/cpu-defs.c.inc b
For target/s390x, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
---
target/s390x/cpu_models.c| 12 ++--
target/s390x/cpu_models_sysemu.c | 9 -
2
Implement hppa_cpu_list() to support cpu_list(). With this applied,
the available CPU model names, same to the CPU type names, are shown
as below.
$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
hppa-cpu
Signed-off-by: Gavin Shan
---
target/hppa/cpu.c | 19 +++
target
Constify MachineClass::valid_cpu_types[i], as suggested by Richard
Henderson.
Suggested-by: Richard Henderson
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/m68k/q800.c | 2 +-
include/hw/boards.h | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git
Set mc->valid_cpu_types so that the user specified CPU type can be
validated in machine_run_board_init(). We needn't to do the check
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/arm/virt.c | 21 +++--
1 file changed, 3 insertion
For target/i386, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to convert the CPU type name to the CPU model name.
Signed-off-by: Gavin Shan
---
target/i386/cpu.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions
For target/tricore, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
Reviewed-by: Bastian Koppelmann
---
target/tricore/helper.c | 13 +
1 file changed, 5
For target/cris, the registered CPU type name is always the combination
of the CPU model name and suffix. Use cpu_model_from_type() to show the
CPU model names.
Signed-off-by: Gavin Shan
---
target/cris/cpu.c | 7 +++
1 file changed, 3 insertions(+), 4 deletions(-)
diff --git a/target/cris
Implement microblaze_cpu_list() to support cpu_list(). With this applied,
the available CPU model names, same to the CPU type names, are shown
as below.
$ ./build/qemu-system-hppa -cpu ?
Available CPUs:
microblaze-cpu
Signed-off-by: Gavin Shan
---
target/microblaze/cpu.c | 20
-off-by: Gavin Shan
Reviewed-by: Daniel Henrique Barboza
---
target/riscv/cpu.c| 14 --
target/riscv/riscv-qmp-cmds.c | 3 +--
2 files changed, 9 insertions(+), 8 deletions(-)
diff --git a/target/riscv/cpu.c b/target/riscv/cpu.c
index 8b4024338c..9f47379145 100644
--- a
Implement nios2_cpu_list() to support cpu_list(). With this applied,
the available CPU model names, same to the CPU type names, are shown
as below.
$ ./build/qemu-system-nios2 -cpu ?
Available CPUs:
nios2-cpu
Signed-off-by: Gavin Shan
---
target/nios2/cpu.c | 20
nning of code. The comments are tweaked a
bit either.
No functional change intended.
Signed-off-by: Gavin Shan
---
hw/core/machine.c | 82 +--
1 file changed, 44 insertions(+), 38 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
a8
The valid types are: cortex-a7, cortex-a15, cortex-a35, \
cortex-a55, cortex-a72, cortex-a76, cortex-a710, a64fx, \
neoverse-n1, neoverse-v1, neoverse-n2, cortex-a53, \
cortex-a57, max
Signed-off-by: Gavin Shan
---
hw/arm/virt.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/
Remove the false conditions and comments since cpu_list() has been
supported on all targets.
Signed-off-by: Gavin Shan
---
bsd-user/main.c | 3 ---
cpu-target.c| 3 ---
2 files changed, 6 deletions(-)
diff --git a/bsd-user/main.c b/bsd-user/main.c
index c402fadf46..d3612ef0f5 100644
--- a
For target/rx, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
---
target/rx/cpu.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/target/rx/cpu.c
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it by
ourselves.
Signed-off-by: Gavin Shan
---
hw/arm/bananapi_m2u.c | 12 ++--
hw/arm/cubieboard.c | 12 ++--
hw/arm/mps2-tz.c
For target/ppc, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
Reviewed-by: Cédric Le Goater
---
target/ppc/cpu_init.c | 12 ++--
1 file changed, 6 insertions
tions in the
same function.
No functional change intended.
Suggested-by: Igor Mammedov
Signed-off-by: Gavin Shan
---
hw/core/machine.c | 14 --
1 file changed, 8 insertions(+), 6 deletions(-)
diff --git a/hw/core/machine.c b/hw/core/machine.c
index 50edaab737..1c17a0d5bf 100644
--- a
For target/m68k, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
---
target/m68k/helper.c | 14 ++
1 file changed, 6 insertions(+), 8 deletions(-)
diff --git a
The names of supported CPU models instead of CPU types should be
printed when the user specified CPU type isn't supported, to be
consistent with the output from '-cpu ?'.
Correct the error messages to print CPU model names instead of CPU
type names.
Signed-off-by: Gavin Sha
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Leif Lindholm
---
hw/arm/sbsa-ref.c | 21 +++--
1 file
Set mc->valid_cpu_types so that the user specified CPU type can
be validated in machine_run_board_init(). We needn't to do it
by ourselves.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/riscv/shakti_c.c | 11 +--
1 file changed, 5 insertions(+), 6 d
For target/loongarch, the registered CPU type name is always the
combination of the CPU model name and suffix. Use cpu_model_from_type()
to show the CPU model names.
Signed-off-by: Gavin Shan
---
target/loongarch/cpu.c| 5 -
target/loongarch/loongarch-qmp-cmds.c | 3 +--
2
Hi Shameer,
On 8/15/23 19:27, Shameer Kolothum wrote:
Now that we have Eager Page Split support added for ARM in the kernel,
enable it in Qemu. This adds,
-eager-split-size to -accel sub-options to set the eager page split chunk
size.
-enable KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE.
The chunk s
Hi Shameer,
On 8/15/23 19:27, Shameer Kolothum wrote:
Now that we have Eager Page Split support added for ARM in the kernel,
enable it in Qemu. This adds,
-eager-split-size to -accel sub-options to set the eager page split chunk
size.
-enable KVM_CAP_ARM_EAGER_SPLIT_CHUNK_SIZE.
The chunk
Hi Igor,
On 8/29/23 00:46, Igor Mammedov wrote:
On Mon, 31 Jul 2023 15:07:30 +1000
Gavin Shan wrote:
On 7/27/23 19:00, Igor Mammedov wrote:
On Thu, 27 Jul 2023 15:16:18 +1000
Gavin Shan wrote:
On 7/27/23 09:08, Richard Henderson wrote:
On 7/25/23 17:32, Gavin Shan wrote:
-static
Hi Igor,
On 8/29/23 19:03, Igor Mammedov wrote:
On Tue, 29 Aug 2023 16:28:45 +1000
Gavin Shan wrote:
On 8/29/23 00:46, Igor Mammedov wrote:
On Mon, 31 Jul 2023 15:07:30 +1000
Gavin Shan wrote:
On 7/27/23 19:00, Igor Mammedov wrote:
On Thu, 27 Jul 2023 15:16:18 +1000
Gavin Shan wrote
fine to me.
Reviewed-by: Gavin Shan
diff --git a/accel/kvm/kvm-all.c b/accel/kvm/kvm-all.c
index 2ba7521695..ff1578bb32 100644
--- a/accel/kvm/kvm-all.c
+++ b/accel/kvm/kvm-all.c
@@ -3763,6 +3763,7 @@ static void kvm_accel_instance_init(Object *obj)
/* KVM dirty ring is by defaul
: Extract common KVM vCPU {creation,parking} code")
Reported-by: Peter Maydell
Suggested-by: Peter Maydell
Message-ID:
Signed-off-by: Salil Mehta
---
accel/kvm/kvm-all.c | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Gavin Shan
On 3/11/20 3:09 PM, Gavin Shan wrote:
The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is
disabled when its depth is 1. It's nice to have TxFIFO enabled if
possible because more characters can be piled and transmitted at once,
which would have less overhead. Besides, we c
On 2/24/20 2:13 PM, Gavin Shan wrote:
The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is
disabled when its depth is 1. It's nice to have TxFIFO enabled if
possible because more characters can be piled and transmitted at once,
which would have less overhead. Besides, we c
On 3/6/20 10:15 PM, Marc-André Lureau wrote:
On Mon, Feb 24, 2020 at 4:13 AM Gavin Shan wrote:
The depth of TxFIFO can be 1 or 16 depending on LCR[4]. The TxFIFO is
disabled when its depth is 1. It's nice to have TxFIFO enabled if
possible because more characters can be piled and transm
e_all(), which isn't nice.
This enables TxFIFO if possible. On ther other hand, the asynchronous
transmission is enabled if needed, as we did in hw/char/cadence_uart.c
Signed-off-by: Gavin Shan
---
v3: Use PL011() to do data type conversion
Return G_SOURCE_REMOVE when the backend is di
On 3/11/20 3:43 PM, no-re...@patchew.org wrote:
[...]
http://patchew.org/logs/20200311040923.29115-1-gs...@redhat.com/testing.asan/?type=message.
Is it possible to be a false alarm? The detailed errors extracted from above
link is shown as below, and I'm unable to reproduce it at local:
Error
Hi Drew,
On 3/17/21 11:54 PM, Andrew Jones wrote:
On Wed, Mar 17, 2021 at 11:14:56AM +, Peter Maydell wrote:
On Wed, 17 Mar 2021 at 10:59, Gavin Shan wrote:
On 3/17/21 9:40 PM, Peter Maydell wrote:
On Wed, 17 Mar 2021 at 10:37, Gavin Shan wrote:
On 3/17/21 8:09 PM, Peter Maydell wrote
s: aac63e0e6ea3 ("hw/char/pl011: add a clock input")
Suggested-by: Andrew Jones
Signed-off-by: Gavin Shan
---
hw/char/pl011.c | 9 +
hw/core/machine.c | 1 +
include/hw/char/pl011.h | 1 +
3 files changed, 11 insertions(+)
diff --git a/hw/char/pl011.c b/hw
-a64.cc:20:1: note: ‘extern "C"’ linkage started here
20 | extern "C" {
| ^~~~~~
Signed-off-by: Gavin Shan
---
disas/arm-a64.cc | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/disas/arm-a64.cc b/disas/arm-a64.cc
index 9fa779e175..8545c0403
ays return zeroes when we have the following gcc
version.
# gcc --version
gcc (GCC) 11.0.0 20210210 (Red Hat 11.0.0-0)
This abstracts the code from exec-vary.c and use it as indicator to
enable gcc alias attribute or not.
Signed-off-by: Gavin Shan
---
conf
Hi Thomas,
On 3/20/21 3:48 PM, Thomas Huth wrote:
On 20/03/2021 05.27, Gavin Shan wrote:
It's still possible that the wrong value is returned from the alias
of variable even if the program can be compiled without issue. This
improves the check by executing the binary to check the result
Hi Paolo and Richard,
On 3/21/21 9:33 AM, Richard Henderson wrote:
On 3/20/21 11:52 AM, Paolo Bonzini wrote:
+int main(void)
+{
+ return read_y();
+}
I think this should be "read_y() == 1 ? 0 : 1".
As a testcase returning 0 on success, yes.
Ok. I will include the changes in v2. Also,
ttribute is disabled
for the cross-compiling case as the compiled binary isn't executable.
Signed-off-by: Gavin Shan
---
v2: Disable gcc alias attribute for cross-compiling case.
Return 0 on success from test program.
Wrap lines of test program and improved commit
Hi Richard and Paolo,
On 3/22/21 5:23 AM, Richard Henderson wrote:
On 3/21/21 11:46 AM, Paolo Bonzini wrote:
HRM, what about biting the bullet and making exec-vary.c a C++ source?... Then
instead of making it conditional an attribute((alias)), we make it conditional
on having a C++ compiler.
value
of TARGET_PAGE_BITS_MIN.
Reported-by: Gavin Shan
Signed-off-by: Richard Henderson
---
configure| 19 ---
meson.build | 18 ++-
include/exec/cpu-all.h | 15 ++
include/exec/page-vary.h | 34
exec-vary.c | 108
Hi Richard,
On 3/23/21 7:59 AM, Richard Henderson wrote:
On 3/22/21 4:54 AM, Gavin Shan wrote:
It looks this issue can be avoided after "volatile" is applied to
@target_page. However, I'm not sure if it's the correct fix to have.
Certainly not.
That is the exact oppo
@init->target is always -1 and preferred target is retrieved from
host when @init isn't NULL in kvm_arm_create_scratch_host_vcpu().
So we can have the assumption that preferred target retrived from
host is tried prior to the specified target list.
Signed-off-by: Gavin Shan
---
target/a
ue
is set according to the detected target.
Fixes: f7fb73b8cdd3 ("target/arm: Make number of counters in PMCR follow the
CPU")
Signed-off-by: Gavin Shan
---
target/arm/kvm64.c | 32 +++-
1 file changed, 27 insertions(+), 5 deletions(-)
diff --git a/targe
Hi Peter,
On 4/7/21 5:38 PM, Peter Maydell wrote:
On Wed, 7 Apr 2021 at 03:01, Gavin Shan wrote:
If the scratch vCPU is initialized without PMU feature, we receive
error on reading PMCR_EL0 as it's invisible in this case. It leads
to host probing failure.
This fixes the iss
igrated by sub-section to avoid the
migration failure.
Cc: qemu-sta...@nongnu.org
Fixes: aac63e0e6ea3 ("hw/char/pl011: add a clock input")
Signed-off-by: Gavin Shan
---
hw/char/pl011.c | 22 +-
1 file changed, 9 insertions(+), 13 deletions(-)
diff --git a/hw/c
Hi Peter,
On 3/17/21 8:09 PM, Peter Maydell wrote:
On Wed, 17 Mar 2021 at 04:44, Gavin Shan wrote:
There is a added clock to trace buad rate change since v5.2.0 by
commit aac63e0e6ea3 ("hw/char/pl011: add a clock input"). The added
clock causes migration failure. For example, migr
Hi Peter,
On 3/17/21 9:40 PM, Peter Maydell wrote:
On Wed, 17 Mar 2021 at 10:37, Gavin Shan wrote:
On 3/17/21 8:09 PM, Peter Maydell wrote:
On Wed, 17 Mar 2021 at 04:44, Gavin Shan wrote:
static const VMStateDescription vmstate_pl011 = {
.name = "pl011",
.vers
emory node names. With this applied, the
VM can boot successfully with above command lines.
Signed-off-by: Gavin Shan
---
hw/arm/boot.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/hw/arm/boot.c b/hw/arm/boot.c
index d7b059225e..3169bdf595 100644
--- a/hw/arm/boot.c
++
Hi Drew,
On 6/1/21 5:50 PM, Andrew Jones wrote:
On Tue, Jun 01, 2021 at 03:30:04PM +0800, Gavin Shan wrote:
We possibly populate empty nodes where memory isn't included and might
be hot added at late time. The FDT memory nodes can't be created due
to conflicts on their names if mult
Hi Drew,
On 6/2/21 9:36 PM, Andrew Jones wrote:
On Wed, Jun 02, 2021 at 11:09:32AM +1000, Gavin Shan wrote:
On 6/1/21 5:50 PM, Andrew Jones wrote:
On Tue, Jun 01, 2021 at 03:30:04PM +0800, Gavin Shan wrote:
We possibly populate empty nodes where memory isn't included and might
be hot
[including more folks into the discussion]
On Fri, 17 Jan 2020 at 14:00, Peter Maydell wrote:
On Thu, 19 Dec 2019 at 04:06, Gavin Shan wrote:
This supports NMI injection for virtual machine and currently it's only
supported on GICv3 controller, which is emulated by qemu or host kernel
On 1/28/20 9:56 PM, Auger Eric wrote:
Hi Marc,
On 1/28/20 10:25 AM, Marc Zyngier wrote:
Gavin, Eric,
On 2020-01-28 08:05, Auger Eric wrote:
Hi,
On 1/28/20 7:48 AM, Gavin Shan wrote:
[including more folks into the discussion]
On Fri, 17 Jan 2020 at 14:00, Peter Maydell
wrote:
On Thu, 19
On 1/29/20 1:44 PM, Alexey Kardashevskiy wrote:
On 28/01/2020 17:48, Gavin Shan wrote:
[including more folks into the discussion]
On Fri, 17 Jan 2020 at 14:00, Peter Maydell
wrote:
On Thu, 19 Dec 2019 at 04:06, Gavin Shan wrote:
This supports NMI injection for virtual machine and
On 1/28/20 7:29 PM, Julien Thierry wrote:
Hi Gavin,
On 1/28/20 6:48 AM, Gavin Shan wrote:
[including more folks into the discussion]
On Fri, 17 Jan 2020 at 14:00, Peter Maydell wrote:
On Thu, 19 Dec 2019 at 04:06, Gavin Shan wrote:
This supports NMI injection for virtual machine and
On 1/29/20 6:57 PM, Julien Thierry wrote:
On 1/29/20 3:46 AM, Gavin Shan wrote:
On 1/28/20 7:29 PM, Julien Thierry wrote:
.../...
Julien, thanks for the explanation. The question we're not sure if NMI should
be injected on receiving HMP/QMP "nmi" command. It means it&#
On 1/30/20 9:58 PM, Marc Zyngier wrote:
On 2020-01-29 21:54, Gavin Shan wrote:
On 1/29/20 6:57 PM, Julien Thierry wrote:
On 1/29/20 3:46 AM, Gavin Shan wrote:
On 1/28/20 7:29 PM, Julien Thierry wrote:
.../...
Julien, thanks for the explanation. The question we're not sure if NMI s
On 1/29/20 8:04 PM, Marc Zyngier wrote:
On 2020-01-29 02:44, Alexey Kardashevskiy wrote:
On 28/01/2020 17:48, Gavin Shan wrote:
but a NMI is injected
through LAPIC on x86. So I'm not sure what architect (system reset on
ppc or injecting NMI on x86) aarch64 should follow.
I'd sa
On 2/21/20 11:44 PM, Peter Maydell wrote:
On Fri, 21 Feb 2020 at 11:44, Paolo Bonzini wrote:
On 21/02/20 11:21, Peter Maydell wrote:
Before you do that, I would suggest investigating:
* is this a problem we've already had on x86 and that there is a
standard solution for
Disconnected so
On 2/22/20 5:15 AM, Paolo Bonzini wrote:
On 21/02/20 14:14, Peter Maydell wrote:
The initial case reported by Gavin in this thread is
"-serial tcp:127.0.0.1:50900" with the other end being a program which
listens on TCP port 50900 and then sleeps without accepting any incoming
connections, which
Hi Marc,
On 2/21/20 8:09 PM, Marc Zyngier wrote:
On 2020-02-21 04:24, Gavin Shan wrote:
On 2/20/20 9:10 PM, Peter Maydell wrote:
On Thu, 20 Feb 2020 at 09:10, Marc Zyngier wrote:
On 2020-02-20 06:01, Gavin Shan wrote:
This fixes the issue by using newly added API
qemu_chr_fe_try_write_all
e_all(), which isn't nice.
This enables TxFIFO if possible. On ther other hand, the asynchronous
transmission is enabled if needed, as we did in hw/char/cadence_uart.c
Signed-off-by: Gavin Shan
---
v2: Put write_{count,fifo} into migration subsection
Don't start async IO handle
On 2/21/20 8:46 PM, Philippe Mathieu-Daudé wrote:
On 2/21/20 10:37 AM, Philippe Mathieu-Daudé wrote:
Cc'ing Igor & Drew.
On 2/21/20 7:28 AM, no-re...@patchew.org wrote:
Patchew URL: https://patchew.org/QEMU/20200221044908.266883-1-gs...@redhat.com/
>
=== TEST SCRIPT BEGIN ===
#!/bin/bash
ma
This uses TYPE_PL011 when creating the serial port, to make the code
a bit more atomatic.
Signed-off-by: Gavin Shan
---
hw/arm/sbsa-ref.c| 3 ++-
hw/arm/virt.c| 3 ++-
hw/arm/xlnx-versal.c | 3 ++-
3 files changed, 6 insertions(+), 3 deletions(-)
diff --git a/hw/arm/sbsa-ref.c b/hw
This uses TYPE_PL011 when creating the serial port so that the code
looks cleaner.
Signed-off-by: Gavin Shan
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
---
v2: Improved changelog suggested by Phil
---
hw/arm/sbsa-ref.c| 3 ++-
hw/arm/virt.c| 3 ++-
hw/arm
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