On Tue, 10 Jun 2025 at 02:28, Guenter Roeck wrote:
>
> In some situations it is desirable to be able to specify the flash type
> connected to a board. For example, the target operating system may not
> support the default flash type, its support may be broken, or the qemu
> emulation is insufficie
This is based on version v0.8.3 of the ZALASR specification [1].
The specification is listed as in Frozen state [2].
[1]: https://github.com/riscv/riscv-zalasr/tree/v0.8.3
[2]:
https://lf-riscv.atlassian.net/wiki/spaces/HOME/pages/16154882/All+RISC-V+Specifications+Under+Active+Development
Signe
On 6/3/2025 2:24 AM, Michael Tokarev wrote:
On 16.05.2025 13:05, Sairaj Kodilkar wrote:
Fix following two issues in the amd viommu
1. The guest fails to setup the passthrough device when for following
setup
because amd iommu enables the no DMA memory region even when guest is
using
Ping, resending as no responses in over week.
V2:
- rebased patch onto master branch
- added check for RV64() for Load Double, as pointed out by Alistair Palmer.
In response to Alistair Palmer
(https://lists.gnu.org/archive/html/qemu-riscv/2025-06/msg00010.html):
"Aren't you missing a check
From: Qiang Ma
Commit bab27ea2e3 ("hw/arm/virt: smbios:
inform guest of kvm") fixes the same issue
on arm.
without this patch:
[root@localhost ~]# virt-what
qemu
with this patch:
[root@localhost ~]# virt-what
kvm
Signed-off-by: Qiang Ma
Reviewed-by: Bibo Mao
Reviewed-by: Song Gao
Message-Id
On 5/29/25 21:24, Steve Sistare wrote:
vfio_cpr_[un]register_container is no longer used since they were
subsumed by container type-specific registration. Delete them.
Signed-off-by: Steve Sistare
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
include/hw/vfio/vfio-cpr.h | 4
h
Hi Paolo,
On 30/5/25 09:11, Paolo Bonzini wrote:
Do not leave the __le* macros defined, in fact do not use them at all. Fixes a
build failure on Alpine with the TDX patches:
In file included from ../hw/net/rocker/rocker_of_dpa.c:25:
../hw/net/rocker/rocker_hw.h:14:16: error: conflicting types
On 5/6/25 15:27, Zhao Liu wrote:
I386 has already defined cache types in target/i386/cpu.h.
Move CacheType to hw/core/cpu.h, so that ARM and other architectures
could use it.
Cc: Alireza Sanaee
Signed-off-by: Zhao Liu
---
This is for Ali's ARM cache topology support:
https://lore.kernel.org/q
On 2/6/25 15:12, Djordje Todorovic wrote:
Add a new function, so we can change reset vector from platforms.
Signed-off-by: Chao-ying Fu
Signed-off-by: Djordje Todorovic
---
target/riscv/cpu.h | 2 ++
target/riscv/translate.c | 8
2 files changed, 10 insertions(+)
diff --git
On 2/6/25 15:12, Djordje Todorovic wrote:
The board model supports up to 64 harts with MIPS CPS, MIPS GCR,
MIPS CPC, AIA plic, and AIA clint devices. The model can create
boot code, if there is no -bios parameter. We can specify -smp x,
cores=y,thread=z. Ex: Use 4 cores and 2 threads with each co
On 6/7/25 02:10, John Levon wrote:
For vfio-user, each region has its own fd rather than sharing
vbasedev's. Add the necessary plumbing to support this, and use the
correct fd in vfio_region_mmap().
Signed-off-by: John Levon
---
include/hw/vfio/vfio-device.h | 7 +--
hw/vfio/device.c
On 10/6/25 09:53, Philippe Mathieu-Daudé wrote:
Hi Paolo,
On 30/5/25 09:11, Paolo Bonzini wrote:
Do not leave the __le* macros defined, in fact do not use them at
all. Fixes a
build failure on Alpine with the TDX patches:
In file included from ../hw/net/rocker/rocker_of_dpa.c:25:
../hw/net/r
Hi Peter,
On 6/9/25 12:41 PM, Peter Maydell wrote:
> Currently we define the ID_AA64PFR2_EL1 encoding as reserved (with
> the required RAZ behaviour for unassigned system registers in the ID
> register encoding space). Newer architecture versions start to
> define fields in this ID register, so d
On 6/7/25 02:10, John Levon wrote:
The vfio-user code will need to re-use various parts of the vfio PCI
code. Export them in hw/vfio/pci.h, and rename them to the vfio_pci_*
namespace.
Signed-off-by: John Levon
Reviewed-by: Cédric Le Goater
Thanks,
C.
---
hw/vfio/pci.h| 11 ++
On 30/5/25 17:21, Daniel P. Berrangé wrote:
We have been inconsistent about whether ROMS stored in git have
execute permission set, and by default meson will preserve source
file permissions when installing files. This has caused periodic
problems in RPM packaging as executable binary files get a
Hi Zoltan,
On 2/5/25 01:20, BALATON Zoltan wrote:
Add a more general DEFINE_MACHINE_EXTENDED macro and define simpler
versions with less parameters based on that. This is inspired by how
the OBJECT_DEFINE macros do this in a similar way to allow using the
shortened definition in more complex cas
On 6/7/25 02:10, John Levon wrote:
If VFIO_IRQ_INFO_MASKABLE is set for VFIO_PCI_MSIX_IRQ_INDEX, record
this in ->can_mask_msix, and use it to individually mask MSI-X
interrupts as needed.
Originally-by: John Johnson
Signed-off-by: Elena Ufimtseva
Signed-off-by: Jagannathan Raman
Signed-off-b
On 2/5/25 01:20, BALATON Zoltan wrote:
Use more generic name for the field used to store the north bridge in
the machine state.
Signed-off-by: BALATON Zoltan
---
hw/ppc/pegasos2.c | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/hw/ppc/pegasos2.c b/h
Hi,
On 2/6/25 15:12, Djordje Todorovic wrote:
This is needed for riscv based CPUs by MIPS.
This justification is not really convincing.
Signed-off-by: Chao-ying Fu
Signed-off-by: Djordje Todorovic
---
hw/intc/riscv_aclint.c | 33 +++--
hw/intc/riscv_aplic.c
On 2/5/25 01:20, BALATON Zoltan wrote:
Add field for the south bridge in machine state to have both north and
south bridges in it.
Signed-off-by: BALATON Zoltan
---
hw/ppc/pegasos2.c | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
Reviewed-by: Philippe Mathieu-Daudé
Hi,
On 2/6/25 15:12, Djordje Todorovic wrote:
Introduce MIPS P8700 CPU and set reset vector to 0x1fc0.
Signed-off-by: Chao-ying Fu
Signed-off-by: Djordje Todorovic
---
target/riscv/cpu-qom.h | 1 +
target/riscv/cpu.c | 16
2 files changed, 17 insertions(+)
diff
On 2/6/25 15:12, Djordje Todorovic wrote:
Define MIPS CSRs used for P8700 CPU.
Signed-off-by: Chao-ying Fu
Signed-off-by: Djordje Todorovic
---
target/riscv/cpu.c | 3 +
target/riscv/cpu.h | 7 ++
target/riscv/meson.build | 1 +
target/riscv/mips_csr.c | 219 +++
From: Bibo Mao
Global variables memmap_table and memmap_entries stores UEFI memory
map table informations. It can be moved into structure
LoongArchVirtMachineState.
Signed-off-by: Bibo Mao
Reviewed-by: Song Gao
Message-Id: <20250430094738.1556670-3-maob...@loongson.cn>
Signed-off-by: Song Gao
fcond only has 22 types, add a check for fcond.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2972
Signed-off-by: Song Gao
Reviewed-by: Richard Henderson
Message-Id: <20250603024810.350510-1-gaos...@loongson.cn>
---
.../loongarch/tcg/insn_trans/trans_fcmp.c.inc | 25 +
From: Bibo Mao
Global variables initrd_offset and initrd_size records loading information
about initrd, it can be moved to structure loongarch_boot_info.
Signed-off-by: Bibo Mao
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20250430094738.1556670-2-maob...@loongson.cn>
Signed-off-by: Song G
From: Bibo Mao
With API build_mcfg(), it is not necessary with parameter structure
AcpiMcfgInfo to convert to little endian since it is directly used
with host native endian.
Here remove endian conversion before calling function build_mcfg().
With this patch, bios-tables-test passes to run on bi
From: Bibo Mao
With PCH ID register, it is defined as union type as follows:
union LoongArchPIC_ID {
struct {
uint8_t _reserved_0[3];
uint8_t id;
uint8_t version;
uint8_t _reserved_1;
uint8_t irq_num;
uint8_t _reserved_2;
} QEMU_PACKED desc;
From: Bibo Mao
Interrupt controller extioi supports 256 vectors, register EXTIOI_COREISR
records pending interrupt status with bitmap method. Size of EXTIOI_COREISR
is 256 / 8 = 0x20 bytes, EXTIOI_COREISR_END should be EXTIOI_COREISR_START
+ 0x20 rather than 0xB20.
Signed-off-by: Bibo Mao
Revie
u.git tags/pull-loongarch-20250610
for you to fetch changes up to ffe89c1762d879fd39ba1be853d154677dbfbc7b:
hw/loongarch/virt: Remove global variables about memmap tables (2025-06-10
15:01:41 +0800)
pull-loongarc
On 5/6/25 21:35, Philippe Mathieu-Daudé wrote:
Eradicate alloca() uses on system code, then enable
-Walloca to prevent new ones to creep back in.
Philippe Mathieu-Daudé (4):
hw/gpio/pca9552: Avoid using g_newa()
backends/tpmL Avoid using g_alloca()
tests/unit/test-char: Avoid using g_al
On Tue, Jun 10, 2025 at 11:38:29AM +0200, Cédric Le Goater wrote:
> > docs/devel/vfio-user.rst | 1522
>
> I think this file should be split in several smaller files. The
> protocol specification part belongs to "System Emulation Management
> and Interopera
On 6/7/25 02:10, John Levon wrote:
Introduce basic plumbing for vfio-user behind a new
--enable-vfio-user-client option.
We introduce VFIOUserContainer in hw/vfio-user/container.c, which is a
container type for the "IOMMU" type "vfio-iommu-user", and share some
common container code from hw/vfio
On 6/7/25 02:10, John Levon wrote:
From: Thanos Makatos
This patch introduces the vfio-user protocol specification (formerly
known as VFIO-over-socket), which is designed to allow devices to be
emulated outside QEMU, in a separate process. vfio-user reuses the
existing VFIO defines, structs and
Am 6. Juni 2025 19:03:32 UTC schrieb Pierrick Bouvier
:
>Hi,
>
>I recently needed to slow down time within a virtual machine, due to a timeout
>being hit because my QEMU binary which was not fast enough (gcov debug build
>if you're curious about the use case).
>
>Currently, people tend to use
On Tue Jun 10, 2025 at 10:32 PM CEST, Michael Tokarev wrote:
> On 10.06.2025 20:58, Sertonix wrote:
>>
>> Adding -pie to LDFLAGS caused s390-ccw.img to become dynamically linked.
>
> Why do you think -pie causes it to become dynamically linked?
>
> /mjt
The documentation (at least for gcc) states
My email is becoming a black hole.
This email address cannot be used to send patches, so we will prepare a
different email address and update it.
2025年6月10日(火) 21:01 Thomas Huth :
> From: Thomas Huth
>
> The OSDN / sourceforge.jp site ceased to work (according to
> https://en.wikipedia.org/wiki/
On 2025/6/9 下午6:48, Song Gao wrote:
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 1 +
target/loongarch/cpu.c | 17 +
2 files changed, 18 insertions(+)
diff --git a/target/loongarch/cpu-csr.h b/target/loongarch/cpu-csr.h
index 0834e91f30..83f6cb081a 100644
On 10.06.2025 23:36, Sertonix wrote:
On Tue Jun 10, 2025 at 10:32 PM CEST, Michael Tokarev wrote:
On 10.06.2025 20:58, Sertonix wrote:
Adding -pie to LDFLAGS caused s390-ccw.img to become dynamically linked.
Why do you think -pie causes it to become dynamically linked?
/mjt
The documentat
Am 12. Mai 2025 15:32:08 UTC schrieb Paolo Bonzini :
>Hi, now that GSoC selection is over I'm back. Sorry for the delay;
>Tanish Desai will work mostly on tracing, so logging can remain yours.
>
>On Tue, Apr 8, 2025 at 10:59 PM Bernhard Beschow wrote:
>> >Currently the #defines contain some hol
Am 9. Juni 2025 17:22:32 UTC schrieb PJ Singh :
>Hello Everyone,
>
>I want to embed a QEMU window directly in my GUI application. Are Python
>APIs available to embed QEMU into a GNOME GUI application?
>
>I am the developer of Cubic (Custom Ubuntu ISO Creator), a tool which
>allows users to custo
On Tue, Jun 10, 2025 at 05:55:31PM -0300, Fabiano Rosas wrote:
> I think I caused some confusion here. I wrote migrate_params_override()
> last thing on a friday and forgot it did the right thing from the
> beginning:
>
> migrate_params_apply(&s->defaults);
> qmp_migrate_set_parameters(new
This factor is applied to time spent since we read clock for the first
time. It impacts value returned by get_clock() and get_clock_realtime().
Signed-off-by: Pierrick Bouvier
---
include/qemu/timer.h | 22 --
util/qemu-timer-common.c | 1 +
2 files changed, 17 insertion
This option sets a factor on time spent for QEMU clocks since the
beginning of execution. It can be used to slow or accelerate time for a
guest, without impacting QEMU speed.
Signed-off-by: Pierrick Bouvier
---
system/rtc.c| 11 +++
system/vl.c | 3 +++
qemu-options.hx | 7
Depending on host cpu speed, and QEMU optimization level, it may sometimes be
needed to slow or accelerate time guest is perceiving. A common scenario is
hitting a timeout during a boot process, because some operations were not
finished on time.
An existing solution for that is -icount shift=X, wi
On Fri, Jun 06, 2025 at 05:10:34PM -0700, John Levon wrote:
> If VFIO_IRQ_INFO_MASKABLE is set for VFIO_PCI_MSIX_IRQ_INDEX, record
> this in ->can_mask_msix, and use it to individually mask MSI-X
> interrupts as needed.
I'm just going to drop this patch. Neither vfio nor libvfio-user (including
q
Currently the final instance_size of VFIO_PCI_BASE is sizeof(PCIDevice).
It should be sizeof(VFIOPCIDevice), VFIO_PCI uses same structure as
base class VFIO_PCI_BASE, so no need to set its instance_size explicitly.
This isn't catastrophic only because VFIO_PCI_BASE is an abstract class.
Fixes: d4
Adding -pie to LDFLAGS caused s390-ccw.img to become dynamically linked.
By using -static-pie it will be linked statically like other bios.
This ensures that the build output doesn't change depending on the
default dynamic loader path of the toolchain.
Ref d884c86dcd3b s390/bios: Make the s390-
On Tue, 10 Jun 2025, Bernhard Beschow wrote:
The next patch will make dtc mandatory for boards with a bundled DTB, causing
these boards to be omitted when dtc is missing. Allow packagers to force the
build of those boards by providing an option.
I don't like this. This might result in some mach
On Tue, 10 Jun 2025, Bernhard Beschow wrote:
When changing meson_options.txt, this script gets updated automatically by QEMU
tooling which sorts the choices lexicographically. Fix this in preparation of
the ext patch.
Typo: next patch
Fixes: ccc403ed5844 ("meson: Add wasm build in build scrip
Paolo,
This one is not supposed to be pulled until we fix KVM as you said:
https://lore.kernel.org/qemu-devel/d0983ba3-383b-4c81-9cfd-b5b0d26a5...@redhat.com/
BTW, I have sent the KVM fix:
https://lore.kernel.org/all/20250611001018.2179964-1-xiaoyao...@intel.com/
On 6/6/2025 8:34 PM, Paolo Bonz
On 6/10/2025 12:31 PM, Michael S. Tsirkin wrote:
On Wed, Jun 04, 2025 at 03:48:40PM +0200, Cédric Le Goater wrote:
I don't see any advantage to making this a class attribute. I looked for
examples
of using such attributes for vfio to configure pci, and found very little. It
sounds like overki
Extend cpr_transfer_input to handle SOCKET_ADDRESS_TYPE_FD alongside
SOCKET_ADDRESS_TYPE_UNIX. This change supports the use of pre-listened
socket file descriptors for cpr migration channels.
This change is particularly useful in qtest environments, where the
socket may be created externally and p
When the source VM attempts to connect to the destination VM's Unix
domain socket (cpr.sock) during a cpr-transfer test, race conditions can
occur if the socket file isn't ready. This can lead to connection
failures when running tests.
This patch creates and listens on the socket in advance, and p
On 2025/6/9 下午6:48, Song Gao wrote:
we use CSR_ESTAT and CSR_ECFG bit 15 for msg interrupt.
and loongarch_cpu_do_interrupt support msg interrupts.
Signed-off-by: Song Gao
---
target/loongarch/cpu-csr.h | 3 ++-
target/loongarch/cpu.c | 35 ++-
2 files
On 6/6/25 12:03 PM, Pierrick Bouvier wrote:
Hi,
I recently needed to slow down time within a virtual machine, due to a
timeout being hit because my QEMU binary which was not fast enough (gcov
debug build if you're curious about the use case).
Currently, people tend to use -icount shift=X with l
My employer, er, switched to a certain mail host some number of years ago
and I never really actually acclimated properly. As a result of that and,
uh, my laziness, I've accumulated ... quite a backlog of mail I have not
really read or dealt with. It's become unmanageable.
I'm trying to fix that.
On 2025/6/11 10:42, Zhenzhong Duan wrote:
Currently the final instance_size of VFIO_PCI_BASE is sizeof(PCIDevice).
For the people who has a doubt how the size is sizeof(PCIDevice). :)
* @instance_size: The size of the object (derivative of #Object). If
* @instance_size is 0, then the si
On 2025/6/9 下午6:48, Song Gao wrote:
Signed-off-by: Song Gao
---
hw/loongarch/virt.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
diff --git a/hw/loongarch/virt.c b/hw/loongarch/virt.c
index 718b5b4f92..6b670e7936 100644
--- a/hw/loongarch/virt.c
+++ b/hw/loong
On 2025/6/9 下午6:48, Song Gao wrote:
the AVEC controller supports 256*256 irqs, all the irqs connect CPU INT_AVEC irq
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 28
hw/loongarch/virt.c | 11 +--
target/loongarch/cpu.h | 3 ++-
3 fi
Hi Igor,
On 5/27/25 1:58 PM, Igor Mammedov wrote:
> On Tue, 27 May 2025 09:40:04 +0200
> Eric Auger wrote:
>
>> acpi_pcihp VirtMachineClass state flag will allow
>> to opt in for acpi pci hotplug. This is guarded by a
>> class no_acpi_pcihp flag to manage compats (<= 10.0
>> machine types will no
On 2025/6/9 下午6:48, Song Gao wrote:
LoongArchVirtMachinState add avecintc features, and
it use to check whether virt machine support advance interrupt controller
and default is on.
Signed-off-by: Song Gao
---
hw/loongarch/virt.c | 31 +++
include/hw/lo
On 6/11/2025 2:12 PM, Paolo Bonzini wrote:
On Wed, Jun 11, 2025 at 4:56 AM Xiaoyao Li wrote:
Paolo,
This one is not supposed to be pulled until we fix KVM as you said:
https://lore.kernel.org/qemu-devel/d0983ba3-383b-4c81-9cfd-b5b0d26a5...@redhat.com/
The bug was understood and fix just a f
Hi Gustavo, Alex,
On 5/28/25 12:33 PM, Igor Mammedov wrote:
> On Tue, 27 May 2025 15:54:15 +0200
> Eric Auger wrote:
>
>> Hi Igor,
>>
>> On 5/27/25 1:58 PM, Igor Mammedov wrote:
>>> On Tue, 27 May 2025 09:40:04 +0200
>>> Eric Auger wrote:
>>>
acpi_pcihp VirtMachineClass state flag will al
On Thu, May 15, 2025 at 2:07 PM ~liuxu wrote:
>
> From: lxx <1733205...@qq.com>
>
> This patch adds support for the Zilsd and Zclsd extension,
> which is documented at https://github.com/riscv/riscv-zilsd/releases/tag/v1.0
>
> Co-developed-by: SUN Dongya
> Co-developed-by: LIU Xu
> Co-developed-
Hi Daniel,
> Subject: Re: [PATCH v5 2/7] ui/spice: Add an option for users to provide a
> preferred codec
>
> On Tue, Jun 10, 2025 at 03:30:24PM +0400, Marc-André Lureau wrote:
> > Hi
> >
> > On Fri, Jun 6, 2025 at 11:16 AM Daniel P. Berrangé
> > wrote:
> >
> > > On Fri, Jun 06, 2025 at 06:10:31
On Wed Jun 11, 2025 at 6:07 AM CEST, Michael Tokarev wrote:
> On 10.06.2025 23:36, Sertonix wrote:
>> On Tue Jun 10, 2025 at 10:32 PM CEST, Michael Tokarev wrote:
>>> On 10.06.2025 20:58, Sertonix wrote:
Adding -pie to LDFLAGS caused s390-ccw.img to become dynamically linked.
>>>
>>> Why
This series has been successfully tested. The information displayed
from the HMP info migrate command is more user-friendly, with the
possibility of displaying the globals with info migrate -a.
(qemu) info migrate -a
Status: active
Sockets: [
tcp
]
Globals:
store-global-state: on
only-m
On Wed, Jun 11, 2025 at 4:56 AM Xiaoyao Li wrote:
>
> Paolo,
>
> This one is not supposed to be pulled until we fix KVM as you said:
> https://lore.kernel.org/qemu-devel/d0983ba3-383b-4c81-9cfd-b5b0d26a5...@redhat.com/
The bug was understood and fix just a few days away, so I included it.
I'll se
On 2025/6/9 下午6:48, Song Gao wrote:
Signed-off-by: Song Gao
---
hw/intc/loongarch_avec.c | 37 ++---
1 file changed, 34 insertions(+), 3 deletions(-)
diff --git a/hw/intc/loongarch_avec.c b/hw/intc/loongarch_avec.c
index c692fef43c..f609ed9aaa 100644
--- a/
Albert Esteve writes:
> Add SHMEM_MAP/_UNMAP request to the vhost-user
> spec documentation.
>
> Reviewed-by: Stefan Hajnoczi
> Signed-off-by: Albert Esteve
> ---
> docs/interop/vhost-user.rst | 55 +
> 1 file changed, 55 insertions(+)
>
> diff --git a/docs/
Subject should say vhost-user-devi*c*e
signature.asc
Description: PGP signature
Hi
On Fri, Jun 6, 2025 at 11:16 AM Daniel P. Berrangé
wrote:
> On Fri, Jun 06, 2025 at 06:10:31AM +, Kasireddy, Vivek wrote:
> > Hi Daniel,
> >
> > > Subject: Re: [PATCH v5 2/7] ui/spice: Add an option for users to
> provide a
> > > preferred codec
> > >
> > > On Wed, May 28, 2025 at 10:11:1
On Mon, Jun 2, 2025 at 11:15 PM Djordje Todorovic
wrote:
>
> Add a new function, so we can change reset vector from platforms.
You can use the "resetvec" property instead, there are a range of
RISC-V machines already doing this. Have a look at
hw/riscv/opentitan.c or hw/riscv/sifive_u.c for examp
Do not use g_alloca(), simply allocate the CharBackend
structure on the stack.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Stefan Hajnoczi
Message-Id: <20250605193540.59874-4-phi...@linaro.org>
---
tests/unit/test-char.c | 3 +--
1 file changed, 1 insertion
From: Zhenzhong Duan
AspeedGPIOClass's parent is SysBusDeviceClass rather than SysBusDevice.
This isn't catastrophic only because sizeof(SysBusDevice) >
sizeof(SysBusDeviceClass).
Fixes: 4b7f956862dc ("hw/gpio: Add basic Aspeed GPIO model for AST2400 and
AST2500")
Closes: https://lists.gnu.org/
From: BALATON Zoltan
This reverts commit d0b25425749d5525b2ba6d9d966d8800a5643b35.
Loading firmware from the PCI host is unusual and raven is only used
by one board so this does not simplify anything but rather complicates
it. Revert to loading firmware from board code as that is the usual
way a
From: Daniel P. Berrangé
We have been inconsistent about whether ROMS stored in git have
execute permission set, and by default meson will preserve source
file permissions when installing files. This has caused periodic
problems in RPM packaging as executable binary files get analysed
by various
We have pin_count <= PCA955X_PIN_COUNT_MAX. Having
PCA955X_PIN_COUNT_MAX = 16, it is safe to explicitly
allocate the char buffer on the stack, without g_newa().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Glenn Miles
Reviewed-by: Stefan Hajnoczi
Message-Id:
On Tue, Jun 10, 2025 at 02:49:02PM +0200, Philippe Mathieu-Daudé wrote:
> On 10/6/25 14:36, Daniel P. Berrangé wrote:
> > This series is an extension of Stefan's proposal:
> >
> >https://lists.nongnu.org/archive/html/qemu-devel/2025-06/msg00736.html
> >
> > It used '-Wframe-larger-than=4096'
From: Zhenzhong Duan
VirtIOPMEMClass's parent is VirtioDeviceClass rather than VirtIODevice.
This isn't catastrophic only because sizeof(VirtIODevice) >
sizeof(VirtioDeviceClass).
Fixes: 5f503cd9f388 ("virtio-pmem: add virtio device")
Closes: https://lists.gnu.org/archive/html/qemu-devel/2025-06
From: Soumyajyotii_Ssarkar
Abstract the configure function.
Signed-off-by: Soumyajyotii Ssarkar
Reviewed-by: Philippe Mathieu-Daudé
Message-ID: <20250607152711.108914-2-soumyajyotisarka...@gmail.com>
Signed-off-by: Philippe Mathieu-Daudé
---
hw/net/i82596.c | 36 +
From: Zhenzhong Duan
Parent of VirtIOMEMClass is VirtioDeviceClass rather than VirtIODevice.
This isn't catastrophic only because sizeof(VirtIODevice) >
sizeof(VirtioDeviceClass).
Fixes: 910b25766b33 ("virtio-mem: Paravirtualized memory hot(un)plug")
Signed-off-by: Zhenzhong Duan
Reviewed-by: D
Fixes: c97d6d2cdf9 ("i386: hvf: add code base from Google repo")
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
Message-Id: <20250606164418.98655-7-phi...@linaro.org>
---
include/system/hvf_int.h | 1 +
accel/hvf/hvf-accel-ops.c | 1 +
2 files changed, 2 insertions(+)
dif
The 'GUS_read_DMA' method has a 4k byte array used for copying
data between the audio backend and device. Skip the automatic
zero-init of this array to eliminate the performance overhead in
the I/O hot path.
The 'tmpbuf' array will be fully initialized when reading data
from device memory.
Signed
From: Zhenzhong Duan
RISCVIOMMUPciClass and RISCVIOMMUSysClass are defined with missed
parent class, class_init on them may corrupt their parent class
fields.
It's lucky that parent_realize and parent_phases are not initialized
or used until now, so just remove the definitions. They can be added
tpm_emulator_ctrlcmd() is not in hot path.
Use the heap instead of the stack, removing
the g_alloca() call.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Thomas Huth
Reviewed-by: Stefan Berger
Reviewed-by: Stefan Hajnoczi
Message-Id: <20250605193540.59874-3-
fifo_timeout_timer is created in the DeviceRealize handler,
not in the instance_init one. For parity, delete it in
DeviceUnrealize, rather than instance_finalize.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Peter Maydell
Message-Id: <20250124175053.74461-2-phi...@linaro.org>
---
hw/char/
The 'virtio_net_receive_rcu' method has three arrays with
VIRTQUEUE_MAX_SIZE elements, which are apprixmately 32k in
size used for copying data between guest and host. Skip the
automatic zero-init of these arrays to eliminate the
performance overhead in the I/O hot path.
The three arrays will be s
In the container pre_save handler, discard the virtual addresses in DMA
mappings with VFIO_DMA_UNMAP_FLAG_VADDR, because guest RAM will be
remapped at a different VA after in new QEMU. DMA to already-mapped
pages continues.
Signed-off-by: Steve Sistare
Reviewed-by: Cédric Le Goater
---
hw/vfio
During CPR, after VFIO_DMA_UNMAP_FLAG_VADDR, the vaddr is temporarily
invalid, so mediated devices cannot be supported. Add a blocker for them.
This restriction will not apply to iommufd containers when CPR is added
for them in a future patch.
Signed-off-by: Steve Sistare
Reviewed-by: Cédric Le
Define a list of vfio devices in CPR state, in a subsection so that
older QEMU can be live updated to this version. However, new QEMU
will not be live updateable to old QEMU. This is acceptable because
CPR is not yet commonly used, and updates to older versions are unusual.
The contents of each
The Intel 6300 Enterprise SouthBridge is a south bridge for a more or
less obscure embedded Intel system; however, the i6300esb watchdog
device we implement in QEMU is a virtual watchdog device that should
work well on any PCI-based machine, is well supported by Linux guests,
and used in many examp
Mistake in $SUBJECT - should be 'hw/audio/marvell_88w8618:' prefix
On Tue, Jun 10, 2025 at 01:36:49PM +0100, Daniel P. Berrangé wrote:
> The 'mv88w8618_audio_callback' method has a 4k byte array used for
> copying data between the audio backend and device. Skip the automatic
> zero-init of this ar
Support vfio and iommufd devices with the cpr-transfer live migration mode.
Devices that do not support live migration can still support cpr-transfer,
allowing live update to a new version of QEMU on the same host, with no loss
of guest connectivity.
No user-visible interfaces are added.
For lega
Define iommufd_backend_map_file_dma to implement IOMMU_IOAS_MAP_FILE.
This will be called as a substitute for iommufd_backend_map_dma, so
the error conditions for BARs are copied as-is from that function.
Signed-off-by: Steve Sistare
Reviewed-by: Zhenzhong Duan
---
include/system/iommufd.h | 3
VFIO iommufd devices will need access to ioas_id, devid, and hwpt_id in
new QEMU at realize time, so add them to CPR state. Define CprVFIODevice
as the object which holds the state and is serialized to the vmstate file.
Define accessors to copy state between VFIODevice and CprVFIODevice.
Signed-o
Define a vmstate priority that is lower than the default, so its handlers
run after all default priority handlers. Since 0 is no longer the default
priority, translate an uninitialized priority of 0 to MIG_PRI_DEFAULT.
CPR for vfio will use this to install handlers for containers that run
after h
Do not reset a vfio-pci device during CPR, and do not complain if the
kernel's PCI config space changes for non-emulated bits between the
vmstate save and load, which can happen due to ongoing interrupt activity.
Signed-off-by: Steve Sistare
Reviewed-by: Cédric Le Goater
---
include/hw/vfio/vfi
On Mon, 2 Jun 2025 19:29:41 +0530
Arpit Kumar wrote:
> Modified Identify Switch Device (Opcode 5100h)
> & Get Physical Port State(Opcode 5101h)
> using physical ports info stored during enumeration
>
> Signed-off-by: Arpit Kumar
A few additional comments in here.
J
> ---
> hw/cxl/cxl-mailbox
Hi Bernard,
On 6/10/25 3:22 AM, Bernhard Beschow wrote:
As it seems a bit too good to be true, time for questions:
- Has it already been considered?
- Any obvious downside I might have skipped?
The only downside I can see is that it seems to disturb QEMU's internal
timekeeping. The GTK gui fr
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