On Tue, 1 Apr 2025 at 02:24, Fabiano Rosas wrote:
> The postcopy/multifd/plain test is still hanging from time to time. I
> see a vmstate load function trying to access guest memory and the
> postcopy-listen thread already finished, waiting for that
> qemu_loadvm_state() (frame #18) to return and
Hello Fabiano,
On Mon, 31 Mar 2025 at 20:31, Fabiano Rosas wrote:
> > +} else if (mis->from_src_file) {
> This is redundant.
* This was to ensure (double check) that when the Postcopy connection
comes in, the main channel is established. Also a couple of versions
back migration qtest was fai
Hi,
On Mon, 31 Mar 2025 at 20:49, Fabiano Rosas wrote:
> > +static bool ram_save_postcopy_prepare(QEMUFile *f, void *opaque, Error
> > **errp)
> > +{
> > +int ret;
> > +
> > +if (migrate_multifd()) {
> > +/*
> > + * When multifd is enabled, source QEMU needs to make sure
On 02.04.25 15:32, Vladimir Sementsov-Ogievskiy wrote:
On 01.04.25 20:07, Vladimir Sementsov-Ogievskiy wrote:
For now we only log the vhost device error, when virtqueue is actually
stopped. Let's add a QAPI event, which makes possible:
- collect statistics of such errors
- make immediate ac
On Mon, 31 Mar 2025 at 20:39, Fabiano Rosas wrote:
> This patch and the next one need to come before 3/7.
* Okay.
Thank you.
---
- Prasad
On Wed, 2025-04-02 at 11:51 -0400, Stefan Hajnoczi wrote:
> On Tue, Apr 01, 2025 at 10:22:43AM -0700, Farhan Ali wrote:
> > Hi,
> >
> > Recently on s390x we have enabled mmap support for vfio-pci devices [1].
>
> Hi Alex,
> I wanted to bring this to your attention. Feel free to merge it through
>
The testing with "-t writeback" works for turning on enable_write_cache.
I renamed the function to qemu_pwritev_fua() and fixed any typos.
I moved the handle_aiocb_flush() into the qemu_pwritev_fua() and
removed from the previously todo seciont. Initially I thought
of only passing aiocb, but then
The testing with "-t writeback" works for turning on enable_write_cache.
I renamed the function to qemu_pwritev_fua() and fixed any typos.
I moved the handle_aiocb_flush() into the qemu_pwritev_fua() and
removed from the previously todo seciont. Initially I thought
of only passing aiocb, but then
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 27 +++
target/i386/tcg/emit.c.inc | 20 ++--
2 files changed, 25 insertions(+), 22 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 822dbb2e9ae..5d433
Avoid the three-operand CC_OP_ADD and CC_OP_ADC in these relatively
common cases.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 20
target/i386/tcg/emit.c.inc | 65 ++---
2 files changed, 80 insertions(+), 5 deletions(-)
diff --git
Apply some of the simplifications used for RCL and RCR. tmp4 is not
used anywhere else, so remove it.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 51 +
target/i386/tcg/emit.c.inc | 6 ++---
2 files changed, 31 insertions(+), 26 deletions(
It is computing 33-count but 32-count is used in the same TB, so shift
further by one.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 13 ++---
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/target/i386/tcg/translate.c b/target/i386/tcg/translate.c
index 55
On 2/19/25 15:48, John Levon wrote:
Commonize some initialization code shared by the legacy and iommufd vfio
implementations (and later by vfio-user).
Signed-off-by: John Levon
---
hw/vfio/common.c | 19 +++
hw/vfio/container.c | 14 +-
hw/
On 2/19/25 15:48, John Levon wrote:
Refactor the PCI config setup code out of vfio_realize(), as we will
later need this for vfio-user too.
Signed-off-by: John Levon
We should have more of these routines to reduce vfio_realize(). It's
way too big.
This can be merged now.
Reviewed-by: Cédric
On Thu, Mar 13, 2025 at 10:40 PM Paolo Savini wrote:
>
> Previous version:
>
> - v1:
> https://lore.kernel.org/all/20250221162036.61521-1-paolo.sav...@embecosm.com/
>
> Add reviewer information and rebase on top of riscv-to-apply.next branch.
>
> Cc: Richard Handerson
> Cc: Palmer Dabbelt
> Cc:
On Thu, Mar 20, 2025 at 5:24 AM Jim Shu wrote:
>
> Updating STCE will enable/disable SSTC in S-mode or/and VS-mode, so we
> also need to update S/VS-mode Timer and S/VSTIP bits in $mip CSR.
>
> Signed-off-by: Jim Shu
> ---
> target/riscv/csr.c | 44
> tar
qemu_tcg_mttcg_enabled() is specific to 1/ TCG and
2/ system emulation. Move the prototype declaration
to "system/tcg.h", reducing 'mttcg_enabled' variable
scope.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
---
include/hw/core/cpu.h | 9 -
include/system/tc
On Fri, Mar 28, 2025 at 2:16 AM Philippe Mathieu-Daudé
wrote:
>
> On 27/3/25 14:02, Daniel Henrique Barboza wrote:
> > Commit 5b4beba124 ("RISC-V Spike Machines") added the Spike machine and
> > made it default for qemu-system-riscv32/64. It was the first RISC-V
> > machine added in QEMU so settin
On 03/04/2025 22.32, Philippe Mathieu-Daudé wrote:
Since tests might be failing on some operating systems,
introduce the skipIfOperatingSystem() decorator.
Acked-by: Michael S. Tsirkin
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tests/functional/qemu_test/__init
Vladimir Sementsov-Ogievskiy writes:
> For now we only log the vhost device error, when virtqueue is actually
> stopped. Let's add a QAPI event, which makes possible:
>
> - collect statistics of such errors
> - make immediate actions: take core dumps or do some other debugging
> - inform the u
Vladimir Sementsov-Ogievskiy writes:
> For change, pause, resume, complete, dismiss and finalize actions
> corresponding job- and block-job commands are almost equal. The
> difference is in find_block_job_locked() vs find_job_locked()
> functions. What's different?
>
> 1. find_block_job_locked()
On 4/1/25 00:20, Philippe Mathieu-Daudé wrote:
Rename riscv_cpu_mmu_index() -> rx_cpu_mmu_index().
Fixes: ef5cc166da1 ("target/rx: Populate CPUClass.mmu_index")
Signed-off-by: Philippe Mathieu-Daudé
---
target/rx/cpu.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/t
On 2/19/25 15:48, John Levon wrote:
From: Jagannathan Raman
Split out code specific to the kernel-side vfio implementation from the
VFIOPCIDevice class into a VFIOKernelPCIDevice. The forthcoming
VFIOUserPCIDevice will share the base VFIOPCIDevice class.
The new VFIOKernelPCIDevice struct is
On Thu, Apr 03, 2025 at 05:18:15PM +0200, Philippe Mathieu-Daudé wrote:
> Hi,
>
> I tried to gather all the hw/arm/-related patches for
> the GitLab issues tagged for 10.0.
>
> First, trivial ones fixing / disabling broken tests;
> then disable the VMapple machine (not sure about it);
> finally f
On 2025-04-02 09:52, Thomas Huth wrote:
On 31/03/2025 16.00, Shalini Chellathurai Saroja wrote:
Add Control-Program Identification (CPI) device to QOM only when the
virtual
machine supports CPI. CPI is supported from "s390-ccw-virtio-10.0"
machine
and higher.
Signed-off-by: Shalini Chellathur
On Thu, Apr 03, 2025 at 05:46:03PM +0200, Cédric Le Goater wrote:
> > +static void vfio_get_all_regions(VFIODevice *vbasedev)
> > +{
> > +struct vfio_region_info *info;
> > +int i;
> > +
> > +for (i = 0; i < vbasedev->num_regions; i++) {
> > +vfio_get_region_info(vbasedev, i, &
First, the VMapple machine only works with the ARM 'host' CPU
type, which isn't accepted for QTest:
$ qemu-system-aarch64 -M vmapple -accel qtest
qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF
Second, the QTest framework expects machines to be createable
without spe
On 4/3/2025 10:49 AM, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
Reviewed-by: Brian Cain
target/hexagon/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 766b678651..59fc9ed698 100644
--- a/target/hexag
On 3/4/25 21:47, Paolo Bonzini wrote:
Clear the flags before adding in the ones computed from lflags.
Cc: Wei Liu
Cc: qemu-sta...@nongnu.org
Signed-off-by: Paolo Bonzini
---
target/i386/hvf/x86_flags.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/i386/hvf/x86_flags.c b/target/
On 4/3/25 04:38, Alex Bennée wrote:
This allows the a plugin which has control of time to supply a callback
so it can control the reported virtual time instead of using the
default cpu_get_clock().
Time control plugins still need to call qemu_plugin_update_ns() to
ensure timers are moved forward
On 4/2/25 15:23, Philippe Mathieu-Daudé wrote:
This series is more useful for heterogeneous emulation preparation
than single binary, because it allows non-ARM hw/ code to configure
ARM cores, so not using target-specific APIs. I figured some
patches could be useful to Pierrick "build hw/arm once
On 4/1/25 20:50, Philippe Mathieu-Daudé wrote:
On 1/4/25 10:09, Philippe Mathieu-Daudé wrote:
All targets have been converted to TCGCPUOps::mmu_index(),
remove the now unused CPUClass::mmu_index().
Signed-off-by: Philippe Mathieu-Daudé
---
include/exec/cpu-mmu-index.h | 4 +---
include/hw/c
On 4/2/25 14:23, Philippe Mathieu-Daudé wrote:
Keep MTTCG initialization code out of tcg_init_machine().
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/tcg-all.c | 50 +
1 file changed, 28 insertions(+), 22 deletions(-)
Reviewed-by: Richard H
This commit adds support for the `qGDBServerVersion` packet to the qemu
gdbstub which could be used by clients to detect the QEMU version
(and, e.g., use a workaround for known bugs).
This packet is not documented/standarized by GDB but it was implemented
by LLDB gdbstub [0] and is helpful for pr
On 4/2/25 13:06, Richard Henderson wrote:
On 4/2/25 08:25, Pierrick Bouvier wrote:
On 4/1/25 20:31, Philippe Mathieu-Daudé wrote:
With "cpu.h" include:
Reviewed-by: Philippe Mathieu-Daudé
Tested-by: Philippe Mathieu-Daudé
I can't reproduce this error.
With this series, cpu.h is pulled tran
On Thu, 3 Apr 2025 11:44:42 -0400
Stefan Hajnoczi wrote:
> On Thu, Apr 03, 2025 at 09:47:26AM +0200, Niklas Schnelle wrote:
> > On Wed, 2025-04-02 at 11:51 -0400, Stefan Hajnoczi wrote:
> > > On Tue, Apr 01, 2025 at 10:22:43AM -0700, Farhan Ali wrote:
> > > > Hi,
> > > >
> > > > Recently on
When we added qemu_plugin_update_ns() to advance time we missed the
fact that users of virtual clock don't get updated. Rather than
implement the logic inside QEMU to keep track of the magic number lets
just delegate it to the plugin instead.
Compile tested only.
Alex.
Alex Bennée (2):
accel/t
On 4/2/25 15:23, Philippe Mathieu-Daudé wrote:
This series is more useful for heterogeneous emulation preparation
than single binary, because it allows non-ARM hw/ code to configure
ARM cores, so not using target-specific APIs. I figured some
patches could be useful to Pierrick "build hw/arm once
On 4/1/25 01:09, Philippe Mathieu-Daudé wrote:
We'll moveCPUClass::mmu_index() toTCGCPUOps::mmu_index().
Signed-off-by: Philippe Mathieu-Daudé
---
include/accel/tcg/cpu-ops.h | 3 +++
include/exec/cpu-mmu-index.h | 5 -
2 files changed, 7 insertions(+), 1 deletion(-)
Reviewed-by: Rich
Since v2:
- Fixed no_tcg_its inverted logic (rth)
Fix ACPI tables for '-M its=off' CLI option.
Regards,
Phil.
Philippe Mathieu-Daudé (9):
hw/arm/virt: Remove pointless VirtMachineState::tcg_its field
hw/intc/gicv3_its: Do not check its_class_name() for NULL
hw/arm/virt: Simplify create_it
GIC ITS is checked for the MADT and IORT tables.
Factor the checks out to the its_enabled() helper.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Gustavo Romero
Reviewed-by: Richard Henderson
---
hw/arm/virt-acpi-build.c | 12 +---
1 file changed, 9 insertions(+), 3 deletions(-)
On 4/3/25 08:18, Philippe Mathieu-Daudé wrote:
First, the VMapple machine only works with the ARM 'host' CPU
type, which isn't accepted for QTest:
$ qemu-system-aarch64 -M vmapple -accel qtest
qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF
Second, the QTest fram
On 4/3/25 08:18, Philippe Mathieu-Daudé wrote:
Unfortunately as of v10.0.0-rc2 the VMapple machine is unusable:
$ qemu-system-aarch64 -M vmapple [...]
*** Terminating app due to uncaught exception 'NSInvalidArgumentException',
reason: '-[PGIOSurfaceHostDeviceDescriptor setMapMemory:
On 4/3/2025 9:27 AM, Alex Williamson wrote:
On Thu, 3 Apr 2025 11:44:42 -0400
Stefan Hajnoczi wrote:
On Thu, Apr 03, 2025 at 09:47:26AM +0200, Niklas Schnelle wrote:
On Wed, 2025-04-02 at 11:51 -0400, Stefan Hajnoczi wrote:
On Tue, Apr 01, 2025 at 10:22:43AM -0700, Farhan Ali wrote:
Hi,
On 4/3/25 08:18, Philippe Mathieu-Daudé wrote:
VirtMachineState::tcg_its has the same value of
VirtMachineClass::no_tcg_its. Directly use the latter,
removing the former.
No it doesn't.
-if (vmc->no_tcg_its) {
-vms->tcg_its = false;
-} else {
-vms->tcg_
This property passes socket of a externally started virgl_render_server
to virglrenderer, so that it won't try to spawn new process and get
killed by seccomp, allowing virtio-gpu-gl venus and sandbox to enable
at the same time.
Signed-off-by: Jiang XueQian
---
hw/display/virtio-gpu-gl.c | 15
Since tests might be failing on some operating systems,
introduce the skipIfOperatingSystem() decorator.
Acked-by: Michael S. Tsirkin
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
tests/functional/qemu_test/__init__.py | 2 +-
tests/functional/qemu_test/decorators
On 4/3/2025 11:05 AM, Alex Williamson wrote:
On Thu, 3 Apr 2025 10:33:52 -0700
Farhan Ali wrote:
On 4/3/2025 9:27 AM, Alex Williamson wrote:
On Thu, 3 Apr 2025 11:44:42 -0400
Stefan Hajnoczi wrote:
On Thu, Apr 03, 2025 at 09:47:26AM +0200, Niklas Schnelle wrote:
On Wed, 2025-04-02 at
As of v10.0.0-rc2 this test is still failing on macos:
$ make check-functional-aarch64 V=1
...
ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock: assertion
failed: (replay_mutex_locked())
Bail out! ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock:
assertion failed:
Since commit cc5e719e2c8 ("kvm: require KVM_CAP_SIGNAL_MSI"),
its_class_name() single implementation doesn't return NULL
anymore. Update the prototype docstring, and remove the
pointless checks.
Reported-by: Gustavo Romero
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
Add the use case reported as issue #2886 [*]. The test
passes while it shouldn't. We are going to fix that in
the following commits.
[*] https://gitlab.com/qemu-project/qemu/-/issues/2886
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/bios-tables-test.c | 21 +
1 file
Commit the blobs generated by tests/data/acpi/rebuild-expected-aml.sh.
Changes in the tables:
@@ -1,32 +1,32 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20240927 (64-bit version)
* Copyright (c) 2000 - 2023 Intel Corporation
*
* Disassembly o
GIC ITS can be disabled at runtime using '-M its=off',
which sets VirtMachineState::its = false. Check this
field to avoid advertising the ITS in the MADT table.
Reported-by: Udo Steinberg
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2886
Signed-off-by: Philippe Mathieu-Daudé
Reviewed
VirtMachineState::tcg_its has the negated logic value of
VirtMachineClass::no_tcg_its. Directly use the latter,
removing the former.
Signed-off-by: Philippe Mathieu-Daudé
---
include/hw/arm/virt.h | 1 -
hw/arm/virt.c | 13 +
2 files changed, 5 insertions(+), 9 deletions(-)
No need to strstr() check the class name when we can
use kvm_irqchip_in_kernel().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
hw/arm/virt.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 177e9e0ea
We are going to fix the test_acpi_aarch64_virt_tcg_its_off()
test. In preparation, copy the ACPI tables which will be
altered as 'its_off' variants, and whitelist them.
Reviewed-by: Gustavo Romero
Signed-off-by: Philippe Mathieu-Daudé
---
tests/qtest/bios-tables-test-allowed-diff.h | 3 +++
t
On Thu, 3 Apr 2025 13:33:17 -0700
Farhan Ali wrote:
> On 4/3/2025 11:05 AM, Alex Williamson wrote:
> > On Thu, 3 Apr 2025 10:33:52 -0700
> > Farhan Ali wrote:
> >
> >> On 4/3/2025 9:27 AM, Alex Williamson wrote:
> >>> On Thu, 3 Apr 2025 11:44:42 -0400
> >>> Stefan Hajnoczi wrote:
> >>>
On 2/4/25 23:02, Philippe Mathieu-Daudé wrote:
To avoid including the huge "cpu.h" for a simple definition,
move TARGET_INSN_START_EXTRA_WORDS to "cpu-param.h".
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm/cpu-param.h| 7 +++
target/arm/cpu
On Thu, Apr 03, 2025 at 01:16:31AM -0700, Pinku Deb Nath wrote:
> The testing with "-t writeback" works for turning on enable_write_cache.
> I renamed the function to qemu_pwritev_fua() and fixed any typos.
>
> I moved the handle_aiocb_flush() into the qemu_pwritev_fua() and
> removed from the pre
On 3/4/25 19:36, Richard Henderson wrote:
On 4/3/25 08:18, Philippe Mathieu-Daudé wrote:
VirtMachineState::tcg_its has the same value of
VirtMachineClass::no_tcg_its. Directly use the latter,
removing the former.
No it doesn't.
- if (vmc->no_tcg_its) {
- vms->tcg_its = fals
On 3/4/25 23:29, Philippe Mathieu-Daudé wrote:
On 2/4/25 23:02, Philippe Mathieu-Daudé wrote:
To avoid including the huge "cpu.h" for a simple definition,
move TARGET_INSN_START_EXTRA_WORDS to "cpu-param.h".
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/arm
We only require the TCG_GUEST_DEFAULT_MO for MTTCG-enabled
frontends, otherwise we use a default value of TCG_MO_ALL.
In order to simplify, require the definition for all targets,
defining it for hexagon, m68k, rx, sh4 and tricore.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johanss
On 4/1/25 07:43, Philippe Mathieu-Daudé wrote:
Be sure to allocate the temp frame if it wasn't.
Fixes: c896fe29d6c ("TCG code generator")
Reported-by: Michael Tokarev
Reported-by: Helge Konetzka
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2891
Resolves: https://gitlab.com/qemu-proj
On Wed, Mar 19, 2025 at 4:14 PM Sebastian Huber
wrote:
>
> Mention that running the HSS no longer works. Document the changed boot
> options. Reorder documentation blocks. Update URLs.
>
> Signed-off-by: Sebastian Huber
Reviewed-by: Alistair Francis
Alistair
> ---
> docs/system/riscv/micr
On Wed, Mar 19, 2025 at 4:13 PM Sebastian Huber
wrote:
>
> Booting the microchip-icicle-kit machine using the latest PolarFire SoC
> Hart Software Services (HSS) no longer works since Qemu lacks support
> for several registers (clocks, DRAM controller). Also reading from the
> SDCard does not work
From: Brian Cain
To remove any confusion with HVX or other potential store instructions,
we'll qualify this context var with "scalar".
Signed-off-by: Brian Cain
---
target/hexagon/idef-parser/README.rst | 2 +-
target/hexagon/insn.h | 4 ++--
target/hexagon/macros.h
From: Brian Cain
The BADVA reg is referred to with the wrong identifier. The
CAUSE reg field of SSR is not yet modeled.
Signed-off-by: Brian Cain
---
target/hexagon/cpu.c | 3 +--
1 file changed, 1 insertion(+), 2 deletions(-)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 76
From: Brian Cain
We should raise an exception in the event that we encounter a packet
that can't be correctly decoded, not fault.
Signed-off-by: Brian Cain
---
target/hexagon/decode.c | 6 +-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/target/hexagon/decode.c b/target/hexa
From: Brian Cain
Signed-off-by: Brian Cain
---
target/hexagon/cpu-param.h | 5 +
1 file changed, 5 insertions(+)
diff --git a/target/hexagon/cpu-param.h b/target/hexagon/cpu-param.h
index 45ee7b4640..ccaf6a9d28 100644
--- a/target/hexagon/cpu-param.h
+++ b/target/hexagon/cpu-param.h
@@ -23
From: Brian Cain
Signed-off-by: Brian Cain
---
target/hexagon/hex_common.py | 27 ++-
1 file changed, 22 insertions(+), 5 deletions(-)
diff --git a/target/hexagon/hex_common.py b/target/hexagon/hex_common.py
index 758e5fd12d..242dee3731 100755
--- a/target/hexagon/hex_c
Hi Phil,
On 4/3/25 17:40, Philippe Mathieu-Daudé wrote:
No need to strstr() check the class name when we can
use kvm_irqchip_in_kernel().
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
hw/arm/virt.c | 12 +++-
1 file changed, 3 insertions(+), 9 deletions(-
On Tue, 1 Apr 2025, at 01:26, BALATON Zoltan wrote:
> The FDT does not normally store name properties but reconstructs it
> from path but each node in Open Firmware should at least have this
> property. This is correctly handled in getprop but nextprop should
> also return it even if not present
Hi Phil,
On 4/3/25 17:40, Philippe Mathieu-Daudé wrote:
Add the use case reported as issue #2886 [*]. The test
passes while it shouldn't. We are going to fix that in
the following commits.
I think this organization is not ideal. I like better your first
version, i.e., adding the correct blobs
On Fri, Mar 14, 2025 at 1:24 AM Paolo Savini wrote:
>
> Previous versions:
>
> - RFC v1:
> https://lore.kernel.org/all/20241218170840.1090473-1-paolo.sav...@embecosm.com/
> - RFC v2:
> https://lore.kernel.org/all/20241220153834.16302-1-paolo.sav...@embecosm.com/
> - RFC v3:
> https://lore.kerne
On 4/2/2025 6:42 AM, Anton Johansson wrote:
A default macOS build with xcode cli tools installed lacks the `indent`
program needed by the idef-parser postprocess step. If `indent` is
installed through homebrew it doesn't support the `-linux` flag.
Conditionally run `indent` only on linux hosts.
Hi Phil,
On 4/3/25 17:40, Philippe Mathieu-Daudé wrote:
Commit the blobs generated by tests/data/acpi/rebuild-expected-aml.sh.
In accordance with my comments in 5/9 and 6/9 about the blobs organization,
after the fix, I think only APIC blob should be updated and removed from
the "ignore list".
On Thu, Mar 20, 2025 at 5:22 AM Jim Shu wrote:
>
> Preparation commit to let aclint timer to use stimecmp write function.
> Aclint timer doesn't call sstc() predicate so we need to check inside
> the stimecmp write function.
>
> Signed-off-by: Jim Shu
Acked-by: Alistair Francis
Alistair
> ---
tb_check_watchpoint() calls cpu_get_tb_cpu_state(),
which is declared in each "cpu.h" header. It is indirectly
included via "tcg/insn-start-words.h". Since we want to
rework "tcg/insn-start-words.h", removing "cpu.h" in the
next commit, add the missing header now, otherwise we'd
get:
accel/tcg/t
By directly using TCGCPUOps::guest_default_memory_order,
we don't need the TCG_GUEST_DEFAULT_MO definition anymore.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Reviewed-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
---
docs/devel/multi-thread-tcg.rst | 4 ++--
ta
To avoid including the huge "cpu.h" for a simple definition,
move TARGET_INSN_START_EXTRA_WORDS to "cpu-param.h".
Reviewed-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
include/tcg/insn-start-words.h | 2 +-
target/arm/cpu-param.h | 7 +++
target/arm/cpu.h
As Richard mentioned:
We should allow RV128 in user-mode at all until there's a
kernel abi for it.
Remove the experimental 'x-rv128' CPU on user emulation
(since it is experimental, no deprecation period is required).
Reported-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
Add the TCGCPUOps::guest_default_memory_order field and have
each target initialize it.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anton Johansson
Reviewed-by: Richard Henderson
Reviewed-by: Pierrick Bouvier
---
include/accel/tcg/cpu-ops.h | 8
target/alpha/cpu.c | 2
In order to use TCG with multiple targets, replace the
compile time use of TCG_GUEST_DEFAULT_MO by a runtime access
to TCGCPUOps::guest_default_memory_order via CPUState.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/internal-target.h | 9 -
1 file c
Use the OnOffAuto type as 3-state.
Since the TCGState instance is zero-initialized, the
mttcg_enabled is initialzed as AUTO (ON_OFF_AUTO_AUTO).
In tcg_init_machine(), if mttcg_enabled is still AUTO,
set a default value (effectively inlining the
default_mttcg_enabled() method content).
In the tcg
In preparation of having tcg_req_mo() access CPUState in
the next commit, pass it to cpu_req_mo(), its single caller.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/internal-target.h | 3 ++-
accel/tcg/cputlb.c | 20 ++--
accel/tcg/u
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/backend-ldst.h| 41 +
accel/tcg/internal-target.h | 28 -
accel/tcg/cputlb.c | 1 +
accel/tcg/user-exec.c | 1 +
4 files changed, 43 insertions(+), 28 deletions(-)
On 3/4/25 17:49, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
target/hexagon/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c
index 766b678651..59fc9ed698 100644
--- a/target/hexagon/cpu.c
+++ b/target/hexagon/cpu.c
@
Hi Richard,
Here is my patch queue based on your tcg-next tree fixed.
You can find it as commit 511d57c091f on my repository:
https://gitlab.com/philmd/qemu/-/tree/tcg-next-fixed
Thanks,
Phil.
Since v1:
- Deferred warning change and updated desc (patches 40 & 42)
Since v2:
- Rebased & addresse
Only 2 files requiring "accel/tcg/cpu-ldst.h" API do not
include it:
- accel/tcg/cpu-exec.c
- target/arm/tcg/sve_helper.c
Include it there and remove it from "exec/exec-all.h".
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
---
include/exec/e
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Pierrick Bouvier
Reviewed-by: Richard Henderson
---
include/{exec => accel/tcg}/cpu-ldst-common.h | 6 +++---
include/exec/cpu_ldst.h | 2 +-
accel/tcg/translator.c| 2 +-
3 files changed, 5 inserti
Use TCGCPUOps::guest_default_memory_order to set TCGContext::guest_mo.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Richard Henderson
---
accel/tcg/translate-all.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/accel/tcg/translate-all.c b/accel/tcg/translate-all.c
ind
Instead of having a compile-time TARGET_SUPPORTS_MTTCG definition,
have each target set the 'mttcg_supported' field in the TCGCPUOps
structure.
Since so far we only emulate one target architecture at a time,
tcg_init_machine() gets whether MTTCG is supported via the
current CPU class (CPU_RESOLVIN
The following changes since commit 0adf626718bc0ca9c46550249a76047f8e45da15:
Update version for v10.0.0-rc2 release (2025-04-01 13:15:45 -0400)
are available in the Git repository at:
https://repo.or.cz/qemu/ericb.git tags/pull-nbd-2025-04-03
for you to fetch changes up to 961841472d25ab706
From: Thomas Huth
This reverts commit e2668ba1ed44ad56f2f1653ff5f53b277d534fac.
This commit made test 162 fail occasionally with:
162 fail [13:06:40] [13:06:40] 0.2s (last: 0.2s) output mismatch
--- tests/qemu-iotests/162.out
+++ tests/qemu-iotests/scratch/qcow2-file-162/162.out.
On Tue, Apr 01, 2025 at 11:18:17AM -0400, Haoqian He wrote:
> Live migration should be terminated if the vhost-user backend crashes
> before the migration completes.
>
> Specifically, since the vhost device will be stopped when VM is stopped
> before the end of the live migration, in current imple
The following changes since commit b876e721f1c939f3e83ac85bd3c1c2821e12b3fa:
Update version for v10.0.0-rc1 release (2025-03-25 13:58:14 -0400)
are available in the Git repository at:
https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream
for you to fetch changes up to 71925
From: Akihiko Odaki
The specification says the device MUST set num_buffers to 1 if
VIRTIO_NET_F_MRG_RXBUF has not been negotiated.
Fixes: df91055db5c9 ("virtio-net: enable virtio 1.0")
Signed-off-by: Akihiko Odaki
Message-Id: <20250108-buffers-v1-1-a0c85ff31...@daynix.com>
Reviewed-by: Michael
From: Pierrick Bouvier
This test was randomly failing on our CI, and on dev machines,
especially with QEMU debug builds.
>From the information collected, it's related to an implementation choice
in edk2 QEMU virt support. The workaround is to disable KASLR, to avoid
accessing protected memory.
N
On 4/3/25 08:18, Philippe Mathieu-Daudé wrote:
As of v10.0.0-rc2 this test is still failing on macos:
$ make check-functional-aarch64 V=1
...
ERROR:../../replay/replay-internal.c:235:replay_mutex_unlock: assertion
failed: (replay_mutex_locked())
Bail out! ERROR:../../replay/replay-i
On 03/04/2025 17.18, Philippe Mathieu-Daudé wrote:
First, the VMapple machine only works with the ARM 'host' CPU
type, which isn't accepted for QTest:
$ qemu-system-aarch64 -M vmapple -accel qtest
qemu-system-aarch64: The 'host' CPU type can only be used with KVM or HVF
Second, the QTest
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