On Wed, Mar 19, 2025 at 4:13 PM Sebastian Huber <sebastian.hu...@embedded-brains.de> wrote: > > Booting the microchip-icicle-kit machine using the latest PolarFire SoC > Hart Software Services (HSS) no longer works since Qemu lacks support > for several registers (clocks, DRAM controller). Also reading from the > SDCard does not work currently. > > In order to allow tests runs for real-time kernels such as RTEMS and > Zephyr, improve the boot customization. This patch set enables a direct > run of kernel executables, for example: > > qemu-system-riscv64 -no-reboot -nographic \ > -serial null -serial mon:stdio \ > -smp 2 \ > -bios none \ > -machine microchip-icicle-kit,clint-timebase-frequency=10000000 \ > -kernel rtos.elf > > v2: > > * Add documentation update. > > * In patch 3, warn if no device tree is specified. > > * In patch 4, use riscv_find_firmware() to locate the firmware shipped with > Qemu. > > v3: > > * In patch 4, add support for Qemu test runs. > > Sebastian Huber (6): > hw/misc: Add MPFS system reset support > hw/riscv: More flexible FDT placement for MPFS > hw/riscv: Make FDT optional for MPFS > hw/riscv: Allow direct start of kernel for MPFS > hw/riscv: Configurable MPFS CLINT timebase freq > hw/riscv: microchip_pfsoc: Rework documentation
Thanks! Applied to riscv-to-apply.next Alistair > > docs/system/riscv/microchip-icicle-kit.rst | 124 ++++++----------- > hw/misc/mchp_pfsoc_sysreg.c | 7 + > hw/riscv/microchip_pfsoc.c | 153 +++++++++++++++------ > include/hw/riscv/microchip_pfsoc.h | 1 + > 4 files changed, 164 insertions(+), 121 deletions(-) > > -- > 2.43.0 >
