Cédric Le Goater writes:
> On 2/27/25 23:01, Maciej S. Szmigiero wrote:
>> On 27.02.2025 07:59, Cédric Le Goater wrote:
>>> On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Update the VFIO documentation at docs/devel/migration describing the
changes br
Add RDT features to feature word / TCG.
Signed-off-by: Hendrik Wuethrich
---
target/i386/cpu.c | 33 +++--
target/i386/cpu.h | 2 ++
2 files changed, 33 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index cd06744451..6262665294 100
Add CPUID enumeration for intel RDT monitoring and allocation, as well
as the flags used in the enumeration code.
Signed-off-by: Hendrik Wuethrich
---
include/hw/i386/rdt.h | 23 +
target/i386/cpu.c | 75 +++
target/i386/cpu.h | 5 +++
Add RDT code to Associate CLOSID with RMID / set RMID for monitoring,
write COS, and read monitoring data. This patch does not add code for
the guest to interact through these things with MSRs, only the actual
ability for the RDT device to do them.
Signed-off-by: Hendrik Wuethrich
---
hw/i386/rd
Make sure that RDT monitoring and allocation features are included in
in full_cpuid_auto_level.
Signed-off-by: Hendrik Wuethrich
---
target/i386/cpu.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 1ec3d88a65..55003760a6 100644
--- a/target/i386
This test depends on TarFile.addfile() to add tar member header without
writing the member data, which we write ourself using qemu-nbd. Python
3.13 changed the function in a backward incompatible way[1] to require a
file object for tarinfo with non-zero size, breaking the test:
-[{"name": "vm
Implement rdmsr and wrmsr for the following MSRs:
* MSR_IA32_PQR_ASSOC
* MSR_IA32_QM_EVTSEL
* MSR_IA32_QM_CTR
* IA32_L3_QOS_Mask_n
* IA32_L2_QOS_Mask_n
* IA32_L2_QoS_Ext_BW_Thrtl_n
This allows for the guest to call RDT-internal functions to
associate an RMID with a CLOSID / set an active RMID for
Adjust minimum CPUID level if RDT monitoring or allocation features are
enabled to ensure that CPUID will return them.
Signed-off-by: Hendrik Wuethrich
---
target/i386/cpu.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 6262665294..1e
Hi Eric,
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 09/20] intel_iommu: Rename
>vtd_ce_get_rid2pasid_entry to vtd_ce_get_pasid_entry
>
>Hi Zhenzhong,
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> In early days vtd_ce_get_rid2pasid_entry() is used to get pasid ent
On 2/26/25 22:05, Maciej S. Szmigiero wrote:
On 26.02.2025 18:59, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
DEFINE_PROP_ON_OFF_AUTO() property isn't runtime-mutable so using it
would mean that the source VM would need to decide upfront at
Signed-off-by: Paolo Bonzini
---
rust/qemu-api/src/cell.rs | 30 ++
1 file changed, 30 insertions(+)
diff --git a/rust/qemu-api/src/cell.rs b/rust/qemu-api/src/cell.rs
index 6db678161ff..13e267ad355 100644
--- a/rust/qemu-api/src/cell.rs
+++ b/rust/qemu-api/src/cell.r
Hi Eric,
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 06/20] host_iommu_device: Define two new
>capabilities HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP]
>
>Hi Zhenzhong,
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> Signed-off-by: Zhenzhong Duan
>> ---
>> include/syste
On Thu, Feb 20, 2025 at 4:41 PM Jonathan Cameron
wrote:
>
> On Fri, 13 Dec 2024 17:26:38 +
> Hendrik Wuethrich wrote:
>
> > From: Hendrik Wüthrich
> >
> > Change config to show RDT, add minimal code to the rdt.c module to make
> > sure things still compile.
> >
> > Signed-off-by: Hendrik Wü
On Fri, 28 Feb 2025 at 17:48, Peter Maydell wrote:
>
> This patchset fixes some potential array overflows in the
> smc91c111 ethernet device model, including the one found in
> https://gitlab.com/qemu-project/qemu/-/issues/2742
>
> There are two classes of bugs:
> * we accept packet numbers from
From: Peter Foley
e.g.
qemu: Uninitialized value was created by an allocation of 'key_in_cur.i' in the
stack frame
qemu: #0 0xc49f489c in keyval_parse_one third_party/qemu/util/keyval.c:190:5
Signed-off-by: Peter Foley
Signed-off-by: Patrick Venture
---
util/keyval.c | 2 +-
1 file chang
On 2/28/25 13:23, Patrick Venture wrote:
From: Peter Foley
e.g.
Uninitialized value was created by an allocation of 'host_pc' in the stack
frame
#0 0xc07df87c in tb_gen_code
third_party/qemu/accel/tcg/translate-all.c:297:5
Signed-off-by: Peter Foley
Signed-off-by: Patrick Venture
On 28.02.2025 09:44, Cédric Le Goater wrote:
On 2/26/25 22:05, Maciej S. Szmigiero wrote:
On 26.02.2025 18:59, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
DEFINE_PROP_ON_OFF_AUTO() property isn't runtime-mutable so using it
would mean that
For accesses to the 91c111 data register, the address within the
packet's data frame is determined by a combination of the pointer
register and the offset used to access the data register, so that you
can access data at effectively wider than byte width. The pointer
register's pointer field is 11
On Fri, Feb 28, 2025 at 09:57:08PM +0200, Nir Soffer wrote:
> This test depends on TarFile.addfile() to add tar member header without
> writing the member data, which we write ourself using qemu-nbd. Python
> 3.13 changed the function in a backward incompatible way[1] to require a
> file object for
On 2/28/25 02:27, Paolo Bonzini wrote:
-.class_data = GUINT_TO_POINTER(misa_mxl_max)\
+.class_data = (void*) &((const RISCVCPUDef) { \
+ .misa_mxl_max = (misa_mxl_max_), \
+}), \
Drop
I appreciate you posting the patches. I didn't author the patches, actually;
John Johnson did it.
You could use your name as the author since you should be familiar with it now,
and I can review the patches.
Please add the following to each patch so it recognizes Oracle's contribution:
Co-autho
On Fri, Feb 28, 2025 at 2:26 AM Paolo Bonzini wrote:
> > Dump sys.stdin when it errors on meson-buildoptions.py, letting us debug
> > the build errors instead of just saying "Couldn't parse"
>
> Sure, why not. :) Queued the patch, it should go into 10.0.
>
Thanks! we kept seeing this because we
On 28.02.2025 09:09, Cédric Le Goater wrote:
On 2/26/25 22:04, Maciej S. Szmigiero wrote:
On 26.02.2025 11:43, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
The multifd received data needs to be reassembled since device state
packets sent vi
On 28.02.2025 09:53, Cédric Le Goater wrote:
On 2/27/25 23:01, Maciej S. Szmigiero wrote:
On 27.02.2025 07:48, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Allow capping the maximum count of in-flight VFIO device state buffers
queued at the
On 28.02.2025 10:11, Cédric Le Goater wrote:
On 2/26/25 22:05, Maciej S. Szmigiero wrote:
On 26.02.2025 14:49, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Since it's important to finish loading device state transferred via the
main migrati
On 28.02.2025 10:13, Cédric Le Goater wrote:
On 2/26/25 22:05, Maciej S. Szmigiero wrote:
On 26.02.2025 17:43, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Implement the multifd device state transfer via additional per-device
thread inside
On Fri, Feb 28, 2025 at 1:38 PM Richard Henderson <
richard.hender...@linaro.org> wrote:
> On 2/28/25 13:23, Patrick Venture wrote:
> > From: Peter Foley
> >
> > e.g.
> >Uninitialized value was created by an allocation of 'host_pc' in the
> stack frame
> >#0 0xc07df87c in tb_gen_code
Hi Graeme,
Thank you for your review. Could you please let me know if there is
anything else I need to do or wait on before merging the change?
Any input is appreciated.
Regards,
Kun
On Thu, Feb 27, 2025 at 7:16 AM Graeme Gregory wrote:
>
> On 25/02/2025 07:41, Kun Qin wrote:
> > From: Kun
On 28.02.2025 11:05, Cédric Le Goater wrote:
On 2/27/25 23:01, Maciej S. Szmigiero wrote:
On 27.02.2025 07:59, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Update the VFIO documentation at docs/devel/migration describing the
changes brought
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 03/20] HostIOMMUDevice: Introduce realize_late
>callback
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> Currently we have realize() callback which is called before attachment.
>> But there are still some elements e.g
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 05/20] vfio/iommufd: Implement [at|de]tach_hwpt
>handlers
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> Implement [at|de]tach_hwpt handlers in VFIO subsystem. vIOMMU
>> utilizes them to attach to or detach from hwp
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 08/20] iommufd: Implement query of
>HOST_IOMMU_DEVICE_CAP_ERRATA
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> Implement query of HOST_IOMMU_DEVICE_CAP_ERRATA for IOMMUFD
>> backed host IOMMU device.
>>
>> Query on
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 07/20] iommufd: Implement query of
>HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP]
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> Implement query of HOST_IOMMU_DEVICE_CAP_[NESTING|FS1GP] for
>IOMMUFD
>> backed host IOMMU dev
Hi Eric,
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 10/20] intel_iommu: Optimize context entry cache
>utilization
>
>Hi Zhenzhong,
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> There are many call sites referencing context entry by calling
>> vtd_as_to_context_entr
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 11/20] intel_iommu: Check for compatibility with
>IOMMUFD backed device when x-flts=on
>
>Hi Zhenzhong,
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> When vIOMMU is configured x-flts=on in scalable mode, stage-1 page t
On 2/27/25 23:01, Maciej S. Szmigiero wrote:
On 27.02.2025 07:48, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Allow capping the maximum count of in-flight VFIO device state buffers
queued at the destination, otherwise a malicious QEMU sourc
On 2/26/25 22:05, Maciej S. Szmigiero wrote:
On 26.02.2025 17:43, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Implement the multifd device state transfer via additional per-device
thread inside save_live_complete_precopy_thread handler.
Sw
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 12/20] intel_iommu: Introduce a new structure
>VTDHostIOMMUDevice
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> Introduce a new structure VTDHostIOMMUDevice which replaces
>> HostIOMMUDevice to be stored in hash ta
The dubious casts of mutable references to objects are not used
anymore: the wrappers for qdev_init_clock_in and for IRQ and MMIO
initialization can be called directly on the subclasses, without
casts, plus they take a shared reference so they can just use
"upcast()" instead of "upcast_mut()". Rem
On 2/26/25 22:05, Maciej S. Szmigiero wrote:
On 26.02.2025 14:49, Cédric Le Goater wrote:
On 2/19/25 21:34, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Since it's important to finish loading device state transferred via the
main migration channel (via save_live_iterate SaveVMHandle
On Thu, 27 Feb 2025 17:00:39 +0100
Mauro Carvalho Chehab wrote:
> Such file will be used to track HEST table changes.
>
> For now, disallow HEST table check until we update it to the
> current data.
>
> Signed-off-by: Mauro Carvalho Chehab
> Acked-by: Igor Mammedov
Hard to argue with an empty
On Thu, 27 Feb 2025 17:00:41 +0100
Mauro Carvalho Chehab wrote:
> Now that HEST table is checked for aarch64, add the current
> firmware file.
>
> Signed-off-by: Mauro Carvalho Chehab
> Acked-by: Igor Mammedov
Mostly for completeness rather than because there is any actual
review we can do on
Hi Zheng,
On 28/2/25 06:03, Zheng Huang wrote:
This commit adds failback routine for `virtio_pci_realize` to
fix the memory leak of an address space and the virtio-net device object.
If the realization of the device failed, the address space should be
destroyed too.
Resolves: https://gitlab.com
On Thu, 27 Feb 2025 17:00:43 +0100
Mauro Carvalho Chehab wrote:
> Add a new ags flag to change the way HEST offsets are calculated.
> Currently, offsets needed to store ACPI HEST offsets and read ack
> are calculated based on a previous knowledge from the logic
> which creates the HEST table.
>
This patchset add bios-tables-test for LoongArch64 virt machine
system. It works with UEFI bios, with uefi-test-tools LoongArch64
support is added to build bios-tables-test.loongarch64.iso.
Also with test case bios-tables-test, LoongArch64 support is added
and some basic ACPI tables is added here.
On Thu, 27 Feb 2025 at 17:12, Roy Hopkins wrote:
>
> On Thu, 2025-02-27 at 16:32 +0100, Stefano Garzarella wrote:
> > Hi Roy,
> >
> > On Thu, Feb 27, 2025 at 01:38:08PM +, Roy Hopkins wrote:
> > > Here is v7 of the set of patches to add support for IGVM files to
> > > QEMU. This is
> > > base
Add empty acpi table for LoongArch64 virt machine, it is only empty
file and there is no data in these files.
Signed-off-by: Bibo Mao
---
tests/data/acpi/loongarch64/virt/APIC | 0
tests/data/acpi/loongarch64/virt/DSDT | 0
tests/data/acpi/loongarch64/virt/FACP | 0
tests/data/acpi/loongarch64/v
The acpi table data is filled for LoongArch virt machine with the
following command:
TEST_ACPI_REBUILD_AML=y QTEST_QEMU_BINARY=./qemu-system-loongarch64
tests/qtest/bios-tables-test
Signed-off-by: Bibo Mao
---
tests/data/acpi/loongarch64/virt/APIC | Bin 0 -> 108 bytes
tests/data/acp
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 13/20] intel_iommu: Add PASID cache management
>infrastructure
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> This adds an new entry VTDPASIDCacheEntry in VTDAddressSpace to cache the
>> pasid entry and track PASID u
On Thu, 27 Feb 2025 17:00:55 +0100
Mauro Carvalho Chehab wrote:
> - The HEST table now accept two sources;
> - The DSDT tables now have a GED error device.
>
> @@ -1,39 +1,39 @@
> /*
> * Intel ACPI Component Architecture
> * AML/ASL+ Disassembler version 20240322 (64-bit version)
> * Copy
I tested this patch with virtio-net regression tests, everything works fine.
Tested-by: Lei Yang
On Tue, Feb 18, 2025 at 8:04 PM Stefano Garzarella wrote:
>
> On Tue, Feb 18, 2025 at 04:32:08PM +0800, oen...@gmail.com wrote:
> >From: Huaitong Han
> >
> >The vring call fd is set even when the g
>-Original Message-
>From: Eric Auger
>Subject: Re: [PATCH rfcv2 04/20] vfio/iommufd: Implement
>HostIOMMUDeviceClass::realize_late() handler
>
>
>
>
>On 2/19/25 9:22 AM, Zhenzhong Duan wrote:
>> There are three iommufd related elements iommufd handle, devid and
>
>There are three iommuf
On Thu, 27 Feb 2025 17:00:56 +0100
Mauro Carvalho Chehab wrote:
> While the HEST layout didn't change, there are some internal
> changes related to how offsets are calculated and how memory error
> events are triggered.
>
> Update specs to reflect such changes.
>
> Signed-off-by: Mauro Carvalho
On Thu, 27 Feb 2025 17:00:40 +0100
Mauro Carvalho Chehab wrote:
> Currently, aarch64 can generate a HEST table when loaded with
> -machine ras=on. Add support for it.
>
> Signed-off-by: Mauro Carvalho Chehab
> Reviewed-by: Igor Mammedov
Good to have and should always have been there...
Review
Em Fri, 28 Feb 2025 17:33:18 +0800
Jonathan Cameron escreveu:
> On Thu, 27 Feb 2025 17:00:55 +0100
> Mauro Carvalho Chehab wrote:
>
> > - The HEST table now accept two sources;
> > - The DSDT tables now have a GED error device.
> >
> > @@ -1,39 +1,39 @@
> > /*
> > * Intel ACPI Component Arc
Add support to build bios-tables-test iso image for LoongArch system.
Signed-off-by: Bibo Mao
---
tests/uefi-test-tools/Makefile | 5 +++--
.../UefiTestToolsPkg/UefiTestToolsPkg.dsc | 6 +-
tests/uefi-test-tools/uefi-test-build.config | 10 +++
Some tlb instructions get the tlb_ps from tlb->misc but the
value may has been initialized to 0,just check the tlb_e skip
the function and check_tlb_ps write a log.
For LoongArch th min tlb_ps is 12(4KB), for TLB code,
the tlb_ps may be 0,this may case UndefinedBehavior
Add a check-tlb_ps fucti
On Thu, Feb 06, 2025 at 10:01:45AM +0100, Thomas Huth wrote:
> On 05/02/2025 16.59, Daniel P. Berrangé wrote:
> > If QEMU_TEST_QEMU_BINARY is not set we currently assert in the setUp
> > function, resulting in a big traceback:
> >
> > TAP version 13
> > Traceback (most recent call last):
On Thu, 27 Feb 2025 17:00:51 +0100
Mauro Carvalho Chehab wrote:
> We'll be adding a new GED device for HEST GPIO notification and
> increasing the number of entries at the HEST table.
>
> Blocklist testing HEST and DSDT tables until such changes
> are completed.
>
> Signed-off-by: Mauro Carvalh
On Fri, 28 Feb 2025 at 00:18, Richard Henderson
wrote:
>
> On 2/27/25 09:58, Peter Maydell wrote:
> > On Thu, 27 Feb 2025 at 17:41, Richard Henderson
> > wrote:
> >>
> >> On 2/27/25 06:27, Peter Maydell wrote:
> >>> +static void do_ldrd_load(DisasContext *s, TCGv_i32 addr, int rt, int rt2)
> >>>
Hi Shameer,
>-Original Message-
>From: Shameerali Kolothum Thodi
>Subject: RE: [PATCH rfcv2 01/20] backends/iommufd: Add helpers for invalidating
>user-managed HWPT
>
>Hi Zhenzhong,
>
>> -Original Message-
>> From: Zhenzhong Duan
>> Sent: Wednesday, February 19, 2025 8:22 AM
>> T
On 28-02-2025 13:15, Cédric Le Goater wrote:
On 2/28/25 04:03, Chalapathi V wrote:
On 27-02-2025 07:24, Nicholas Piggin wrote:
On Sat Jan 4, 2025 at 2:18 AM AEST, Chalapathi V wrote:
Create a spi buses with distict names on each socket so that
responders
are attached to correct SPI control
Hi Alistair,
Can you please take a look in this series? This will collide with another
series that are changing KVM CSRs that will require a rebase. Might
as well do a rebase on top of this set too since it's fully acked already.
Thanks,
Daniel
On 2/21/25 9:26 AM, Daniel Henrique Barboza wro
On 2/26/25 11:39 AM, Florian Lugou wrote:
scontext size is 16 bits on RV32 and 32 bits on RV64, as recommended by
version 1.0 2025-02-21 of the debug specification.
When the Smstateen extension is implemented, accessibility to the
scontext CSR is controlled by bit 57 of the [mh]stateen0 CSRs.
Hi Jason,
Patch LGTM but it won't apply on top of alistair/riscv-to-apply.next. Can
you please rebase?
Thanks,
Daniel
On 2/27/25 4:34 AM, Jason Chien wrote:
The PPN field in a non-leaf PDT entry is positioned differently from that
in a leaf PDT entry. The original implementation incorrectly
Prepare for adding more fields to RISCVCPUDef and reading them in
riscv_cpu_init: instead of storing the misa_mxl_max field in
RISCVCPUClass, ensure that there's always a valid RISCVCPUDef struct
and go through it.
Signed-off-by: Paolo Bonzini
---
target/riscv/cpu.h | 2 +-
hw/riscv/boo
Expand the example in the comment documenting MO_ATOM_SUBALIGN,
to be clearer about the atomicity guarantees it represents.
Signed-off-by: Peter Maydell
---
include/exec/memop.h | 8 ++--
1 file changed, 6 insertions(+), 2 deletions(-)
diff --git a/include/exec/memop.h b/include/exec/memop.
To test ACPI tables, edk2 needs to be booted with a disk image having
EFI partition. This image is created using UefiTestToolsPkg.
The image is generated with the following command:
make -f tests/uefi-test-tools/Makefile
Signed-off-by: Bibo Mao
---
.../bios-tables-test.loongarch64.iso.qcow2
Add basic ACPI table test case for LoongArch64.
Signed-off-by: Bibo Mao
---
tests/qtest/bios-tables-test.c | 62 ++
1 file changed, 62 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c
index 0a333ec435..008d7a0497 100644
-
On Thu, Feb 27, 2025 at 10:38:11AM +, Peter Maydell wrote:
> On Thu, 27 Feb 2025 at 10:20, Paolo Bonzini wrote:
> >
> > On 2/27/25 11:07, Joel Granados wrote:
> > > Here is the error I see:
> > > cmd:
> > >meson introspect --buildoptions /home/joel/src/qemu/meson.build
> > >
> > > output:
On 2/28/25 12:00, Chalapathi V wrote:
On 28-02-2025 13:15, Cédric Le Goater wrote:
On 2/28/25 04:03, Chalapathi V wrote:
On 27-02-2025 07:24, Nicholas Piggin wrote:
On Sat Jan 4, 2025 at 2:18 AM AEST, Chalapathi V wrote:
Create a spi buses with distict names on each socket so that responder
Currently call to x86_firmware_configure() -> pc_system_parse_ovmf_flash()
happens only when SEV is enabled. Fortunately, X86_FW_OVMF is turned on
automatically when SEV is enabled and therefore, we never end up calling
pc_system_parse_ovmf_flash() when X86_FW_OVMF is turned off. In future,
it is
On 2/28/25 02:27, Daniel P. Berrangé wrote:
If the QEMU binary was built for a 32-bit ELF target we cannot run the
memory address space tests as they all require ability to address more
RAM that can be represented on 32-bit.
We can't use a decorator to skip the tests as we need setUp() to run to
On 2/28/25 8:20 PM, Steven Sistare wrote:
> On 2/28/2025 1:13 PM, Steven Sistare wrote:
>> On 2/28/2025 12:39 PM, Andrey Drobyshev wrote:
>>> Hi all,
>>>
>>> We've been experimenting with cpr-transfer migration mode recently and
>>> have discovered the following issue with the guest QXL driver:
>>>
We want to reduce the total number of build units in the system to get
on our way to a single binary. It will help to have some numbers so
lets add a job to gitlab to track our progress.
Signed-off-by: Alex Bennée
Cc: Pierrick Bouvier
Cc: Philippe Mathieu-Daudé
Cc: Richard Henderson
---
.gitl
On 2/28/25 8:35 PM, Andrey Drobyshev wrote:
> On 2/28/25 8:20 PM, Steven Sistare wrote:
>> On 2/28/2025 1:13 PM, Steven Sistare wrote:
>>> On 2/28/2025 12:39 PM, Andrey Drobyshev wrote:
Hi all,
We've been experimenting with cpr-transfer migration mode recently and
have discovere
Daniel P. Berrangé writes:
> When gitlab initializes the repo checkout for a CI job, it will have
> done a shallow clone with only partial history. Periodically the objects
> that are omitted cause trouble with the check-patch/check-dco jobs. This
> is exhibited as reporting strange errors being
On Tue, Feb 18, 2025 at 05:26:16PM +0100, Philippe Mathieu-Daudé wrote:
> Have "hw/xen/xen-bus" include the bare minimal set of headers.
>
> Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Anthony PERARD
Thanks,
--
Anthony PERARD
On 2/28/25 08:24, Peter Maydell wrote:
In debug_helper.c we provide a few dummy versions of
debug registers:
* DBGVCR (AArch32 only): enable bits for vector-catch
debug events
* MDCCINT_EL1: interrupt enable bits for the DCC
debug communications channel
* DBGVCR32_EL2: the AArch64 a
We expect all new code to be contributed with the "GPL-2.0-or-later"
license tag. Divergence is permitted if the new file is derived from
pre-existing code under a different license, whether from elsewhere
in QEMU codebase, or outside.
Issue a warning if the declared license is not "GPL-2.0-or-lat
On 2/28/25 02:27, Daniel P. Berrangé wrote:
A number of fields are set at the class level on QemuBaseTest, even
though the exact same named field is then set at the object level
later in most cases.
Reviewed-by: Thomas Huth
Signed-off-by: Daniel P. Berrangé
---
tests/functional/qemu_test/testc
On 2/28/25 02:27, Daniel P. Berrangé wrote:
The 'qemu_bin' field is currently set on the class, despite being
accessed as if it were an object instance field with 'self.qemu_bin'.
This is no obvious need to have it as a class field, so move it into
the object instance.
Reviewed-by: Thomas Huth
On 2/28/25 02:27, Daniel P. Berrangé wrote:
This was copied over from avocado but has not been used in the new
functional tests.
Reviewed-by: Thomas Huth
Signed-off-by: Daniel P. Berrangé
---
tests/functional/qemu_test/testcase.py | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
Found that some of the cache properties are not set correctly for EPYC models.
l1d_cache.no_invd_sharing should not be true.
l1i_cache.no_invd_sharing should not be true.
L2.self_init should be true.
L2.inclusive should be true.
L3.inclusive should not be true.
L3.no_invd_sharing should be true.
Add the CPUID bit indicates that a WRMSR to MSR_FS_BASE, MSR_GS_BASE, or
MSR_KERNEL_GS_BASE is non-serializing.
CPUID_Fn8021_EAX
BitFeature description
1 FsGsKernelGsBaseNonSerializing.
WRMSR to FS_BASE, GS_BASE and KernelGSbase are non-serializing.
Link:
https://www.amd.com/
Found that some of the cache properties are not set correctly for EPYC models.
l1d_cache.no_invd_sharing should not be true.
l1i_cache.no_invd_sharing should not be true.
L2.self_init should be true.
L2.inclusive should be true.
L3.inclusive should not be true.
L3.no_invd_sharing should be true.
Found that some of the cache properties are not set correctly for EPYC models.
l1d_cache.no_invd_sharing should not be true.
l1i_cache.no_invd_sharing should not be true.
L2.self_init should be true.
L2.inclusive should be true.
L3.inclusive should not be true.
L3.no_invd_sharing should be true.
On 2/28/2025 12:39 PM, Andrey Drobyshev wrote:
Hi all,
We've been experimenting with cpr-transfer migration mode recently and
have discovered the following issue with the guest QXL driver:
Run migration source:
EMULATOR=/path/to/emulator
ROOTFS=/path/to/image
QMPSOCK=/var/run/alma8qmp-src.sock
On Fri, Feb 28, 2025 at 10:34 PM Ani Sinha wrote:
>
> Currently call to x86_firmware_configure() -> pc_system_parse_ovmf_flash()
> happens only when SEV is enabled. Fortunately, X86_FW_OVMF is turned on
> automatically when SEV is enabled and therefore, we never end up calling
> pc_system_parse_o
On Thu, Feb 27, 2025 at 9:54 PM Andrew Jeffery
wrote:
> Hi Patrick,
>
> On Thu, 2025-02-27 at 15:42 +, Patrick Venture wrote:
> > eth_hdr requires 2 byte alignment
> >
> > Signed-off-by: Patrick Venture
> > ---
> > hw/net/ftgmac100.c | 15 ---
> > 1 file changed, 12 insertions(+
On 2/28/2025 1:13 PM, Steven Sistare wrote:
On 2/28/2025 12:39 PM, Andrey Drobyshev wrote:
Hi all,
We've been experimenting with cpr-transfer migration mode recently and
have discovered the following issue with the guest QXL driver:
Run migration source:
EMULATOR=/path/to/emulator
ROOTFS=/pat
Found that some of the cache properties are not set correctly for EPYC models.
l1d_cache.no_invd_sharing should not be true.
l1i_cache.no_invd_sharing should not be true.
L2.self_init should be true.
L2.inclusive should be true.
L3.inclusive should not be true.
L3.no_invd_sharing should be true.
Prasad Pandit writes:
> From: Prasad Pandit
>
> Add new qtests to run postcopy migration with multifd
> channels enabled.
>
> Signed-off-by: Prasad Pandit
> ---
> tests/qtest/migration/compression-tests.c | 15
> tests/qtest/migration/postcopy-tests.c| 27 +
> tests/qt
From: Prasad Pandit
Add new qtests to run postcopy migration with multifd
channels enabled.
Signed-off-by: Prasad Pandit
---
tests/qtest/migration/compression-tests.c | 15
tests/qtest/migration/postcopy-tests.c| 27 +
tests/qtest/migration/precopy-tests.c | 19 +++
Keoseong Park writes:
> This commit adds tests to verify the correctness of query attribute
> results related to the temperature feature. It ensures that querying
> temperature attributes returns expected values.
>
> Signed-off-by: Keoseong Park
Acked-by: Fabiano Rosas
On Tue, Feb 18, 2025 at 05:26:18PM +0100, Philippe Mathieu-Daudé wrote:
> Per Stefano:
>
> For ARM 32-bit, I do not think we ever had many deployments,
> as most are 64-bit. Even when there are deployments, they do
> not typically use QEMU, as QEMU is less important for Xen on
> ARM compar
Hi all,
We've been experimenting with cpr-transfer migration mode recently and
have discovered the following issue with the guest QXL driver:
Run migration source:
> EMULATOR=/path/to/emulator
> ROOTFS=/path/to/image
> QMPSOCK=/var/run/alma8qmp-src.sock
>
> $EMULATOR -enable-kvm \
> -machine
The smc91c111 uses packet numbers as an index into its internal
s->data[][] array. Valid packet numbers are between 0 and 3, but
the code does not generally check this, and there are various
places where the guest can hand us an arbitrary packet number
and cause an out-of-bounds access to the data
When the smc91c111 transmits a packet, it must read a control byte
which is at the end of the data area and CRC. However, we don't
sanitize the length field in the packet buffer, so if the guest sets
the length field to something large we will try to read past the end
of the packet data buffer whe
This patchset fixes some potential array overflows in the
smc91c111 ethernet device model, including the one found in
https://gitlab.com/qemu-project/qemu/-/issues/2742
There are two classes of bugs:
* we accept packet numbers from the guest, but we were not
validating that they were in range
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