Investigate the git history to uncover when and why the VFIO
properties were introduced and update the models. This is mostly
targeting vfio-pci device, since vfio-plateform, vfio-ap and vfio-ccw
devices are simpler.
Fpr PCI, it would be great to have a way to organize the output by
topics : dis
On 2/13/25 07:42, Michael Tokarev wrote:
13.02.2025 09:32, Cédric Le Goater wrote:
..
This seems to be a qemu-stable material (for 9.2).
Please let me know if it is not.
For 9.0 and above. It applies cleanly.
Yup, - I thought it wont be clear.
9.0 & 9.1 are end-of-line at this point, only 9
I tested this patch with vdpa's regression tests, everything works fine.
Tested-by: Lei Yang
On Thu, Feb 13, 2025 at 2:51 PM Eugenio Perez Martin
wrote:
>
> On Wed, Feb 12, 2025 at 5:49 PM Konstantin Shkolnyy
> wrote:
> >
> > VDPA didn't work on a big-endian machine due to missing/incorrect
>
Currently, there is only one CPER buffer (entry), meaning only one
memory error can be reported. In extreme case, multiple memory errors
can be raised on different vCPUs. For example, a singile memory error
on a 64KB page of the host can results in 16 memory errors to 4KB
pages of the guest. Unfort
An error object is created by ghes_record_cper_errors() to collect
the error messages in its failing path. The caller prints the error
messages and determine its return value base on the error object.
It's unnecessary to use an error object if the error number is
returned by ghes_record_cper_error
acpi_ghes_memory_errors() is the only caller, no need to expose
the function. Besides, the last 'return' in this function isn't
necessary and remove it.
No functional changes intended.
Signed-off-by: Gavin Shan
---
hw/acpi/ghes.c | 6 ++
include/hw/acpi/ghes.h | 2 --
2 files change
The error -1 is returned if the previously reported CPER error
hasn't been claimed. The virtual machine is terminated due to
abort(). It's conflicting to the ideal behaviour that the affected
vCPU retries pushing the CPER error in this case since the vCPU
can't proceed its execution.
Move the chun
Multiple CPER errors can be raised on multiple vCPUs at the same
time. The error -1 is returned from ghes_record_cper_errors() and
QEMU is terminated due to abort() in kvm_arch_on_sigbus_vcpu().
it isn't correct and expected behaviour since the affected vCPU
can't proceed with execution. It's reaso
From: Michael Roth
The current logic scans qemu.git/subprojects/ from *.wrap files to
determine whether or not to include the associated directories in the
release tarballs. However, the script assumes that it is being run from
the top-level of the source directory, which may not always be the ca
From: Rob Bradford
The mvendorid/mimpid/marchid properties have the wrong amount of
whitespace ahead of them.
Signed-off-by: Rob Bradford
Reviewed-by: Daniel Henrique Barboza
Signed-off-by: Michael Tokarev
---
target/riscv/cpu.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
di
The following changes since commit ce315328f8e9bf5201db4217f3ffe0784110aa4b:
Merge tag 'tracing-pull-request' of https://gitlab.com/stefanha/qemu into
staging (2025-02-13 11:23:57 -0500)
are available in the Git repository at:
https://gitlab.com/mjt0k/qemu.git tags/pull-trivial-patches
for
Hi Dmitry,
> Subject: Re: [PATCH v6 00/10] Support virtio-gpu DRM native context
>
> On 2/6/25 01:13, Dmitry Osipenko wrote:
> > On 2/5/25 23:08, Dmitry Osipenko wrote:
> >>> Thanks for showing me the video. I will take a look and check what would
> go wrong here. I kinda understand corruption ma
From: Philippe Mathieu-Daudé
Replace g_strdup_printf("%s", value) -> g_strdup(value)
to avoid unnecessary string formatting.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Daniel P. Berrangé
Reviewed-by: Stefan Hajnoczi
Reviewed-by: Michael Tokarev
Signed-off-by: Michael Tokarev
---
cr
From: Philippe Mathieu-Daudé
There was not mention QEMUTimer created with timer_new*() must
be released with timer_free() instead of g_free(), because then
active timers are removed from the active list. Update the
documentation mentioning timer_free().
Signed-off-by: Philippe Mathieu-Daudé
Rev
14.02.2025 02:53, Michael Roth пишет:
The current logic scans qemu.git/subprojects/ from *.wrap files to
determine whether or not to include the associated directories in the
release tarballs. However, the script assumes that it is being run from
the top-level of the source directory, which may n
Real-time kernels such as RTEMS or Zephyr may use a static device tree
built into the kernel image. Do not require to use the -dtb option if
-kernel is used for the microchip-icicle-kit machine.
Signed-off-by: Sebastian Huber
---
hw/riscv/microchip_pfsoc.c | 53 ++---
Further customize the -bios and -kernel options behaviour for the
microchip-icicle-kit machine. If "-bios none -kernel filename" is
specified, then do not load a firmware and instead only load and start
the kernel image.
Signed-off-by: Sebastian Huber
---
hw/riscv/microchip_pfsoc.c | 56 +++
This property enables the setting of the CLINT timebase frequency
through the command line, for example:
-machine microchip-icicle-kit,clint-timebase-frequency=1000
Signed-off-by: Sebastian Huber
---
hw/riscv/microchip_pfsoc.c | 49 +++---
include/hw/riscv/
Booting the microchip-icicle-kit machine using the latest PolarFire SoC
Hart Software Services (HSS) no longer works since Qemu lacks support
for several registers (clocks, DRAM controller). Also reading from the
SDCard does not work currently.
In order to allow tests runs for real-time kernels su
If the kernel entry is in the high DRAM area, place the FDT into this
area.
Signed-off-by: Sebastian Huber
---
hw/riscv/microchip_pfsoc.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/hw/riscv/microchip_pfsoc.c b/hw/riscv/microchip_pfsoc.c
index ec7e2e4226..2ddc
Signed-off-by: Sebastian Huber
---
hw/misc/mchp_pfsoc_sysreg.c | 7 +++
1 file changed, 7 insertions(+)
diff --git a/hw/misc/mchp_pfsoc_sysreg.c b/hw/misc/mchp_pfsoc_sysreg.c
index 7876fe0c5b..08196525aa 100644
--- a/hw/misc/mchp_pfsoc_sysreg.c
+++ b/hw/misc/mchp_pfsoc_sysreg.c
@@ -27,7 +27,
I tested this series patches with vdpa's regression tests, everything
works fine.
Tested-by: Lei Yang
On Wed, Feb 12, 2025 at 12:20 AM Eugenio Perez Martin
wrote:
>
> On Wed, Feb 5, 2025 at 3:58 PM Jonah Palmer wrote:
> >
> > An issue arises from aliased memory mappings in the guest, where
> >
The current logic scans qemu.git/subprojects/ from *.wrap files to
determine whether or not to include the associated directories in the
release tarballs. However, the script assumes that it is being run from
the top-level of the source directory, which may not always be the case.
In particular, wh
From: Hyman Huang
The way to enable multifd migration has been changed by commit,
82137e6c8c (migration: enforce multifd and postcopy preempt to
be set before incoming), and guestperf has not made the
necessary changes. If multifd migration had been enabled in the
previous manner, the following e
The gdbstub implementation for the Sparc architecture would
incorrectly calculate the the floating point register offset.
This resulted in, for example, registers f32 and f34 to point to
the same value.
The issue was caused by the confusion between even register numbers
and even register indexes.
Eric Blake writes:
> On Wed, Feb 12, 2025 at 05:33:51PM +0300, Vladimir Sementsov-Ogievskiy wrote:
>> Instead of comment
>> "Keep this type consistent with the nbd-server-start arguments", we
>> can simply merge these things.
>>
>> Signed-off-by: Vladimir Sementsov-Ogievskiy
>> ---
>>
>> No pr
In v2:
- Add live-migration context to the PAuth docs (Marc Zyngier)
- Fix the Arm capitlalization (Peter Maydell)
- Context here:
(https://lists.gnu.org/archive/html/qemu-devel/2025-01/msg05137.html)
* * *
v1 cover letter:
One is a trivial, mechanical change to consistenlty
On 12/2/25 13:56, Thomas Huth wrote:
On 12/02/2025 13.36, Philippe Mathieu-Daudé wrote:
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair
of DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "little-endian" property to select the device
endianness, defaulting to little endian.
Set the p
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
make it explicit.
Set the proper endianness on the single machine us
(series fully reviewed)
Since v7:
- Corrected commit descriptions
- Consider TARGET_BIG_ENDIAN for petalogix-ml605 machine (Thomas)
- Remove pointless QAPI description (Markus)
Since v6:
- Simplify MemoryRegionOps indexing (Thomas)
Since v5:
- Introduce QAPI EndianMode
- Update RISCV machine whi
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
make it explicit.
Set the proper endianness for each machine using t
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
make it explicit.
Set the proper endianness for each machine using t
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
make it explicit.
Set the proper endianness for each machine using t
Replace the DEVICE_NATIVE_ENDIAN MemoryRegionOps by a pair of
DEVICE_LITTLE_ENDIAN / DEVICE_BIG_ENDIAN.
Add the "endianness" property to select the device endianness.
This property is unspecified by default, and machines need to
make it explicit.
Set the proper endianness for each machine using t
Introduce the EndianMode type and the DEFINE_PROP_ENDIAN() macros.
Endianness can be BIG, LITTLE or unspecified (default).
Reviewed-by: Thomas Huth
Acked-by: Markus Armbruster
Signed-off-by: Philippe Mathieu-Daudé
---
qapi/common.json| 14 ++
include/hw/qdev-pro
On 13/2/25 07:43, Eugenio Perez Martin wrote:
On Wed, Feb 12, 2025 at 7:11 PM Philippe Mathieu-Daudé
wrote:
On 12/2/25 17:49, Konstantin Shkolnyy wrote:
VDPA didn't work on a big-endian machine due to missing/incorrect
CPU<->LE data format conversions.
Signed-off-by: Konstantin Shkolnyy
---
+AMD folks
On 12/2/25 23:01, Richard Henderson wrote:
Use out-of-line helpers to implement extended address memory ops.
With this, we can reduce TARGET_LONG_BITS to the more natural 32
for this 32-bit cpu.
I thought about something similar 2 months ago, but then realized
MicroBlaze cores can b
On 12/2/25 23:01, Richard Henderson wrote:
Use an explicit 64-bit type for EAR.
Signed-off-by: Richard Henderson
---
target/microblaze/cpu.h | 2 +-
target/microblaze/translate.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/target/microblaze/cpu.h b/target/mi
On 12/2/25 23:01, Richard Henderson wrote:
Use an explicit 64-bit type for extended addresses.
Signed-off-by: Richard Henderson
---
target/microblaze/translate.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 12/2/25 23:01, Richard Henderson wrote:
Return a constant 0 from reg_for_read, and a new
temporary from reg_for_write.
Signed-off-by: Richard Henderson
---
target/microblaze/translate.c | 24 ++--
1 file changed, 2 insertions(+), 22 deletions(-)
Reviewed-by: Philippe
USB_TOKEN_SETUP packet not being handled in usb_ep_get function.
This causes the program to hit the assertion that checks for only
USB_TOKEN_IN or USB_TOKEN_OUT, leading to the failure and core
dump when the USB_TOKEN_SETUP packet is processed.
Added a check for USB_TOKEN_SETUP to avoid triggering
On 13.02.25 00:26, Stefan Zabka wrote:
Sorry for the delayed engagement, I failed to apply the patch set from
the mailing list and had to remember that David had published this
change set on GitHub.
Tested-by: Stefan Zabka
This addresses my initial use case of being able to write to a single
M
On 12/2/25 23:01, Richard Henderson wrote:
Require TCGv_i32 and TCGv be identical, so drop
the extensions. Return constants when possible
instead of a mov into a temporary. Return register
inputs unchanged when possible.
Signed-off-by: Richard Henderson
---
target/microblaze/translate.c | 2
On 12/2/25 23:01, Richard Henderson wrote:
Use an explicit 64-bit type for the address to store in EAR.
Signed-off-by: Richard Henderson
---
target/microblaze/op_helper.c | 70 +--
1 file changed, 42 insertions(+), 28 deletions(-)
+static void mb_transacti
On Wed, 12 Feb 2025 at 22:26, Alexander Graf wrote:
>
>
> On 12.02.25 16:18, Gerd Hoffmann wrote:
> >Hi,
> >
> >>> Yes. Knowing both physical and virtual address works only for memory
> >>> you allocated yourself before ExitBootServices. So you can't pass on
> >>> pointers from the OS, you h
On 13.02.2025 11:48, Cédric Le Goater wrote:
..
9.0 & 9.1 are end-of-line at this point, only 9.2 is relevant now.
ok. I didn't know or missed the information.
Is there a stable planning page on the wiki or equivalent else where ?
I don't think so, no.
The general rule is that I try to keep
On 13.02.25 11:26, Markus Armbruster wrote:
Eric Blake writes:
On Wed, Feb 12, 2025 at 05:33:51PM +0300, Vladimir Sementsov-Ogievskiy wrote:
Instead of comment
"Keep this type consistent with the nbd-server-start arguments", we
can simply merge these things.
Signed-off-by: Vladimir Sementsov
On 2025/02/13 19:18, Alex Bennée wrote:
Akihiko Odaki writes:
On 2025/02/10 1:56, Dmitry Osipenko wrote:
From: Alex Bennée
This attempts to tidy up the VirtIO GPU documentation to make the
list
of requirements clearer. There are still a lot of moving parts and the
distros have some catching
This patch resolves potential data races involving access to TestBlockJob
fields in test-block-iothread.c.
Fixes: 93c60f3862 ("test-block-iothread: Job coroutine thread after AioContext
switch")
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/2809
Signed-off-by: Vitalii Mordan
---
tests
On Mon, Feb 10, 2025 at 3:41 AM Zhao Liu wrote:
> diff --git a/hw/i386/fw_cfg.c b/hw/i386/fw_cfg.c
> index d2cb08715a21..546de63123e6 100644
> --- a/hw/i386/fw_cfg.c
> +++ b/hw/i386/fw_cfg.c
> @@ -26,8 +26,6 @@
> #include CONFIG_DEVICES
> #include "target/i386/cpu.h"
>
> -struct hpet_fw_config h
As agreed in the "vtables and procedural macros" thread on
the mailing list.
Signed-off-by: Paolo Bonzini
---
docs/devel/rust.rst | 44
1 file changed, 44 insertions(+)
diff --git a/docs/devel/rust.rst b/docs/devel/rust.rst
index 390aae43866..8a7
On 2/13/25 4:52 AM, Clément Léger wrote:
As raised by Richard Henderson, these warnings are displayed in user
only as well. Disable them for CONFIG_USER_ONLY.
Signed-off-by: Clément Léger
---
I'm second guessing having these warnings at all.
Sure they serve as a warning for us, developers
On 13/02/2025 12:32, Daniel Henrique Barboza wrote:
>
>
> On 2/13/25 4:52 AM, Clément Léger wrote:
>> As raised by Richard Henderson, these warnings are displayed in user
>> only as well. Disable them for CONFIG_USER_ONLY.
>>
>> Signed-off-by: Clément Léger
>> ---
>
> I'm second guessing hav
Use virtio_get_config_size() rather than sizeof(struct
virtio_snd_config) for the config_size in the vhost-user-snd frontend.
The frontend shall rely on device features for the size of the device
configuration space. This fixes an issue introduced by commit ab0c7fb2
in which the optional field `con
On Thu, 13 Feb 2025, Thomas Huth wrote:
On 12/02/2025 23.34, BALATON Zoltan wrote:
On Wed, 12 Feb 2025, Philippe Mathieu-Daudé wrote:
On 12/2/25 17:23, BALATON Zoltan wrote:
On Wed, 12 Feb 2025, Philippe Mathieu-Daudé wrote:
On 12/2/25 14:53, Philippe Mathieu-Daudé wrote:
On 12/2/25 13:56, B
Investigate the git history to uncover when and why the VFIO
properties were introduced and update the models. This is mostly
targeting vfio-pci device, since vfio-plateform, vfio-ap and vfio-ccw
devices are simpler.
Organize the vfio-pci properties in topics. It would be great to have
a way to do
In v2:
- Add live-migration context to the PAuth docs (Marc Zyngier)
- Fix the Arm capitlalization (Peter Maydell)
(See:
https://lists.gnu.org/archive/html/qemu-devel/2025-01/msg05137.html)
* * *
v1 cover letter:
One is a trivial, mechanical change to consistenlty use "vCPU".
Signed-off-by: Kashyap Chamarthy
---
docs/system/arm/cpu-features.rst | 20 ++--
1 file changed, 10 insertions(+), 10 deletions(-)
diff --git a/docs/system/arm/cpu-features.rst b/docs/system/arm/cpu-features.rst
index 37d5dfd15b..a596316384 100644
--- a/docs/system/arm/cpu-featur
PAuth (Pointer Authentication), a security feature in software, is
relevant for both KVM and QEMU. Relect this fact into the docs:
- For KVM, `pauth` is a binary, "on" vs "off" option. The host CPU
will choose the cryptographic algorithm.
- For TCG, however, along with `pauth`, a couple
On Thu, 13 Feb 2025, Cédric Le Goater wrote:
Investigate the git history to uncover when and why the VFIO
properties were introduced and update the models. This is mostly
targeting vfio-pci device, since vfio-plateform, vfio-ap and vfio-ccw
Typo: vfio-platform
Regards,
BALATON Zoltan
On 5/2/25 05:03, Richard Henderson wrote:
The guest address will now always fit in one register.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.c.inc | 75
1 file changed, 23 insertions(+), 52 deletions(-)
Reviewed-by: Philippe Mathieu-Daud
Hi Cédric,
On 2/13/25 2:50 PM, Cédric Le Goater wrote:
> Investigate the git history to uncover when and why the VFIO
> properties were introduced and update the models. This is mostly
> targeting vfio-pci device, since vfio-plateform, vfio-ap and vfio-ccw
> devices are simpler.
>
> Organize the
On 2/13/25 15:17, BALATON Zoltan wrote:
On Thu, 13 Feb 2025, Cédric Le Goater wrote:
Investigate the git history to uncover when and why the VFIO
properties were introduced and update the models. This is mostly
targeting vfio-pci device, since vfio-plateform, vfio-ap and vfio-ccw
Typo: vfio-pl
On 13/2/25 12:32, Daniel Henrique Barboza wrote:
On 2/13/25 4:52 AM, Clément Léger wrote:
As raised by Richard Henderson, these warnings are displayed in user
only as well. Disable them for CONFIG_USER_ONLY.
Signed-off-by: Clément Léger
---
I'm second guessing having these warnings at all.
On 2/13/25 15:45, Eric Auger wrote:
Hi Cédric,
On 2/13/25 2:50 PM, Cédric Le Goater wrote:
Investigate the git history to uncover when and why the VFIO
properties were introduced and update the models. This is mostly
targeting vfio-pci device, since vfio-plateform, vfio-ap and vfio-ccw
devices
Thanks a lot, Alex.
You got the right fix. This is working for me. Expected length of response
is being returned now.
Vikrant
On Thu, Feb 13, 2025 at 4:00 PM Alexander Graf wrote:
> Hi Vikrant,
>
> On 13.02.25 11:01, Vikrant Garg wrote:
>
> > Hello All,
> >
> > I am using the QEMU for emulatin
Hello All,
I am using the QEMU for emulating nitro enclave images. In my enclave
image, I have an attestation service implemented in Rust. This application
fetches attestations using IOCTL command. I have noticed that response from
the nsm virtio device is always of length 0x3000 (i.e. maximum NSM
Syscall getdents(2) has been historically mistaken the pointer in the
loop. This influences aarch64 python3.12 built by cosmopolitan
/superconfigure thus been found out.
Signed-off-by: Meowthink
---
bsd-user/freebsd/os-stat.h | 1 +
1 file changed, 1 insertion(+)
diff --git a/bsd-user/freebsd/o
The Intel SDM section 10.2.3.3 on the MXCSR.FTZ bit says that we
flush outputs to zero when we detect underflow, which is after
rounding. Set the detect_ftz flag accordingly.
This allows us to enable the test in fma.c which checks this
behaviour.
Signed-off-by: Peter Maydell
Reviewed-by: Richar
On 13/2/25 14:59, BALATON Zoltan wrote:
On Thu, 13 Feb 2025, Thomas Huth wrote:
On 12/02/2025 23.34, BALATON Zoltan wrote:
On Wed, 12 Feb 2025, Philippe Mathieu-Daudé wrote:
On 12/2/25 17:23, BALATON Zoltan wrote:
On Wed, 12 Feb 2025, Philippe Mathieu-Daudé wrote:
On 12/2/25 14:53, Philippe
The softfloat get_float_exception_flags() function returns 'int', but
in various places in target/i386 we incorrectly store the returned
value into a uint8_t. This currently has no ill effects because i386
doesn't care about any of the float_flag enum values above 0x40.
However, we want to start u
The x86 DE bit in the FPU and MXCSR status is supposed to be set
when an input denormal is consumed. We didn't previously report
this from softfloat, so the x86 code either simply didn't set
the DE bit or else incorrectly wired it up to denormal_flushed,
depending on which register you looked at.
Add some fma test cases that check for correct handling of FTZ and
for the flag that indicates that the input denormal was consumed.
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
---
tests/tcg/x86_64/fma.c | 12
1 file changed, 12 insertions(+)
diff --git a/tests/tcg
This is a set of four patches to target/i386 which use the core
fpu functionality we just landed for Arm FEAT_AFP to correct
the emulation of some corner cases of x86 floating point:
* when we are flushing denormal outputs to zero, this should
be done after rounding, not before
* the MXCSR.DE
On 5/2/25 05:03, Richard Henderson wrote:
Since we no longer support 64-bit guests on 32-bit hosts,
we can use a 32-bit type on a 32-bit host. This shrinks
the size of the structure to 16 bytes on a 32-bit host.
Signed-off-by: Richard Henderson
---
include/exec/tlb-common.h | 10 +-
Wrap access to errno, for use in the block layer and character device
bindings.
Supersedes: <20250212093958.3703269-1-pbonz...@redhat.com>
v1->v2:
- use the libc crate
- provide separate From implementation for io::ErrorKind
- hide GetErrno trait inside a submodule
- add into_neg_errno() and corr
It is a common convention in QEMU to return a positive value in case of
success, and a negated errno value in case of error. Unfortunately,
using errno portably in Rust is a bit complicated; on Unix the errno
values are supported natively by io::Error, but on Windows they are not;
so, use the libc
This allows access to errno values.
Signed-off-by: Paolo Bonzini
---
rust/Cargo.lock | 7
rust/qemu-api/Cargo.toml | 1 +
scripts/archive-source.sh | 2 +-
scripts/make-release | 2 +-
subpro
On 5/2/25 05:03, Richard Henderson wrote:
The guest address will now always fit in one register.
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.c.inc | 62 ++-
1 file changed, 22 insertions(+), 40 deletions(-)
Reviewed-by: Philippe Mathieu-Daud
On 13/02/2025 14.59, BALATON Zoltan wrote:
On Thu, 13 Feb 2025, Thomas Huth wrote:
On 12/02/2025 23.34, BALATON Zoltan wrote:
[...]
So then can the behaviour of NATIVE_ENDIAN be changed to look at the
machine endianness instead of replacing it with a constant?
No, that does not work. First,
On 5/2/25 05:03, Richard Henderson wrote:
The guest address will now always fit in one register.
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.c.inc | 56 ++-
1 file changed, 20 insertions(+), 36 deletions(-)
Reviewed-by: Philippe Mathieu-Daud
When complying with the alignment requested in the ELF and unmapping
the excess reservation, having align_end not aligned to the guest page
causes the unmap to be rejected by the alignment check at
target_munmap and later brk adjustments hit an EEXIST.
Fix by aligning the start of region to be unm
On 5/2/25 05:03, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
tcg/tcg-op-ldst.c | 22 --
1 file changed, 4 insertions(+), 18 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On Thu, Feb 13, 2025 at 11:14:03AM +0100, Alexander Graf wrote:
>
> > I don't think so. The firmware driver knows this actually is normal ram
> > and can setup mappings and memory attributes accordingly. The situation
> > is a bit different from vga memory bars which are handled by pci bus
> > m
On Thu, 13 Feb 2025, Thomas Huth wrote:
On 13/02/2025 14.59, BALATON Zoltan wrote:
On Thu, 13 Feb 2025, Thomas Huth wrote:
On 12/02/2025 23.34, BALATON Zoltan wrote:
[...]
So then can the behaviour of NATIVE_ENDIAN be changed to look at the
machine endianness instead of replacing it with a co
As raised by Richard Henderson, these warnings are displayed in user
only as well. Since they aren't really useful for the end-user, remove
them and add a "TODO" note in the leading comments.
Signed-off-by: Clément Léger
---
v2:
- Remove Tommy bouncing mail from the recipient list
- Entirely r
On 13/2/25 14:25, Matias Ezequiel Vara Larsen wrote:
Use virtio_get_config_size() rather than sizeof(struct
virtio_snd_config) for the config_size in the vhost-user-snd frontend.
The frontend shall rely on device features for the size of the device
configuration space. This fixes an issue introdu
On Thu, Feb 13, 2025 at 12:26:42AM +0100, Stefan Zabka wrote:
> Sorry for the delayed engagement, I failed to apply the patch set from the
> mailing list and had to remember that David had published this change set on
> GitHub.
>
> Tested-by: Stefan Zabka
>
> This addresses my initial use case o
On 13/2/25 15:26, Peter Maydell wrote:
The softfloat get_float_exception_flags() function returns 'int', but
in various places in target/i386 we incorrectly store the returned
value into a uint8_t. This currently has no ill effects because i386
doesn't care about any of the float_flag enum value
Ping
On February 3, 2025 3:50:56 PM GMT+01:00, Mikael Szreder wrote:
>The gdbstub implementation for the Sparc architecture would incorectly
> calculate the the floating point register offset.
>This would cause register pairs(eg f32,f33) to point to the same value.
>
>Fixes: 30038fd81808 ("target
On 13/2/25 12:45, Alexander Graf wrote:
When we return a response packet from NSM, we need to indicate its
length according to the content of the response. Prior to this patch, we
returned the length of the source buffer, which may confuse guest code
that relies on the response size.
Fix it by r
please discard this patch :(
libvirt uses static type already on LoongArch platform, there is
compatibility issue. Static type cannot be removed, although I do
not know the difference between static type and full type.
Regards
Bibo Mao
On 2025/2/13 下午5:16, Bibo Mao wrote:
With full type for
Hi,
> That will bring back all issues with cached vs non-cached memory accesses,
> no? So edk2 will always access that memory as device memory which means it
> bypasses the cache, while QEMU will access it through the cache. So that
> buffer would need to actually be MMIO memory I suppose?
I d
Cc: Markus
hi, Markus
What is the difference between CPU_MODEL_EXPANSION_TYPE_STATIC and
CPU_MODEL_EXPANSION_TYPE_FULL?
thanks.
Song Gao.
在 2025/2/13 下午5:16, Bibo Mao 写道:
With full type for query-cpu-model-expansion qmp command, it shows that
it is not supported. For instance,
query-cpu-
Philippe Mathieu-Daudé writes:
> Introduce the EndianMode type and the DEFINE_PROP_ENDIAN() macros.
> Endianness can be BIG, LITTLE or unspecified (default).
>
> Reviewed-by: Thomas Huth
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> qapi/common.json| 16
>
On 13.02.25 10:41, Ard Biesheuvel wrote:
On Tue, 11 Feb 2025 at 10:23, Gerd Hoffmann wrote:
This patch adds a virtual device to qemu which the uefi firmware can use
to store variables. This moves the UEFI variable management from
privileged guest code (managing vars in pflash) to the host.
On Thu, 13 Feb 2025 at 11:11, Alexander Graf wrote:
>
>
> On 13.02.25 10:41, Ard Biesheuvel wrote:
> > On Tue, 11 Feb 2025 at 10:23, Gerd Hoffmann wrote:
> >> This patch adds a virtual device to qemu which the uefi firmware can use
> >> to store variables. This moves the UEFI variable management
On 13.02.25 10:52, Gerd Hoffmann wrote:
Hi,
That will bring back all issues with cached vs non-cached memory accesses,
no? So edk2 will always access that memory as device memory which means it
bypasses the cache, while QEMU will access it through the cache. So that
buffer would need to ac
On 13.02.25 10:28, Ard Biesheuvel wrote:
On Wed, 12 Feb 2025 at 22:26, Alexander Graf wrote:
On 12.02.25 16:18, Gerd Hoffmann wrote:
Hi,
Yes. Knowing both physical and virtual address works only for memory
you allocated yourself before ExitBootServices. So you can't pass on
pointers f
On Wed, Feb 12, 2025 at 8:52 PM Kevin Wolf wrote:
> I assume that sooner or later we'll have a reason to include it anyway,
> so that might honestly be the best option.
Sounds good.
> Do you want to post it as a proper patch? It seems to depend on your
> errno patch, but that shouldn't be a prob
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