On 1/29/25 15:43, Steve Sistare wrote:
Do not reset a vfio-pci device during CPR.
Signed-off-by: Steve Sistare
---
hw/pci/pci.c | 13 +
1 file changed, 13 insertions(+)
diff --git a/hw/pci/pci.c b/hw/pci/pci.c
index 2afa423..16b4f71 100644
--- a/hw/pci/pci.c
+++ b/hw/pci/pci.c
@
On Fri, Jan 24, 2025 at 04:45:25PM +0100, David Hildenbrand wrote:
> This is a follow-up to [1], implementing it by avoiding the use of
> address_space_write_rom() in cpu_memory_rw_debug() completely, and
> teaching address_space_write() about debug access instead, the can also
> write to ROM.
>
>
On Tue, Feb 04, 2025 at 11:23:41AM +0300, Daniil Tatianin wrote:
>
> On 1/23/25 7:31 PM, Peter Xu wrote:
> > On Thu, Jan 23, 2025 at 04:19:40PM +0300, Daniil Tatianin wrote:
> > > Currently, passing mem-lock=on to QEMU causes memory usage to grow by
> > > huge amounts:
> > >
> > > no memlock:
> >
On Tue, 4 Feb 2025 at 00:22, Philippe Mathieu-Daudé wrote:
>
> Except we alter the device tree blob, the 4B
> is just another raspi model.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/arm/raspi.c | 114 -
> hw/arm/raspi4b.c | 136
On 04.02.25 15:46, Peter Xu wrote:
On Fri, Jan 24, 2025 at 04:45:25PM +0100, David Hildenbrand wrote:
This is a follow-up to [1], implementing it by avoiding the use of
address_space_write_rom() in cpu_memory_rw_debug() completely, and
teaching address_space_write() about debug access instead, t
On 03.02.25 17:49, Peter Xu wrote:
On Fri, Jan 24, 2025 at 04:45:25PM +0100, David Hildenbrand wrote:
This is a follow-up to [1], implementing it by avoiding the use of
address_space_write_rom() in cpu_memory_rw_debug() completely, and
teaching address_space_write() about debug access instead, t
Steven Sistare writes:
> On 2/4/2025 8:42 AM, Cédric Le Goater wrote:
>> On 2/4/25 14:31, Steven Sistare wrote:
>>> Hi Cedric, CPR is a mode of live migration, integrated so closely that
>>> it makes more sense for the migration maintainers to maintain it, and
>>> consult me if/when necessary. "
On 3.02.2025 23:56, Peter Xu wrote:
On Mon, Feb 03, 2025 at 10:41:32PM +0100, Maciej S. Szmigiero wrote:
On 3.02.2025 21:20, Peter Xu wrote:
On Mon, Feb 03, 2025 at 07:53:00PM +0100, Maciej S. Szmigiero wrote:
On 3.02.2025 19:20, Peter Xu wrote:
On Thu, Jan 30, 2025 at 11:08:29AM +0100, Macie
On Tue, 4 Feb 2025 at 14:17, David Woodhouse wrote:
>
> On Tue, 2025-02-04 at 13:49 +, Peter Maydell wrote:
> > On Thu, 16 Jan 2025 at 14:05, David Woodhouse
> > wrote:
> > > +qemu_register_reset(vmclock_handle_reset, vms);
> >
> > No new calls to qemu_register_reset(), please. This is
>
On 1/29/25 15:43, Steve Sistare wrote:
Do not reset a vfio-pci device during CPR, and do not complain if the
kernel's PCI config space changes for non-emulated bits between the
vmstate save and load, which can happen due to ongoing interrupt activity.
Signed-off-by: Steve Sistare
---
hw/vfio/
"Maciej S. Szmigiero" writes:
> On 3.02.2025 23:56, Peter Xu wrote:
>> On Mon, Feb 03, 2025 at 10:41:32PM +0100, Maciej S. Szmigiero wrote:
>>> On 3.02.2025 21:20, Peter Xu wrote:
On Mon, Feb 03, 2025 at 07:53:00PM +0100, Maciej S. Szmigiero wrote:
> On 3.02.2025 19:20, Peter Xu wrote:
>
On Tue, 4 Feb 2025 at 00:22, Philippe Mathieu-Daudé wrote:
>
> We shouldn't access a QOM parent object directly.
> Use the appropriate type-cast macro.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/arm/raspi.c | 2 +-
> hw/arm/raspi4b.c | 2 +-
> 2 files changed, 2 insertions(+), 2 dele
On 4/2/25 14:29, Paolo Bonzini wrote:
On 2/4/25 09:28, Cédric Le Goater wrote:
The CPR feature was added in QEMU 9.0 and it lacks a maintainer.
Propose the main contributor to become one.
Why can't changes go through the migration tree? The only addition
seems to be hw/vfio/cpr*.
This patc
On 29/01/2025 21.04, Michael S. Tsirkin wrote:
On Wed, Jan 29, 2025 at 08:00:40AM +0100, Thomas Huth wrote:
On 17/01/2025 20.21, Thomas Huth wrote:
QEMU currently crashes when you try to inspect the machines based on
TYPE_PC_MACHINE for their properties:
$ echo '{ "execute": "qmp_capabiliti
27/12/24 18:16, Richard Henderson пишет:
On 12/27/24 02:46, Tigran Sogomonian wrote:
1 << i is casted to uint64_t while bitwise and with val.
So this value may become 0x8000 but only
31th "start" bit is required.
Use the bitfield extract() API instead.
Again, I < 32. There is no o
27/12/24 18:16, Richard Henderson пишет:
On 12/27/24 02:46, Tigran Sogomonian wrote:
1 << i is casted to uint64_t while bitwise and with val.
So this value may become 0x8000 but only
31th "start" bit is required.
Use the bitfield extract() API instead.
Again, I < 32. There is no o
Thank you Richard for noticing the issue.
I have been able to create tests that show the malfunction of the FsTOx
instruction as well. I am however not yet able to prove(through tests) the
malfunction of the FxTO{s,d,q} instructions.
Based on the fact that the source registers are 64 bit, a sim
On Thu, Jan 30, 2025 at 11:08:28AM +0100, Maciej S. Szmigiero wrote:
> From: "Maciej S. Szmigiero"
>
> Currently, hitting EOF on receive without sender terminating the TLS
> session properly causes the TLS channel to return an error (unless
> the channel was already shut down for read).
>
> Add
On Tue, 4 Feb 2025 at 00:23, Philippe Mathieu-Daudé wrote:
>
> Merge Raspi4bMachineState within RaspiMachineState by
> using an unnamed union.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> hw/arm/raspi.c | 21 +++--
> 1 file changed, 7 insertions(+), 14 deletions(-)
>
> diff
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> These 2 values are different between NPCM7XX and NPCM8XX
> GCRs. So we add them to the class and assign different values
> to them.
>
> Signed-off-by: Hao Wu
> ---
> hw/misc/npcm_gcr.c | 24 +++-
> include/hw/misc/npcm_g
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> This allows different FIUs to have different flash sizes, useful
> in NPCM8XX which has multiple different sized FIU modules.
>
> Signed-off-by: Hao Wu
> ---
> hw/arm/npcm7xx.c | 6 ++
> hw/ssi/npcm7xx_fiu.c | 11 +++---
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> NPCM8XX boot block stores the DRAM size in SCRPAD_B register in GCR
> module. Since we don't simulate a detailed memory controller, we
> need to store this information directly similar to the NPCM7XX's
> INCTR3 register.
>
> Signed-off-by: Hao Wu
>
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> The NPCM8xx GCR device can be accessed with 64-bit memory operations.
> This patch supports that.
>
> Signed-off-by: Hao Wu
> ---
> hw/misc/npcm_gcr.c | 94 +---
> hw/misc/trace-events | 4 +-
> 2 files ch
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> NPCM7XX and NPCM8XX have a different set of CLK registers. This
> commit changes the name of the clk files to be used by both
> NPCM7XX and NPCM8XX CLK modules.
>
> Signed-off-by: Hao Wu
> ---
Reviewed-by: Peter Maydell
thanks
-- PMM
Am 03.02.2025 um 19:58 hat Stefan Hajnoczi geschrieben:
> On Fri, Jan 31, 2025 at 10:50:46AM +0100, Kevin Wolf wrote:
> > Currently, block jobs can't handle inactive images correctly. Incoming
>
> Did you mean "block exports" instead of "block jobs"? If it's really
> "block jobs", please give an e
On Tue, Feb 04, 2025 at 10:31:31AM -0500, Peter Xu wrote:
> On Tue, Feb 04, 2025 at 03:39:00PM +0100, Maciej S. Szmigiero wrote:
> > On 3.02.2025 23:56, Peter Xu wrote:
> > > On Mon, Feb 03, 2025 at 10:41:32PM +0100, Maciej S. Szmigiero wrote:
> > > > On 3.02.2025 21:20, Peter Xu wrote:
> > > > > O
On 4.02.2025 16:15, Daniel P. Berrangé wrote:
On Thu, Jan 30, 2025 at 11:08:28AM +0100, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Currently, hitting EOF on receive without sender terminating the TLS
session properly causes the TLS channel to return an error (unless
the channel was
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> A lot of NPCM7XX and NPCM8XX CLK modules share the same code,
> this commit moves the NPCM7XX CLK to NPCM CLK for these
> properties.
Reviewed-by: Peter Maydell
thanks
-- PMM
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> These 2 values are different between NPCM7XX and NPCM8XX
> CLKs. So we add them to the class and assign different values
> to them.
>
> Signed-off-by: Hao Wu
> ---
> hw/misc/npcm_clk.c | 17 +++--
> include/hw/misc/npcm_clk.h |
On Thu, 26 Dec 2024 at 08:28, Hao Wu wrote:
>
> NPCM8XX adds a few new registers and have a different set of reset
> values to the CLK modules. This patch supports them.
>
> This patch doesn't support the new clock values generated by these
> registers. Currently no modules use these new clock val
On 11/21/2024 6:42 PM, Joao Martins wrote:
On 20/11/2024 07:31, Suravee Suthikulpanit wrote:
Add migration support for AMD IOMMU model by saving necessary AMDVIState
parameters for MMIO registers, device table, command buffer, and event
buffers.
Signed-off-by: Suravee Suthikulpanit
---
hw/
On Tue, Feb 04, 2025 at 06:49:15PM +0100, Eric Auger wrote:
> > In summary, we will have the following series:
> > 1) HWPT uAPI patches in backends/iommufd.c (Zhenzhong or Shameer)
> >
> > https://lore.kernel.org/qemu-devel/sj0pr11mb6744943702eb5798ec9b3b9992...@sj0pr11mb6744.namprd11.prod.outl
On 04/02/25, Philippe Mathieu-Daudé wrote:
> ping for trivial review?
>
> On 8/11/24 16:43, Philippe Mathieu-Daudé wrote:
> > When a property value is static (not provided by QMP or CLI),
> > error shouldn't happen, otherwise it is a programming error.
> > Therefore simplify and use &error_abort a
On 11/29/2024 12:14 AM, Joao Martins wrote:
On 21/11/2024 11:42, Joao Martins wrote:> On 20/11/2024 07:31, Suravee
Suthikulpanit wrote:
Add migration support for AMD IOMMU model by saving necessary AMDVIState
parameters for MMIO registers, device table, command buffer, and event
buffers.
Sig
On Tue, Feb 04, 2025 at 06:50:17PM +0100, David Hildenbrand wrote:
> > /*
> > @@ -595,6 +628,7 @@ static const TypeInfo host_memory_backend_info = {
> > .instance_size = sizeof(HostMemoryBackend),
> > .instance_init = host_memory_backend_init,
> > .instance_post_init = host_
On 04.02.25 18:17, Peter Xu wrote:
On Sat, Feb 01, 2025 at 09:57:24AM +, “William Roche wrote:
From: David Hildenbrand
Notify registered listeners about the remap at the end of
qemu_ram_remap() so e.g., a memory backend can re-apply its
settings correctly.
Signed-off-by: David Hildenbrand
On 4/2/25 19:19, Thomas Huth wrote:
On 04/02/2025 19.07, Philippe Mathieu-Daudé wrote:
Invert the 'no_sdcard' logic, renaming it as the more explicit
"auto_create_sdcard". Machines are supposed to create a SD Card
drive when this flag is set. In many cases it doesn't make much
sense (as boards d
On 4.02.2025 17:14, Daniel P. Berrangé wrote:
On Tue, Feb 04, 2025 at 05:02:23PM +0100, Maciej S. Szmigiero wrote:
On 4.02.2025 16:15, Daniel P. Berrangé wrote:
On Thu, Jan 30, 2025 at 11:08:28AM +0100, Maciej S. Szmigiero wrote:
From: "Maciej S. Szmigiero"
Currently, hitting EOF on receive
Peter Xu writes:
> On Tue, Feb 04, 2025 at 03:08:02PM +, Daniel P. Berrangé wrote:
>> On Mon, Feb 03, 2025 at 01:20:01PM -0500, Peter Xu wrote:
>> > On Thu, Jan 30, 2025 at 11:08:29AM +0100, Maciej S. Szmigiero wrote:
>> > > From: "Maciej S. Szmigiero"
>> > >
>> > > Multifd send channels ar
On 04/02/2025 19.07, Philippe Mathieu-Daudé wrote:
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. Only the ARM and RISCV targets use such
feature:
$ git grep -wl IF_SD hw | cut -d/ -f-2 | sort
On 04/02/2025 19.12, Philippe Mathieu-Daudé wrote:
On 4/2/25 19:07, Philippe Mathieu-Daudé wrote:
Previous commit left this method empty, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/e500.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
Invert the 'no_sdcard' logic, renaming it as the more explicit
"auto_create_sdcard". Machines are supposed to create a SD Card
drive when this flag is set. In many cases it doesn't make much
sense (as boards don't expose SD Card host controller), but this
is patch only aims to expose that nonsense;
Invert MachineClass 'no_sdcard' flag logic and rename it
to 'create_default_sdcard_drive' to make sense of this
default value applied to all machines.
We use the OnOffAuto tri-state to catch implicit default
values. Then we toggle the logic and remove invalid uses.
No logical change intended (excep
Update MachineClass::no_sdcard default implicit AUTO
initialization to explicit OFF. This flag is consumed
in system/vl.c::qemu_disable_default_devices(). Use
this place to assert we don't have anymore AUTO state.
In hw/ppc/e500.c we add the ppce500_machine_class_init()
method to initialize once a
MachineClass::no_sdcard is initialized as false by default.
To catch all uses, convert it to a tri-state, having the
current default (false) becoming AUTO.
No logical change intended.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
include/hw/boards.h| 2 +-
hw/arm/x
Using the auto_create_sdcard feature without SD Bus is irrelevant.
Signed-off-by: Philippe Mathieu-Daudé
---
system/vl.c | 8
1 file changed, 8 insertions(+)
diff --git a/system/vl.c b/system/vl.c
index 5ff461ea4ca..dd8053e1e79 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -53,6 +53,7
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the ARM machines modified by this
commit try to use the IF_SD interface.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed.c
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. Only the ARM and RISCV targets use such
feature:
$ git grep -wl IF_SD hw | cut -d/ -f-2 | sort -u
hw/arm
hw/riscv
$
Remove all other uses.
Sign
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the RISCV machines modified by this
commit try to use the IF_SD interface.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/riscv/opentitan.c |
On Tue, Feb 4, 2025 at 7:10 PM Eugenio Perez Martin wrote:
>
> On Tue, Feb 4, 2025 at 1:49 PM Sahil Siddiq wrote:
> >
> > Hi,
> >
> > On 1/31/25 12:27 PM, Eugenio Perez Martin wrote:
> > > On Fri, Jan 31, 2025 at 6:04 AM Sahil Siddiq
> > > wrote:
> > >> On 1/24/25 1:04 PM, Eugenio Perez Martin
On 4/2/25 14:49, Peter Maydell wrote:
On Thu, 16 Jan 2025 at 14:05, David Woodhouse wrote:
From: David Woodhouse
The vmclock device addresses the problem of live migration with
precision clocks. The tolerances of a hardware counter (e.g. TSC) are
typically around ±50PPM. A guest will use NTP
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. Only the ARM and RISCV targets use such
feature:
$ git grep -wl IF_SD hw | cut -d/ -f-2 | sort -u
hw/arm
hw/riscv
$
Remove all other uses.
Sign
On 04/02/2025 19.07, Philippe Mathieu-Daudé wrote:
Update MachineClass::no_sdcard default implicit AUTO
initialization to explicit OFF. This flag is consumed
in system/vl.c::qemu_disable_default_devices(). Use
this place to assert we don't have anymore AUTO state.
In hw/ppc/e500.c we add the ppc
Previous commit left this method empty, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/e500.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 59208da87de..26933e0457e 100644
--- a/hw/ppc/e500.c
+++ b/hw/ppc/e500.c
@@ -1285,10 +1285,6 @@ st
Invert the 'no_sdcard' logic, renaming it as the more explicit
"auto_create_sdcard". Machines are supposed to create a SD Card
drive when this flag is set. In many cases it doesn't make much
sense (as boards don't expose SD Card host controller), but this
is patch only aims to expose that nonsense;
On 4/2/25 19:17, Philippe Mathieu-Daudé wrote:
On 4/2/25 14:49, Peter Maydell wrote:
On Thu, 16 Jan 2025 at 14:05, David Woodhouse
wrote:
From: David Woodhouse
The vmclock device addresses the problem of live migration with
precision clocks. The tolerances of a hardware counter (e.g. TSC) a
Using the auto_create_sdcard feature without SD Bus is irrelevant.
Signed-off-by: Philippe Mathieu-Daudé
---
system/vl.c | 8
1 file changed, 8 insertions(+)
diff --git a/system/vl.c b/system/vl.c
index 5ff461ea4ca..dd8053e1e79 100644
--- a/system/vl.c
+++ b/system/vl.c
@@ -53,6 +53,7
Update MachineClass::no_sdcard default implicit AUTO
initialization to explicit OFF. This flag is consumed
in system/vl.c::qemu_disable_default_devices(). Use
this place to assert we don't have anymore AUTO state.
In hw/ppc/e500.c we add the ppce500_machine_class_init()
method to initialize once a
Invert MachineClass 'no_sdcard' flag logic and rename it
to 'create_default_sdcard_drive' to make sense of this
default value applied to all machines.
We use the OnOffAuto tri-state to catch implicit default
values. Then we toggle the logic and remove invalid uses.
No logical change intended (excep
On Tue, Feb 4, 2025 at 1:49 PM Sahil Siddiq wrote:
>
> Hi,
>
> On 1/31/25 12:27 PM, Eugenio Perez Martin wrote:
> > On Fri, Jan 31, 2025 at 6:04 AM Sahil Siddiq wrote:
> >> On 1/24/25 1:04 PM, Eugenio Perez Martin wrote:
> >>> On Fri, Jan 24, 2025 at 6:47 AM Sahil Siddiq
> >>> wrote:
> On
On 4/2/25 19:07, Philippe Mathieu-Daudé wrote:
Invert MachineClass 'no_sdcard' flag logic and rename it
to 'create_default_sdcard_drive' to make sense of this
default value applied to all machines.
We use the OnOffAuto tri-state to catch implicit default
values. Then we toggle the logic and remov
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the RISCV machines modified by this
commit try to use the IF_SD interface.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/riscv/opentitan.c |
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the ARM machines modified by this
commit try to use the IF_SD interface.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/arm/aspeed.c
MachineClass::no_sdcard is initialized as false by default.
To catch all uses, convert it to a tri-state, having the
current default (false) becoming AUTO.
No logical change intended.
Signed-off-by: Philippe Mathieu-Daudé
Reviewed-by: Thomas Huth
---
include/hw/boards.h| 2 +-
hw/arm/x
On 4/2/25 19:07, Philippe Mathieu-Daudé wrote:
Previous commit left this method empty, remove it.
Signed-off-by: Philippe Mathieu-Daudé
---
hw/ppc/e500.c | 5 -
1 file changed, 5 deletions(-)
diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
index 59208da87de..26933e0457e 100644
--- a/hw/ppc/e
On 04/02/2025 19.07, Philippe Mathieu-Daudé wrote:
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the ARM machines modified by this
commit try to use the IF_SD interface.
Signed-off-by:
From: Helge Deller
Until now we used a standard serial-pci device to emulate a HP serial
console. This worked nicely with 32-bit Linux and 32-bit HP-UX, but
64-bit HP-UX crashes with it and expects either a Diva GSP card, or a real
64-bit capable PCI graphic card (which we don't have yet).
In or
From: Helge Deller
Allow users to disable the artist graphic card on the command line
with the option "-global artist.disable=true".
This change allows to use other graphic cards when using Linux, e.g.
by adding "-device ati-vga".
Signed-off-by: Helge Deller
---
hw/display/artist.c | 9 ++-
From: Helge Deller
The Diva GSP ("Guardian Service Processor") PCI boards are Remote
Management cards for PA-RISC machines. They come with built-in 16550A
UARTs for serial consoles and modem functionalities, as well as a
mailbox-like memory area for hardware auto-reboot functionality.
Latest ge
From: Helge Deller
Each Astro on 64-bit machines supports up to four LMMIO regions.
Those regions are used by graphic cards and other PCI devices which
need to map huge memory areas. The LMMIO regions are configured and
set up by SeaBIOS-hppa and then used as-is by the operating systems
(Linux, H
From: Helge Deller
A small series of patches which enhances the graphics output on 64-bit hppa
machines. Allows to disable the artist graphic card and introduces drivers for
the Diva GSP (remote management) cards which are used in later 64-bit machines
and which we now use for serial console outp
From: Helge Deller
Do not create the artist graphic card if the user disabled it
with "-global artist.disable=true" on the command line.
Signed-off-by: Helge Deller
---
hw/hppa/machine.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/hppa/machine.c b/hw/hppa
From: Helge Deller
Update to lastest SeaBIOS-hppa which sets up the
LMMIO range for the internal artist graphic card.
Signed-off-by: Helge Deller
---
roms/seabios-hppa | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/roms/seabios-hppa b/roms/seabios-hppa
index 1c516b4813..33
For system mode, we can rarely support the amount of RAM that
the guest requires. TCG emulation is restricted to round-robin
mode, which solves many of the atomicity issues, but not those
associated with virtio. In any case, round-robin does nothing
to help the speed of emulation.
For user mode,
On 2/5/25 2:19 PM, Matthew R. Ochs wrote:
The MMIO region size required to support virtualized environments with
large PCI BAR regions can exceed the hardcoded limit configured in QEMU.
For example, a VM with multiple NVIDIA Grace-Hopper GPUs passed through
requires more MMIO memory than the amou
On Mon, 03 Feb 2025, Jonathan Cameron wrote:
On Tue, 22 Oct 2024 18:00:30 +0100
Jonathan Cameron wrote:
On Mon, 21 Oct 2024 20:23:46 -0700
Davidlohr Bueso wrote:
> On Tue, 27 Aug 2024, Jonathan Cameron wrote:\n
> >No comments inline and LGTM. I'll queue it on my tree and push
> >that out on
On 04/02/2025 22.53, Richard Henderson wrote:
Require a 64-bit host binary to spawn a 64-bit guest.
Signed-off-by: Richard Henderson
---
meson.build | 18 --
1 file changed, 12 insertions(+), 6 deletions(-)
Reviewed-by: Thomas Huth
On 04/02/2025 22.53, Richard Henderson wrote:
For system mode, we can rarely support the amount of RAM that
the guest requires. TCG emulation is restricted to round-robin
mode, which solves many of the atomicity issues, but not those
associated with virtio. In any case, round-robin does nothing
Philippe Mathieu-Daudé writes:
> MachineClass::auto_create_sdcard is only useful to automatically
> create a SD card, attach a IF_SD block drive to it and plug the
> card onto a SD bus. Only the ARM and RISCV targets use such
> feature:
>
> $ git grep -wl IF_SD hw | cut -d/ -f-2 | sort -u
> hw/
Hi Andrew,
> From: Andrew Jeffery
> Sent: Wednesday, February 5, 2025 11:51 AM
> To: Jamin Lin ; Cédric Le Goater ;
> Peter Maydell ; Steven Lee
> ; Troy Lee ; Joel Stanley
> ; open list:ASPEED BMCs ; open
> list:All patches CC here
> Cc: Troy Lee ; Yunlin Tang
>
> Subject: Re: [PATCH v1 12/18
On 04/02/2025 22.53, Richard Henderson wrote:
Require a 64-bit host binary to spawn a 64-bit guest.
For HVF this is trivially true because macOS 11 dropped
support for 32-bit applications entirely.
Signed-off-by: Richard Henderson
---
meson.build | 11 +++
1 file changed, 7 insertio
Eric Blake writes:
> Although defaulting the handshake limit to 10 seconds was a nice QoI
> change to weed out intentionally slow clients, it can interfere with
> integration testing done with manual NBD_OPT commands over 'nbdsh
> --opt-mode'. Expose a QMP knob 'handshake-max-secs' to allow the
On 04/02/2025 21.09, Philippe Mathieu-Daudé wrote:
Invert the 'no_sdcard' logic, renaming it as the more explicit
"auto_create_sdcard". Machines are supposed to create a SD Card
drive when this flag is set. In many cases it doesn't make much
sense (as boards don't expose SD Card host controller),
On 04/02/2025 22.53, Richard Henderson wrote:
Require a 64-bit host binary to spawn a 64-bit guest.
Signed-off-by: Richard Henderson
---
meson.build | 9 +++--
1 file changed, 7 insertions(+), 2 deletions(-)
Reviewed-by: Thomas Huth
On 04/02/2025 21.09, Philippe Mathieu-Daudé wrote:
MachineClass::auto_create_sdcard is only useful to automatically
create a SD card, attach a IF_SD block drive to it and plug the
card onto a SD bus. None of the ARM machines modified by this
commit try to use the IF_SD interface.
Signed-off-by:
On 1/29/25 08:18, Cédric Le Goater wrote:
Hello,
This series updates the OpenBMC firmware images to the latest version
for existing tests and also adds 2 new tests for Aspeed machines which
were not tested before : witherspoon and bletchley.
Thanks,
C.
Cédric Le Goater (5):
tests/functiona
On 2/4/25 07:09, Jamin Lin wrote:
QEMU supports GICv3 Non-maskable Interrupt, adds to support Non-maskable
Interrupt for AST2700.
Reference:
https://github.com/qemu/qemu/commit/b36a32ead
Signed-off-by: Jamin Lin
Applied to aspeed-next.
Thanks,
C.
---
hw/arm/aspeed_ast27x0.c | 4
On Thu, Dec 19, 2024 at 02:51:21PM +0100, David Hildenbrand wrote:
> On 18.12.24 18:29, Daniel P. Berrangé wrote:
> > When a machine is first booted, all virtio balloon stats are initialized
> > to their default value -1 (18446744073709551615 when represented as
> > unsigned).
> >
> > They remain
Signed-off-by: Bernhard Beschow
---
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h| 11 +++
include/hw/timer/imx_gpt.h | 1 +
hw/arm/fsl-imx8mp.c| 53 ++
hw/timer/imx_gpt.c | 25
hw/arm/Kconf
While at it and since they are user-creatable, build them when
CONFIG_I2C_DEVICES is set.
Signed-off-by: Bernhard Beschow
---
hw/gpio/Kconfig | 10 ++
hw/misc/Kconfig | 8
2 files changed, 10 insertions(+), 8 deletions(-)
diff --git a/hw/gpio/Kconfig b/hw/gpio/Kconfig
index c4
The implementation just allows Linux to determine date and time.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS | 1 +
hw/rtc/rs5c372.c| 227
hw/rtc/Kconfig | 5 +
hw/rtc/meson.build | 1 +
hw/rtc/trace-events | 4 +
5 files
Signed-off-by: Bernhard Beschow
---
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h| 14 +
hw/arm/fsl-imx8mp.c| 55 ++
3 files changed, 70 insertions(+)
diff --git a/docs/system/arm/imx8mp-evk.rst b/docs/system/arm/imx8mp
Signed-off-by: Bernhard Beschow
---
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h| 11 +++
hw/arm/fsl-imx8mp.c| 29 +
hw/arm/Kconfig | 2 ++
4 files changed, 43 insertions(+)
diff --git a/docs/system/arm/im
This series adds a new aarch64 machine to QEMU: i.MX 8M Plus EVK [1]. It allows
for running Linux distributions such as Buildroot
(freescale_imx8mpevk_defconfig) and Arch Linux [2] via direct kernel boot.
U-Boot does not work yet. I plan to use this machine myself and I also want to
make it availab
Linux checks for the PLLs in the PHY to be locked, so implement a model
emulating that.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS | 2 +
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h | 10
include/hw/pci-host/fsl_imx8m_phy.h |
On 04.02.25 10:20, Daniel P. Berrangé wrote:
On Thu, Dec 19, 2024 at 02:51:21PM +0100, David Hildenbrand wrote:
On 18.12.24 18:29, Daniel P. Berrangé wrote:
When a machine is first booted, all virtio balloon stats are initialized
to their default value -1 (18446744073709551615 when represented
Fixes quite a few stack traces during the Linux boot process. Also provides the
clocks for devices added later, e.g. enet1.
Signed-off-by: Bernhard Beschow
---
MAINTAINERS | 2 +
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h | 4 +
include/hw/mi
Split the USB MMIO regions to better keep track of the implemented vs.
unimplemented regions.
Signed-off-by: Bernhard Beschow
---
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h| 12 +++
hw/arm/fsl-imx8mp.c| 37 --
hw/arm
The USDHC emulation allows for running real-world images such as those generated
by Buildroot. Convert the board documentation accordingly instead of running a
Linux kernel with ephemeral storage.
Signed-off-by: Bernhard Beschow
---
docs/system/arm/imx8mp-evk.rst | 16 +++-
include/h
Signed-off-by: Bernhard Beschow
---
docs/system/arm/imx8mp-evk.rst | 1 +
include/hw/arm/fsl-imx8mp.h| 7 +++
hw/arm/fsl-imx8mp.c| 28
hw/arm/Kconfig | 1 +
4 files changed, 37 insertions(+)
diff --git a/docs/system/arm/imx8mp-e
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