Re: [PATCH-for-9.1] target/mips: Fix execution mode in page_table_walk_refill()

2024-08-12 Thread Richard Henderson
On 8/12/24 15:35, Philippe Mathieu-Daudé wrote: On 12/8/24 02:48, Richard Henderson wrote: On 8/12/24 02:54, Philippe Mathieu-Daudé wrote: When refactoring page_table_walk_refill() in commit 4e999bf419 we replaced the execution mode and forced it to kernel mode. Restore the previous behavior to

[PULL 0/1] Net patches

2024-08-12 Thread Jason Wang
The following changes since commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23: Merge tag 'pull-nbd-2024-08-08' of https://repo.or.cz/qemu/ericb into staging (2024-08-09 08:40:37 +1000) are available in the Git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request for you

[PULL 1/1] net: Fix '-net nic,model=' for non-help arguments

2024-08-12 Thread Jason Wang
From: David Woodhouse Oops, don't *delete* the model option when checking for 'help'. Fixes: 64f75f57f9d2 ("net: Reinstate '-net nic, model=help' output as documented in man page") Reported-by: Hans Signed-off-by: David Woodhouse Cc: qemu-sta...@nongnu.org Reviewed-by: Michael Tokarev Signed

Re: [PATCH] net: Fix '-net nic,model=' for non-help arguments

2024-08-12 Thread Jason Wang
On Sun, Aug 11, 2024 at 3:40 PM Michael Tokarev wrote: > > 06.08.2024 20:21, David Woodhouse wrote: > > From: David Woodhouse > > > > Oops, don't *delete* the model option when checking for 'help'. > > > > Fixes: 64f75f57f9d2 ("net: Reinstate '-net nic, model=help' output as > > documented in ma

Re: [PATCH v2 17/17] tests/qtest: Add intel-iommu test

2024-08-12 Thread Thomas Huth
On 05/08/2024 08.27, Zhenzhong Duan wrote: Add the framework to test the intel-iommu device. Currently only tested cap/ecap bits correctness in scalable modern mode. Also tested cap/ecap bits consistency before and after system reset. Signed-off-by: Zhenzhong Duan Reviewed-by: Clément Mathieu-

Re: [PATCH 03/13] tests/avocado/intel_iommu.py: increase timeout

2024-08-12 Thread Eric Auger
Hi Cleber, On 8/1/24 03:02, Cleber Rosa wrote: > On Mon, Jul 29, 2024 at 6:30 AM Daniel P. Berrangé > wrote: >> On Fri, Jul 26, 2024 at 09:44:28AM -0400, Cleber Rosa wrote: >>> Based on many runs, the average run time for these 4 tests is around >>> 250 seconds, with 320 seconds being the ceilin

Re: [PATCH 1/1] qemu-options.hx: correct formatting -smbios type=4

2024-08-12 Thread Thomas Huth
On 29/07/2024 22.48, Heinrich Schuchardt wrote: processor-family and processor-id can be assigned independently. Add missing brackets. Fixes: b5831d79671c ("smbios: add processor-family option") Signed-off-by: Heinrich Schuchardt --- qemu-options.hx | 2 +- 1 file changed, 1 insertion(+), 1

Re: [PATCH 1/1] module: Prevent crash by resetting local_err in module_load_qom_all()

2024-08-12 Thread Alexander Ivanov
On 8/12/24 00:05, Richard Henderson wrote: On 8/9/24 22:13, Alexander Ivanov wrote: Set local_err to NULL after it has been freed in error_report_err(). This avoids triggering assert(*errp == NULL) failure in error_setv() when local_err is reused in the loop. Signed-off-by: Alexander Ivanov -

Re: [PATCH RFC V3 01/29] arm/virt,target/arm: Add new ARMCPU {socket,cluster,core,thread}-id property

2024-08-12 Thread Igor Mammedov
On Mon, 12 Aug 2024 14:35:56 +1000 Gavin Shan wrote: > On 6/14/24 9:36 AM, Salil Mehta wrote: > > This shall be used to store user specified > > topology{socket,cluster,core,thread} > > and shall be converted to a unique 'vcpu-id' which is used as slot-index > > during > > hot(un)plug of vCPU.

Re: [RFC PATCH v6 5/5] rust: add PL011 device model

2024-08-12 Thread Junjie Mao
On 8/8/2024 4:31 PM, Paolo Bonzini wrote: On 8/4/24 23:04, Manos Pitsidianakis wrote: [snip] Also in bilge's meson.build: +arbitrary_int_dep = subproject('arbitrary-int').get_variable('arbitrary_int_dep') +bilge_impl_dep = subproject('bilge-impl').get_variable('bilge_impl_dep') + +lib = st

Re: [PATCH 0/2] target/arm: Fix EL3-is-AArch32 mmu indexes

2024-08-12 Thread Bernhard Beschow
Am 9. August 2024 16:04:28 UTC schrieb Peter Maydell : >Our current usage of MMU indexes when EL3 is AArch32 is confused. >Architecturally, when EL3 is AArch32, all Secure code runs under the >Secure PL1&0 translation regime: > * code at EL3, which might be Mon, or SVC, or any of the > other p

[PATCH v2 0/1] module: Move local_err initialization to the loop in module_load_qom_all()

2024-08-12 Thread Alexander Ivanov
After updating QEMU modules previously executed QEMU processes crash on module loading. It happens because error_setg() calls with a not NULL errp argument. There is a discussion - https://issues.redhat.com/browse/RHEL-29848 Note: The commit subject was changed. Previously it was called "module:

[PATCH v2 1/1] module: Move local_err initialization to the loop in module_load_qom_all()

2024-08-12 Thread Alexander Ivanov
Move local_err initialization inside the loop in the module_load_qom_all() function. This change ensures that the error variable is reset to NULL for each iteration of the loop. This prevents triggering assert(*errp == NULL) failure in error_setv() when local_err is reused in the loop. Note: The l

[PATCH v2 0/2] target/ppc: Make divd[u] handler method decodetree compatible

2024-08-12 Thread Ilya Leoshkevich
v1: https://lore.kernel.org/qemu-devel/20240731100953.14950-1-...@linux.ibm.com/ v1 -> v2: Add R-bs and a targeted divd[u] patch. Hi, This series contains two fixes for the same issue: divd[u] touching uninitialized ctx->opcode. Patch 1 is a catch-all solution for all issues in this class. IMHO

[PATCH v2 1/2] target/ppc: Set ctx->opcode for decode_insn32()

2024-08-12 Thread Ilya Leoshkevich
divdu (without a dot) sometimes updates cr0, even though it shouldn't. The reason is that gen_op_arith_divd() checks Rc(ctx->opcode), which is not initialized. This field is initialized only for instructions that go through decode_legacy(), and not decodetree. There already was a similar issue fix

[PATCH v2 2/2] target/ppc: Make divd[u] handler method decodetree compatible

2024-08-12 Thread Ilya Leoshkevich
This is like commit 86e6202a57b1 ("target/ppc: Make divw[u] handler method decodetree compatible."), but for gen_op_arith_divd(). Suggested-by: Richard Henderson Signed-off-by: Ilya Leoshkevich --- target/ppc/translate.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target

Re: [PATCH v2 2/2] target/ppc: Make divd[u] handler method decodetree compatible

2024-08-12 Thread Richard Henderson
On 8/12/24 18:53, Ilya Leoshkevich wrote: This is like commit 86e6202a57b1 ("target/ppc: Make divw[u] handler method decodetree compatible."), but for gen_op_arith_divd(). Suggested-by: Richard Henderson Signed-off-by: Ilya Leoshkevich --- target/ppc/translate.c | 2 +- 1 file changed, 1 in

Re: [PATCH 8/8] qemu-options: Add the description of smp-cache object

2024-08-12 Thread Zhao Liu
Hi Markus, On Fri, Aug 09, 2024 at 02:24:48PM +0200, Markus Armbruster wrote: > Date: Fri, 09 Aug 2024 14:24:48 +0200 > From: Markus Armbruster > Subject: Re: [PATCH 8/8] qemu-options: Add the description of smp-cache > object > > I apologize for the delay. You're welcome! I appreciate your ti

Re: [PATCH v2 1/1] module: Move local_err initialization to the loop in module_load_qom_all()

2024-08-12 Thread Richard Henderson
On 8/12/24 18:57, Alexander Ivanov wrote: Move local_err initialization inside the loop in the module_load_qom_all() function. This change ensures that the error variable is reset to NULL for each iteration of the loop. This prevents triggering assert(*errp == NULL) failure in error_setv() when l

Re: [RFC PATCH v6 5/5] rust: add PL011 device model

2024-08-12 Thread Paolo Bonzini
On Mon, Aug 12, 2024 at 10:51 AM Junjie Mao wrote: > I tested that branch by a cross-build to aarch64 on an x86_64 machine (with > "./configure --cross-prefix=aarch64-linux-gnu- > --rust-target-triple=aarch64-unknown-linux-gnu"). To configure successfully, I > need to add "native: true" to every "

Re: [PATCH v3 4/4] target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs

2024-08-12 Thread Zhao Liu
On Fri, Aug 09, 2024 at 05:42:59AM -0400, EwanHai wrote: > Date: Fri, 9 Aug 2024 05:42:59 -0400 > From: EwanHai > Subject: [PATCH v3 4/4] target/i386: Mask CMPLegacy bit in > CPUID[0x8001].ECX for Zhaoxin CPUs > X-Mailer: git-send-email 2.34.1 > > Zhaoxin CPUs (including vendors "Shanghai" a

Re: [PATCH v5 6/7] acpi/ghes: add support for generic error injection via QAPI

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 20:19:03 +0200 Mauro Carvalho Chehab wrote: > Em Thu, 8 Aug 2024 10:11:07 +0200 > Igor Mammedov escreveu: > > > On Wed, 7 Aug 2024 15:25:47 +0100 > > Jonathan Cameron wrote: > > > > > On Tue, 6 Aug 2024 16:31:13 +0200 > > > Igor Mammedov wrote: > > > > > > > On Fri,

Re: [PULL 09/11] target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode

2024-08-12 Thread Peter Maydell
On Sun, 11 Aug 2024 at 22:36, Richard Henderson wrote: > > On 8/10/24 04:08, Peter Maydell wrote: > > From: Alex Richardson > > diff --git a/target/arm/helper.c b/target/arm/helper.c > > index 8fb4b474e83..94900667c33 100644 > > --- a/target/arm/helper.c > > +++ b/target/arm/helper.c > > @@ -5952

Re: [PATCH-for-9.1] target/mips: Fix execution mode in page_table_walk_refill()

2024-08-12 Thread Jiaxun Yang
在2024年8月11日八月 下午5:54,Philippe Mathieu-Daudé写道: > When refactoring page_table_walk_refill() in commit 4e999bf419 > we replaced the execution mode and forced it to kernel mode. > Restore the previous behavior to also get supervisor / user modes. > > Reported-by: Thomas Petazzoni > Reported-by: Wa

Re: [PATCH v3] kvm: replace fprintf with error_report/printf() in kvm_init()

2024-08-12 Thread Ani Sinha
On Fri, Aug 9, 2024 at 2:06 PM Philippe Mathieu-Daudé wrote: > > Hi Ani, > > On 9/8/24 08:49, Ani Sinha wrote: > > error_report() is more appropriate for error situations. Replace fprintf > > with > > error_report. Cosmetic. No functional change. > > > > CC: qemu-triv...@nongnu.org > > CC: zhao1.

Re: [PATCH v3] kvm: replace fprintf with error_report/printf() in kvm_init()

2024-08-12 Thread Ani Sinha
On Mon, 12 Aug, 2024, 3:23 pm Ani Sinha, wrote: > On Fri, Aug 9, 2024 at 2:06 PM Philippe Mathieu-Daudé > wrote: > > > > Hi Ani, > > > > On 9/8/24 08:49, Ani Sinha wrote: > > > error_report() is more appropriate for error situations. Replace > fprintf with > > > error_report. Cosmetic. No functi

Re: [PATCH v3 4/4] target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs

2024-08-12 Thread Ewan Hai
Thank you for your review!, I will udpate the commit message according to your suggestions to ensure it provides the most accurate information. On 8/12/24 05:52, Zhao Liu wrote: On Fri, Aug 09, 2024 at 05:42:59AM -0400, EwanHai wrote: Date: Fri, 9 Aug 2024 05:42:59 -0400 From: EwanHai Subject:

Re: [PATCH 02/18] tests/qapi-schema: Drop temporary 'prefix'

2024-08-12 Thread Thomas Huth
On 30/07/2024 10.10, Markus Armbruster wrote: Recent commit "qapi: Smarter camel_to_upper() to reduce need for 'prefix'" added a temporary 'prefix' to delay changing the generated code. Revert it. This changes TestUnionEnumA's generated enumeration constant prefix from TEST_UNION_ENUMA to TEST_

Re: [PATCH 09/18] qapi/machine: Rename CpuS390* to S390Cpu, and drop 'prefix'

2024-08-12 Thread Thomas Huth
On 30/07/2024 10.10, Markus Armbruster wrote: QAPI's 'prefix' feature can make the connection between enumeration type and its constants less than obvious. It's best used with restraint. CpuS390Entitlement has a 'prefix' to change the generated enumeration constants' prefix from CPU_S390_POLARI

Re: [PATCH v2 9/9] Avocado tests: allow for parallel execution of tests

2024-08-12 Thread Thomas Huth
On 06/08/2024 19.31, Cleber Rosa wrote: The updated Avocado version allows for the execution of tests in parallel. While on a CI environment it may not be a good idea to increase the parallelization level in a single runner, developers may leverage that on specific CI runners or on their develop

[PATCH v4 2/4] target/i386: Add CPUID leaf 0xC000_0001 EDX definitions

2024-08-12 Thread EwanHai
Add new CPUID feature flags for various Zhaoxin PadLock extensions. These definitions will be used for Zhaoxin CPU models. Signed-off-by: EwanHai Reviewed-by: Zhao Liu --- target/i386/cpu.h | 21 + 1 file changed, 21 insertions(+) diff --git a/target/i386/cpu.h b/target/i38

Re: [PATCH v2 2/9] tests/avocado: apply proper skipUnless decorator

2024-08-12 Thread Thomas Huth
On 06/08/2024 19.31, Cleber Rosa wrote: Commit 9b45cc993 added many cases of skipUnless for the sake of organizing flaky tests. But, Python decorators *must* follow what s/follow/directly precede/ ? Apart from that: Reviewed-by: Thomas Huth they decorate, so the newlines added should *not*

[PATCH v3 0/4] Add support for Zhaoxin Yongfeng CPU model and

2024-08-12 Thread EwanHai
This patch series introduces support for the Zhaoxin Yongfeng CPU model and includes improvements and updates specific to Zhaoxin CPUs (including vendor "Centaurhauls" and "Shanghai"). The changes ensure that QEMU can correctly identify and emulate Zhaoxin CPUs, accurately reflecting their function

[PATCH v4 1/4] target/i386: Add support for Zhaoxin CPU vendor identification

2024-08-12 Thread EwanHai
Zhaoxin currently uses two vendors: "Shanghai" and "Centaurhauls". It is important to note that the latter now belongs to Zhaoxin. Therefore, this patch replaces CPUID_VENDOR_VIA with CPUID_VENDOR_ZHAOXIN1. The previous CPUID_VENDOR_VIA macro was only defined but never used in QEMU, making this ch

[PATCH v4 4/4] target/i386: Mask CMPLegacy bit in CPUID[0x80000001].ECX for Zhaoxin CPUs

2024-08-12 Thread EwanHai
Zhaoxin CPUs (including vendors "Shanghai" and "Centaurhauls") handle the CMPLegacy bit similarly to Intel CPUs. Therefore, this commit masks the CMPLegacy bit in CPUID[0x8001].ECX for Zhaoxin CPUs, just as it is done for Intel CPUs. AMD uses the CMPLegacy bit (CPUID[0x8001].ECX.bit1) alon

[PATCH v4 3/4] target/i386: Introduce Zhaoxin Yongfeng CPU model

2024-08-12 Thread EwanHai
Introduce support for the Zhaoxin Yongfeng CPU model. The Zhaoxin Yongfeng CPU is Zhaoxin's latest server CPU. This new cpu model ensure that QEMU can correctly emulate the Zhaoxin Yongfeng CPU, providing accurate functionality and performance characteristics. Signed-off-by: EwanHai Reviewed-by:

Re: [PULL 1/1] net: Fix '-net nic,model=' for non-help arguments

2024-08-12 Thread Peter Maydell
On Mon, 12 Aug 2024 at 08:29, Jason Wang wrote: > > From: David Woodhouse > > Oops, don't *delete* the model option when checking for 'help'. > > Fixes: 64f75f57f9d2 ("net: Reinstate '-net nic, model=help' output as > documented in man page") > Reported-by: Hans > Signed-off-by: David Woodhouse

Re: [PULL 09/11] target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode

2024-08-12 Thread Peter Maydell
On Mon, 12 Aug 2024 at 10:39, Peter Maydell wrote: > > On Sun, 11 Aug 2024 at 22:36, Richard Henderson > wrote: > > > > On 8/10/24 04:08, Peter Maydell wrote: > > > From: Alex Richardson > > > diff --git a/target/arm/helper.c b/target/arm/helper.c > > > index 8fb4b474e83..94900667c33 100644 > >

Re: [PULL 1/1] net: Fix '-net nic,model=' for non-help arguments

2024-08-12 Thread David Woodhouse
On Mon, 2024-08-12 at 11:25 +0100, Peter Maydell wrote: > > Will this also fix > https://gitlab.com/qemu-project/qemu/-/issues/2496 ? Almost certainly, yes. smime.p7s Description: S/MIME cryptographic signature

Re: [PATCH] target/arm: add support for 64-bit PMCCNTR in AArch32 mode

2024-08-12 Thread Peter Maydell
On Thu, 8 Aug 2024 at 14:03, Peter Maydell wrote: > > On Fri, 2 Aug 2024 at 02:00, Alex Richardson > wrote: > > > > See > > https://developer.arm.com/documentation/ddi0601/2024-06/AArch32-Registers/PMCCNTR--Performance-Monitors-Cycle-Count-Register?lang=en > > > > Signed-off-by: Alex Richardson

Re: [PULL 09/11] target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode

2024-08-12 Thread Alex Bennée
Peter Maydell writes: > On Sun, 11 Aug 2024 at 22:36, Richard Henderson > wrote: >> >> On 8/10/24 04:08, Peter Maydell wrote: >> > From: Alex Richardson >> > diff --git a/target/arm/helper.c b/target/arm/helper.c >> > index 8fb4b474e83..94900667c33 100644 >> > --- a/target/arm/helper.c >> > +++

Re: [PATCH v6 01/10] acpi/generic_event_device: add an APEI error device

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:26:27 +0200 Mauro Carvalho Chehab wrote: > Adds a generic error device to handle generic hardware error > events as specified at ACPI 6.5 specification at 18.3.2.7.2: > https://uefi.org/specs/ACPI/6.5/18_Platform_Error_Interfaces.html#event-notification-for-generic-error-so

Re: [PATCH v6 02/10] arm/virt: Wire up a GED error device for ACPI / GHES

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:26:28 +0200 Mauro Carvalho Chehab wrote: > Adds support to ARM virtualization to allow handling > generic error ACPI Event via GED & error source device. > > It is aligned with Linux Kernel patch: > https://lore.kernel.org/lkml/1272350481-27951-8-git-send-email-ying.hu...@

Re: [PATCH v6 03/10] acpi/ghes: Add support for GED error device

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:26:29 +0200 Mauro Carvalho Chehab wrote: > From: Jonathan Cameron > > As a GED error device is now defined, add another type > of notification. > > Add error notification to GHES v2 using a GED error device GED > triggered via interrupt. > > [mchehab: do some cleanups a

Re: [PULL 09/11] target/arm: add support for PMUv3 64-bit PMCCNTR in AArch32 mode

2024-08-12 Thread Peter Maydell
On Mon, 12 Aug 2024 at 12:10, Alex Bennée wrote: > > Peter Maydell writes: > > > On Sun, 11 Aug 2024 at 22:36, Richard Henderson > > wrote: > >> > >> On 8/10/24 04:08, Peter Maydell wrote: > >> > From: Alex Richardson > >> > diff --git a/target/arm/helper.c b/target/arm/helper.c > >> > index 8f

Re: [PATCH v6 04/10] qapi/ghes-cper: add an interface to do generic CPER error injection

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:26:30 +0200 Mauro Carvalho Chehab wrote: > Creates a QMP command to be used for generic ACPI APEI hardware error > injection (HEST) via GHESv2. > > The actual GHES code will be added at the followup patch. > > Signed-off-by: Mauro Carvalho Chehab > Signed-off-by: Shiju J

Re: [PATCH v6 07/10] docs: acpi_hest_ghes: fix documentation for CPER size

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:26:33 +0200 Mauro Carvalho Chehab wrote: > While the spec defines a CPER size of 4KiB for each record, > currently it is set to 1KiB. Fix the documentation and add > a pointer to the macro name there, as this may help to keep > it updated. > > Signed-off-by: Mauro Carvalho

Re: [PATCH v6 09/10] target/arm: add an experimental mpidr arm cpu property object

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:26:35 +0200 Mauro Carvalho Chehab wrote: > Accurately injecting an ARM Processor error ACPI/APEI GHES > error record requires the value of the ARM Multiprocessor > Affinity Register (mpidr). > > While ARM implements it, this is currently not visible. > > Add a field at CP

[PULL v2 00/10] target-arm queue

2024-08-12 Thread Peter Maydell
e/pmaydell/qemu-arm.git tags/pull-target-arm-20240812 for you to fetch changes up to ed5031ad5d4c4c3b6eee6ab21aa95ccfc9dffdd4: arm/virt: place power button pin number on a define (2024-08-12 11:40:16 +0100) * Fix BTI versu

Re: [PATCH v6 00/10] Add ACPI CPER firmware first error injection on ARM emulation

2024-08-12 Thread Igor Mammedov
On Thu, 8 Aug 2024 14:57:35 +0200 Mauro Carvalho Chehab wrote: > Em Thu, 8 Aug 2024 14:26:26 +0200 > Mauro Carvalho Chehab escreveu: > > > v6: > > - PNP0C33 device creation moved to aml-build.c; > > - acpi_ghes record functions now use ACPI notify parameter, > > instead of source ID; > > - t

[PATCH 1/1] virtio-pci: return RAM device MR when set host notifier success

2024-08-12 Thread Gao Shiyuan via
When vhost-user backend register memory region based host notifiers, we should return RAM device MR of notify region MR's subregion in virtio_address_space_lookup. In seabios, it will use virtio PCI Configration Access Capability access notify region when assign notify region above 4GB. This will

Re: [PATCH v2 2/3] hw/dma: xilinx_axidma: Send DMA error IRQ if any memory access is failed

2024-08-12 Thread Jim Shu
On Thu, Aug 8, 2024 at 9:34 PM Peter Maydell wrote: > > On Thu, 1 Aug 2024 at 15:08, Jim Shu wrote: > > > > The memory transactions from DMA could have bus-error in some cases. If > > it is failed, DMA device should send error IRQs. > > > > Signed-off-by: Jim Shu > > --- > > hw/dma/trace-events

[PATCH v1 00/10] xen: pvh: Partial QOM:fication with new x86 PVH machine

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" This series breaks-out parts of the ARM PVH support into a reusable QOM module. There's a bit of refactoring and some bug-fixes along the way. Finally we add a new x86 xen-pvh machine using the new xen-pvh-common module. The corresponding changes Xen for PVH x86 are wo

[PATCH v1 01/10] MAINTAINERS: Add docs/system/arm/xenpvh.rst

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 10af212632..a24c2e14d9 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -559,6 +559,7 @@ F: include/hw/xen/ F: include/sysemu/xen.h F: in

[PATCH v1 06/10] hw/arm: xenpvh: Rename xen_arm.c -> xen-pvh.c

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Rename xen_arm.c -> xen-pvh.c to better express that this is a PVH machine and to align with x86 HVM and future PVH machine filenames: hw/i386/xen/xen-hvm.c hw/i386/xen/xen-pvh.c (in preparation) No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/arm/meso

[PATCH v1 08/10] hw/xen: pvh-common: Add support for creating PCIe/GPEX

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Add support for optionally creating a PCIe/GPEX controller. Signed-off-by: Edgar E. Iglesias --- hw/xen/xen-pvh-common.c | 66 + include/hw/xen/xen-pvh-common.h | 10 - 2 files changed, 75 insertions(+), 1 deletion(-) diff

[PATCH v1 07/10] hw/arm: xenpvh: Reverse virtio-mmio creation order

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" We've been creating the virtio-mmio devices in forwards order but since the qbus lists prepend (rather than append) entries, the virtio busses end up with decreasing base address order. Xen enables virtio-mmio nodes in forwards order so there's been a missmatch. So far,

Re: [PATCH 12/17] target/arm: Convert handle_vec_simd_shri to decodetree

2024-08-12 Thread Peter Maydell
On Wed, 17 Jul 2024 at 07:11, Richard Henderson wrote: > > This includes SSHR, USHR, SSRA, USRA, SRSHR, URSHR, SRSRA, URSRA, SRI. > > Signed-off-by: Richard Henderson > --- > target/arm/tcg/translate-a64.c | 109 +++-- > target/arm/tcg/a64.decode | 27 +++- >

[PATCH v1 02/10] hw/arm: xenpvh: Update file header to use SPDX

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Update file header to use SPDX and remove stray empty comment line. No functional changes. Signed-off-by: Edgar E. Iglesias --- hw/arm/xen_arm.c | 19 +-- 1 file changed, 1 insertion(+), 18 deletions(-) diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.

[PATCH v1 04/10] hw/arm: xenpvh: Add support for SMP guests

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Add SMP support for Xen PVH ARM guests. Create max_cpus ioreq servers to handle hotplug. Signed-off-by: Edgar E. Iglesias --- hw/arm/xen_arm.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.c index 5f75cc3779

[PATCH v1 10/10] docs/system/i386: xenpvh: Add a basic description

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Signed-off-by: Edgar E. Iglesias --- MAINTAINERS | 1 + docs/system/i386/xenpvh.rst | 49 + docs/system/target-i386.rst | 1 + 3 files changed, 51 insertions(+) create mode 100644 docs/system/i386/xenpvh.rst diff

[PATCH v1 09/10] hw/i386/xen: Add a Xen PVH x86 machine

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" This adds a Xen PVH x86 machine based on the PVH Common module used by the ARM PVH machine. Signed-off-by: Edgar E. Iglesias --- hw/i386/xen/meson.build | 1 + hw/i386/xen/xen-pvh.c | 196 2 files changed, 197 insertions(+)

[PATCH v1 05/10] hw/arm: xenpvh: Break out a common PVH module

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Break out a common Xen PVH module in preparation for adding a x86 Xen PVH Machine. Signed-off-by: Edgar E. Iglesias --- hw/arm/trace-events | 5 - hw/arm/xen_arm.c| 154 ++ hw/xen/meson.build | 1 +

[PATCH v1 03/10] hw/arm: xenpvh: Tweak machine description

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Tweak machine description to better express that this is a Xen PVH machine for ARM. Signed-off-by: Edgar E. Iglesias --- hw/arm/xen_arm.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/arm/xen_arm.c b/hw/arm/xen_arm.c index 766a194fa1..5f75cc37

Re: [PATCH v3 4/5] machine/nitro-enclave: Add built-in Nitro Secure Module device

2024-08-12 Thread Alexander Graf
On 10.08.24 18:45, Dorjoy Chowdhury wrote: AWS Nitro Enclaves have built-in Nitro Secure Module (NSM) device which is used for stripped down TPM functionality like attestation. This commit adds the built-in NSM device in the nitro-enclave machine type. In Nitro Enclaves, all the PCRs start in a

Re: [PATCH v3 4/5] machine/nitro-enclave: Add built-in Nitro Secure Module device

2024-08-12 Thread Alexander Graf
On 10.08.24 18:45, Dorjoy Chowdhury wrote: AWS Nitro Enclaves have built-in Nitro Secure Module (NSM) device which is used for stripped down TPM functionality like attestation. This commit adds the built-in NSM device in the nitro-enclave machine type. In Nitro Enclaves, all the PCRs start in a

Re: [PATCH v3 1/5] machine/nitro-enclave: New machine type for AWS Nitro Enclaves

2024-08-12 Thread Alexander Graf
On 10.08.24 18:44, Dorjoy Chowdhury wrote: AWS nitro enclaves[1] is an Amazon EC2[2] feature that allows creating isolated execution environments, called enclaves, from Amazon EC2 instances which are used for processing highly sensitive data. Enclaves have no persistent storage and no external n

Re: [PATCH v3 4/5] machine/nitro-enclave: Add built-in Nitro Secure Module device

2024-08-12 Thread Daniel P . Berrangé
On Mon, Aug 12, 2024 at 03:51:22PM +0200, Alexander Graf wrote: > > On 10.08.24 18:45, Dorjoy Chowdhury wrote: > > AWS Nitro Enclaves have built-in Nitro Secure Module (NSM) device which > > is used for stripped down TPM functionality like attestation. This commit > > adds the built-in NSM device

Re: [PATCH v2 2/2] target/ppc: Make divd[u] handler method decodetree compatible

2024-08-12 Thread Philippe Mathieu-Daudé
On 12/8/24 10:53, Ilya Leoshkevich wrote: This is like commit 86e6202a57b1 ("target/ppc: Make divw[u] handler method decodetree compatible."), but for gen_op_arith_divd(). Suggested-by: Richard Henderson Signed-off-by: Ilya Leoshkevich --- target/ppc/translate.c | 2 +- 1 file changed, 1 in

Re: [PATCH v3 4/5] machine/nitro-enclave: Add built-in Nitro Secure Module device

2024-08-12 Thread Daniel P . Berrangé
On Sat, Aug 10, 2024 at 10:45:01PM +0600, Dorjoy Chowdhury wrote: > AWS Nitro Enclaves have built-in Nitro Secure Module (NSM) device which > is used for stripped down TPM functionality like attestation. This commit > adds the built-in NSM device in the nitro-enclave machine type. > > In Nitro Enc

Re: [PATCH 00/17] target/arm: AdvSIMD decodetree conversion, part 4

2024-08-12 Thread Peter Maydell
On Sun, 11 Aug 2024 at 18:41, Michael Tokarev wrote: > > 17.07.2024 09:08, Richard Henderson wrote: > > Flush before the queue gets too big. > > Also, there's a bug fix in patch 14. > > Hi! > > Has this patchset (together with the bugfix) been forgotten? > Maybe we should include at least the bug

Re: [PATCH v3 3/5] device/virtio-nsm: Support for Nitro Secure Module device

2024-08-12 Thread Daniel P . Berrangé
On Sat, Aug 10, 2024 at 10:45:00PM +0600, Dorjoy Chowdhury wrote: > Nitro Secure Module (NSM)[1] device is used in AWS Nitro Enclaves for > stripped down TPM functionality like cryptographic attestation. The > requests to and responses from NSM device are CBOR[2] encoded. > > This commit adds supp

Re: [PATCH v3 2/5] machine/nitro-enclave: Add vhost-user-vsock device

2024-08-12 Thread Daniel P . Berrangé
On Sat, Aug 10, 2024 at 10:44:59PM +0600, Dorjoy Chowdhury wrote: > AWS Nitro Enclaves have built-in vhost-vsock device support which > enables applications in enclave VMs to communicate with the parent > EC2 VM over vsock. The enclave VMs have dynamic CID while the parent > always has CID 3. In QE

[PATCH v1 1/1] block/file-posix: Avoid maybe-uninitialized warning

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Avoid a maybe-uninitialized warning in raw_refresh_zoned_limits() by initializing zoned. With GCC 14.1.0: In function ‘raw_refresh_zoned_limits’, inlined from ‘raw_refresh_limits’ at ../qemu/block/file-posix.c:1522:5: ../qemu/block/file-posix.c:1405:17: error: ‘zone

[PATCH v1 0/1] block/file-posix: Avoid maybe-uninitialized warning

2024-08-12 Thread Edgar E. Iglesias
From: "Edgar E. Iglesias" Hi, I ran into the following build-warning when building QEMU with GCC 14.1.0: [925/1857] Compiling C object libblock.a.p/block_file-posix.c.o FAILED: libblock.a.p/block_file-posix.c.o aarch64-poky-linux-gcc -mcpu=cortex-a57+crc -mbranch-protection=standard -fstack-pr

Re: [PULL 5/5] nbd/server: CVE-2024-7409: Close stray clients at server-stop

2024-08-12 Thread Eric Blake
On Sun, Aug 11, 2024 at 11:02:52AM GMT, Michael Tokarev wrote: > 09.08.2024 00:53, Eric Blake wrote: > > A malicious client can attempt to connect to an NBD server, and then > > intentionally delay progress in the handshake, including if it does > > not know the TLS secrets. Although the previous

Re: [PATCH] hvf: arm: Allow creating VMs with > 63GB of RAM on macOS 15+

2024-08-12 Thread Peter Maydell
On Fri, 19 Jul 2024 at 00:03, Danny Canter wrote: > > This patch's main focus is to enable creating VMs with > 63GB > of RAM on Apple Silicon machines by using some new HVF APIs. In > pursuit of this a couple of things related to how we handle the > physical address range we expose to guests were

Re: [PATCH 00/17] target/arm: AdvSIMD decodetree conversion, part 4

2024-08-12 Thread Peter Maydell
On Wed, 17 Jul 2024 at 07:09, Richard Henderson wrote: > > Flush before the queue gets too big. > Also, there's a bug fix in patch 14. > > r~ > > Richard Henderson (17): > target/arm: Use tcg_gen_extract2_i64 for EXT > target/arm: Convert EXT to decodetree > target/arm: Convert TBL, TBX to d

Re: [RFC PATCH 03/23] scripts: add script to generate C header files from SVD XML files

2024-08-12 Thread Peter Maydell
On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote: > > From: Stefan Stanacar > > From: Stefan Stanacar > > The CMSIS System View Description format(CMSIS-SVD) is an XML based > description of Arm Cortex-M microcontrollers provided and maintained > by sillicon vendors. It includes details such

Re: [RFC PATCH 05/23] hw: add register access utility functions

2024-08-12 Thread Peter Maydell
On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote: > > Add register access utility functions for device models, like checking > aligned access and reading and writing to a register backstore. > Signed-off-by: Octavian Purdila > --- > include/hw/regs.h | 89 +++

Re: [PULL 10/11] crypto: push error reporting into TLS session I/O APIs

2024-08-12 Thread Thomas Huth
On 24/07/2024 11.47, Daniel P. Berrangé wrote: The current TLS session I/O APIs just return a synthetic errno value on error, which has been translated from a gnutls error value. This looses a large amount of valuable information that distinguishes different scenarios. Pushing population of the

Re: [PATCH] block/blkio: use FUA flag on write zeroes only if supported

2024-08-12 Thread Stefan Hajnoczi
On Thu, Aug 08, 2024 at 10:05:45AM +0200, Stefano Garzarella wrote: > libblkio supports BLKIO_REQ_FUA with write zeros requests only since > version 1.4.0, so let's inform the block layer that the blkio driver > supports it only in this case. Otherwise we can have runtime errors > as reported in ht

Re: [PULL 10/11] crypto: push error reporting into TLS session I/O APIs

2024-08-12 Thread Daniel P . Berrangé
On Mon, Aug 12, 2024 at 05:38:41PM +0200, Thomas Huth wrote: > On 24/07/2024 11.47, Daniel P. Berrangé wrote: > > The current TLS session I/O APIs just return a synthetic errno > > value on error, which has been translated from a gnutls error > > value. This looses a large amount of valuable inform

Re: [PATCH v2 1/1] module: Move local_err initialization to the loop in module_load_qom_all()

2024-08-12 Thread Claudio Fontana
Reviewed-by: Claudio Fontana On 8/12/24 10:57, Alexander Ivanov wrote: > Move local_err initialization inside the loop in the module_load_qom_all() > function. This change ensures that the error variable is reset to NULL for > each iteration of the loop. This prevents triggering assert(*errp == N

[PULL 1/1] block/blkio: use FUA flag on write zeroes only if supported

2024-08-12 Thread Stefan Hajnoczi
From: Stefano Garzarella libblkio supports BLKIO_REQ_FUA with write zeros requests only since version 1.4.0, so let's inform the block layer that the blkio driver supports it only in this case. Otherwise we can have runtime errors as reported in https://issues.redhat.com/browse/RHEL-32878 Fixes:

[PULL 0/1] Block patches

2024-08-12 Thread Stefan Hajnoczi
The following changes since commit 0f397dcfecc9211d12c2c720c01eb32f0eaa7d23: Merge tag 'pull-nbd-2024-08-08' of https://repo.or.cz/qemu/ericb into staging (2024-08-09 08:40:37 +1000) are available in the Git repository at: https://gitlab.com/stefanha/qemu.git tags/block-pull-request for yo

Re: [RFC PATCH 00/23] NXP i.MX RT595, ARM SVD and device model unit tests

2024-08-12 Thread Peter Maydell
On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote: > It also introduces unit tests for device models. To allow accessing > registers from unit tests a system bus mock is created. The main > advantage of unit tests for device models over QTest is that device > models can be tested in isolation an

Re: [RFC PATCH 00/23] NXP i.MX RT595, ARM SVD and device model unit tests

2024-08-12 Thread Daniel P . Berrangé
On Mon, Aug 12, 2024 at 05:10:52PM +0100, Peter Maydell wrote: > On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote: > > It also introduces unit tests for device models. To allow accessing > > registers from unit tests a system bus mock is created. The main > > advantage of unit tests for device

[PATCH RFC/RFT] vfio/pci-quirks: Quirk for ath wireless

2024-08-12 Thread Alex Williamson
These devices have an embedded interrupt controller which is programmed with guest physical MSI address/data, which doesn't work. We need vfio-pci kernel support to provide a device feature which disables virtualization of the MSI capability registers. Then we can do brute force testing for write

Re: [PATCH v3 01/20] accel/tcg: restrict assert on icount_enabled to qemu-system

2024-08-12 Thread Deepak Gupta
On Wed, Aug 07, 2024 at 10:48:56AM +1000, Richard Henderson wrote: On 8/7/24 10:06, Deepak Gupta wrote: commit 16ad9788 [1] restricted icount to qemu-system only. Although assert in `cpu_loop_exec_tb` is on `icount_enabled()` which is 0 when its qemu-user and debug build starts asserting. Move a

Re: [RFC PATCH 03/23] scripts: add script to generate C header files from SVD XML files

2024-08-12 Thread Octavian Purdila
On Mon, Aug 12, 2024 at 8:27 AM Peter Maydell wrote: > Hi Peter, Thanks for the review! > On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote: > > > > From: Stefan Stanacar > > > > From: Stefan Stanacar > > > > The CMSIS System View Description format(CMSIS-SVD) is an XML based > > descript

Re: [PATCH v2 1/2] qdev-monitor: avoid QemuOpts in QMP device_add

2024-08-12 Thread Stefan Hajnoczi
On Fri, Aug 02, 2024 at 10:01:20AM +0200, Markus Armbruster wrote: > Stefan Hajnoczi writes: > > > The QMP device_add monitor command converts the QDict arguments to > > QemuOpts and then back again to QDict. This process only supports scalar > > types. Device properties like virtio-blk-pci's iot

Re: [PATCH 1/6] qapi/char: Supply missing member documentation

2024-08-12 Thread John Snow
On Fri, Aug 9, 2024 at 5:12 AM Markus Armbruster wrote: > Philippe Mathieu-Daudé writes: > > > Hi Markus, > > > > On 8/8/24 20:26, Markus Armbruster wrote: > >> Since we neglect to document several members of ChardevBackendKind, > >> their description in the QEMU QMP Reference manual is "Not > >

Re: [PATCH v2 0/2] qdev-monitor: avoid QemuOpts in QMP device_add

2024-08-12 Thread Stefan Hajnoczi
On Fri, Aug 02, 2024 at 10:10:43AM +0200, Markus Armbruster wrote: > Can we additionally cut out the QemuOpts middleman in > usbback_portid_add()? > > qdict = qdict_new(); > qdict_put_str(qdict, "driver", "usb-host"); > tmp = g_strdup_printf("%s.0", usbif->xendev.qdev.id); > qdict_

Re: [PATCH V1 0/8] Live update: vfio

2024-08-12 Thread Steven Sistare
Hi all, any comments or RBs? This should be a slam dunk. Alex reviewed 9 versions of this code and all feedback has been incorporated. The only significant change in this version is the addition of support for the two container types: legacy and iommufd. - Steve On 7/9/2024 4:58 PM, Steve Sis

Re: [PATCH] dma-helpers: Fix iovec alignment

2024-08-12 Thread John Snow
On Tue, Apr 16, 2024 at 7:54 AM Stefan Fritsch wrote: > adding John Snow to CC because he investigated this in 2020. > > On Fri, 12 Apr 2024, Eric Blake wrote: > > > On Fri, Apr 12, 2024 at 10:06:17AM +0200, Stefan Fritsch wrote: > > > Commit 99868af3d0 changed the hardcoded constant BDRV_SECTOR_

Re: [PATCH V2 01/11] machine: alloc-anon option

2024-08-12 Thread Steven Sistare
On 8/8/2024 2:32 PM, Steven Sistare wrote: On 7/29/2024 8:29 AM, Igor Mammedov wrote: On Sat, 20 Jul 2024 16:28:25 -0400 Steven Sistare wrote: On 7/16/2024 5:19 AM, Igor Mammedov wrote: On Sun, 30 Jun 2024 12:40:24 -0700 Steve Sistare wrote: Allocate anonymous memory using mmap MAP_ANON or

Re: [RFC PATCH 00/23] NXP i.MX RT595, ARM SVD and device model unit tests

2024-08-12 Thread Octavian Purdila
On Mon, Aug 12, 2024 at 9:22 AM Daniel P. Berrangé wrote: > > On Mon, Aug 12, 2024 at 05:10:52PM +0100, Peter Maydell wrote: > > On Mon, 5 Aug 2024 at 21:17, Octavian Purdila wrote: > > > It also introduces unit tests for device models. To allow accessing > > > registers from unit tests a system

Re: [RFC V1 2/7] migration: skip dirty memory tracking for cpr

2024-08-12 Thread Fabiano Rosas
Steve Sistare writes: > CPR preserves memory in place, so there is no need to track dirty memory. > By skipping it, CPR can support devices that do not support tracking. > > Signed-off-by: Steve Sistare > --- > system/memory.c | 11 +++ > 1 file changed, 11 insertions(+) > > diff --git

Re: [PATCH v2 1/1] module: Move local_err initialization to the loop in module_load_qom_all()

2024-08-12 Thread Michael Tokarev
12.08.2024 11:57, Alexander Ivanov wrote: Move local_err initialization inside the loop in the module_load_qom_all() function. This change ensures that the error variable is reset to NULL for each iteration of the loop. This prevents triggering assert(*errp == NULL) failure in error_setv() when l

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