Fabiano Rosas writes:
> From: Peter Xu
>
> Peter missed the Sphinx HMP document for the "resume/-r" flag in commit
> 7a4da28b26 ("qmp: hmp: add migrate "resume" option"). Add it. Avoid
> adding a Fixes to make life easier for the stable maintainer.
>
> When at it, slightly cleanup the lines, m
Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
riscv64 in debian has been non-functioning for almost a year, after the
architecture has been promoted to release architecture and all binary
packages started to
On 03/05/24 10:22, Nicholas Piggin wrote:
On Sat Apr 27, 2024 at 12:32 AM AEST, Cédric Le Goater wrote:
On 4/26/24 13:00, Aditya Gupta wrote:
Make Power11 as default cpu type for 'pseries' and 'powernv' machine type,
with Power11 being the newest supported Power processor in QEMU.
This is too
Since v1:
- Split complex patch 4 in 5 simpler ones (Phil)
Implement pc-relative tcg code generation.
Philippe Mathieu-Daudé (1):
target/alpha: Simplify gen_bcond_internal()
Richard Henderson (8):
target/alpha: Use cpu_env in preference to ALPHA_CPU
target/alpha: Hoist branch shift to init
From: Richard Henderson
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target/alpha/translate.c b/target/alpha/translate.c
index a
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-Id: <20240424234436.995410-4-richard.hender...@linaro.org>
[PMD: Split bigger patch, part 5/5]
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 51 +---
1 file changed, 16 i
From: Richard Henderson
Prepare for pcrel by not modifying cpu_pc before use,
in the case of JSR.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 41 ++--
1 file chan
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-Id: <20240424234436.995410-4-richard.hender...@linaro.org>
[PMD: Split bigger patch, part 1/5]
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
diff -
Richard Henderson explained on IRC:
bcond_internal() used to insist that both branch
destination and branch fallthrough are use_goto_tb;
if not, we'd use movcond to compute an indirect jump.
But it's perfectly fine for e.g. the branch fallthrough
to use_goto_tb, and the branch destinatio
From: Richard Henderson
Trivial change to make next commits easier to understand.
Signed-off-by: Richard Henderson
Message-Id: <20240424234436.995410-4-richard.hender...@linaro.org>
[PMD: Split bigger patch, part 3/5]
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 9
From: Richard Henderson
Inline DISAS_PC_UPDATED switch case from alpha_tr_tb_stop():
switch (ctx->base.is_jmp) {
...
case DISAS_PC_UPDATED:
tcg_gen_lookup_and_goto_ptr();
break;
Signed-off-by: Richard Henderson
Message-Id: <20240424234436.995410-4-richard.hender...@
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/cpu.c | 23 ++-
target/alpha/translate.c | 29 +
2 files changed, 47 insertions(+), 5 deletions(-)
diff --git a/target/alpha/cp
From: Richard Henderson
ALPHA_CPU has a dynamic object type assert, which is
unnecessary considering that these are all class hooks.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/cpu.c| 15 ++-
targ
On 3/5/24 09:20, Philippe Mathieu-Daudé wrote:
From: Richard Henderson
Signed-off-by: Richard Henderson
Message-Id: <20240424234436.995410-4-richard.hender...@linaro.org>
[PMD: Split bigger patch, part 5/5]
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/translate.c | 51
On 3/5/24 09:20, Philippe Mathieu-Daudé wrote:
From: Richard Henderson
Signed-off-by: Richard Henderson
Signed-off-by: Philippe Mathieu-Daudé
---
target/alpha/cpu.c | 23 ++-
target/alpha/translate.c | 29 +
2 files changed, 47 inserti
On 2/5/24 17:53, Paolo Bonzini wrote:
Only FWCfgState is used as part of APIs such as acpi_ghes_add_fw_cfg.
Everything else need not be in typedefs.h.
Signed-off-by: Paolo Bonzini
---
include/hw/nvram/fw_cfg.h | 2 ++
include/qemu/typedefs.h | 3 ---
2 files changed, 2 insertions(+), 3 de
On 2/5/24 17:53, Paolo Bonzini wrote:
It is needed in very few places, which already depend on other parts of
qdev-core.h files. The benefit of having it in typedefs.h is small.
Signed-off-by: Paolo Bonzini
---
include/hw/qdev-core.h | 1 +
include/qemu/typedefs.h | 1 -
2 files changed,
On 2/5/24 17:53, Paolo Bonzini wrote:
Exactly nobody needs them there. Place the typedef in the header
that defines the struct.
Signed-off-by: Paolo Bonzini
---
include/qemu/typedefs.h | 2 --
include/sysemu/numa.h | 8
2 files changed, 4 insertions(+), 6 deletions(-)
Reviewed
On 2/5/24 17:53, Paolo Bonzini wrote:
Basically all uses of GraphicHwOps are defining an instance of it, which
requires the
full definition of the struct. It is pointless to have it in typedefs.h.
Signed-off-by: Paolo Bonzini
---
hw/display/vga_int.h| 1 +
include/qemu/typedefs.h | 1 -
On 2024/05/02 4:52, Dmitry Osipenko wrote:
On 5/1/24 22:38, Dmitry Osipenko wrote:
On 5/1/24 22:31, Dmitry Osipenko wrote:
On 4/27/24 10:12, Akihiko Odaki wrote:
int virtio_gpu_virgl_get_num_capsets(VirtIOGPU *g)
{
uint32_t capset2_max_ver, capset2_max_size;
+
+ if (g->capset_i
On 03/05/2024 09.16, Michael Tokarev wrote:
Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
riscv64 in debian has been non-functioning for almost a year, after the
architecture has been promoted to release ar
On Thu, May 02, 2024 at 11:54:15PM +0300, Michael Tokarev wrote:
> 02.05.2024 23:41, Richard Henderson wrote:
> > On 5/2/24 13:08, Michael Tokarev wrote:
> > > This thing works now with sid/unstable, this is what this patch is about.
> >
> > It worked when first introduced, then failed, then worke
On Fri, May 03, 2024 at 10:16:34AM +0300, Michael Tokarev wrote:
> Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
> This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
>
> riscv64 in debian has been non-functioning for almost a year, after the
> architecture ha
On Tue, Apr 23, 2024 at 3:16 PM Paolo Bonzini wrote:
>
> Some boards, notably ARM boards that use TCG, are already using
> "default y". This was done to remove TCG-only boards from
> a KVM-only build in commit 29d9efca16 (2023-04-26).
>
> This series converts all other boards to that, so that the
On 02/05/2024 07.44, Richard Henderson wrote:
Update from the PoO 14th edition.
Signed-off-by: Richard Henderson
---
target/s390x/cpu.h | 18 +++---
target/s390x/tcg/misc_helper.c | 2 +-
2 files changed, 12 insertions(+), 8 deletions(-)
Reviewed-by: Thomas Huth
On 2/5/24 17:53, Paolo Bonzini wrote:
MonitorDef is defined by hmp-target.h, and all users except one already
include it; the reason why the stubs do not include it, is because
hmp-target.h currently can only be used in files that are compiled
per target. However, that is easily fixed. Because
On 2/5/24 17:53, Paolo Bonzini wrote:
Using QemuLockable almost always requires going through QEMU_MAKE_LOCKABLE().
Therefore, there is little point in having the typedef always present. Move
it to lockable.h, with only a small adjustment to coroutine.h (which has
a tricky co-dependency with loc
On 2/5/24 17:53, Paolo Bonzini wrote:
Move it to the existing "PIC related things" header, hw/intc/i8259.h.
Signed-off-by: Paolo Bonzini
---
include/hw/intc/i8259.h | 2 ++
include/qemu/typedefs.h | 1 -
2 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/hw/intc/i8259.h b
On 2/5/24 17:53, Paolo Bonzini wrote:
Exactly nobody needs it there. Place the typedef in the header
that defines the struct.
Signed-off-by: Paolo Bonzini
---
include/net/announce.h | 4 ++--
include/qemu/typedefs.h | 1 -
2 files changed, 2 insertions(+), 3 deletions(-)
Reviewed-by: Ph
On 2/5/24 17:53, Paolo Bonzini wrote:
It is defined and referred to exclusively from a .c file.
Ahah what a shame :)
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Paolo Bonzini
---
include/qemu/typedefs.h | 1 -
migration/postcopy-ram.c | 4 ++--
2 files changed, 2 insertions(+),
On 2/5/24 17:53, Paolo Bonzini wrote:
QemuOpt is basically an internal data structure. It has no business
being defined except if you need functions from include/qemu/option.h.
Signed-off-by: Paolo Bonzini
---
include/qemu/option.h | 2 ++
include/qemu/typedefs.h | 1 -
2 files changed,
Together with the series at
https://patchew.org/QEMU/20240423131612.28362-1-pbonz...@redhat.com/,
this allows adding sparc-softmmu to the target list of the
build-without-defaults CI job.
Signed-off-by: Paolo Bonzini
---
tests/qtest/m48t59-test.c | 11 ++-
1 file changed, 6 insertions(+
On 3/5/24 10:07, Daniel P. Berrangé wrote:
On Fri, May 03, 2024 at 10:16:34AM +0300, Michael Tokarev wrote:
Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
riscv64 in debian has been non-functioning for almo
Migration code needs no private fields of the coroutine backend.
Include the "regular" coroutine.h header.
Signed-off-by: Paolo Bonzini
---
migration/migration.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/migration/migration.h b/migration/migration.h
index 8045e39c26f..6
Friendly ping
On Wed, 17 Apr 2024 at 15:56, Ricardo Ribalda wrote:
>
> When qemu runs without kvm acceleration the ACPI executions take a great
> amount of time. If they take more than the default time (30sec), the
> ACPI calls fail and the system might not behave correctly.
>
> Now the _PRT tabl
Fix a bug introduced during a refactor in commit bb6cf6f016
("accel/tcg: Factor tcg_cpu_reset_hold() out"), affecting
user emulation. (cpu_reset is called during thread creation,
after cpu_realize).
This issue was noticed by Ilya when running WASM:
https://lore.kernel.org/qemu-devel/20221027141856
In commit 1b5120d74b ("accel: Introduce cpu_exec_reset_hold()")
we defined the user emulation backend cpu_exec_reset_hold() as
a stub. This was a mistake, since common fields are set in
CPU reset, and user emulation needs these fields to be resetted.
Move cpu_exec_reset_hold() back.
Signed-off-by:
If CONFIG_TCG is not defined, skip this directory calling
subdir_done(). Then since we know CONFIG_TCG is defined,
we don't need to check for it.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/meson.build | 22 --
1 file changed, 12 insertions(+), 10 deletions(-)
diff -
Some files are specific to system emulation. Move them under
their own sysemu/ directory. This might help to notice what
is affected (user, system or both) when doing global refactors.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/{ => sysemu}/tcg-accel-ops-icount.h | 0
accel/tcg/{ => sy
Introduce a method called by cpu_reset(), common
to both system and user emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-common.h | 2 ++
accel/tcg/cpu-exec.c | 4
accel/tcg/sysemu/tcg-accel-ops.c | 3 ++-
accel/tcg/user-exec.c| 1 +
4 fi
In commit bb6cf6f016 ("accel/tcg: Factor tcg_cpu_reset_hold() out")
we unfortunately restricted the tcg_flush_jmp_cache() to system
emulation. Move it to the common tcg_exec_cpu_reset_hold() handler
so user emulation gets the jmp_cache initialized when threads
are created.
Remove the NULL check in
On Fri, May 03, 2024 at 10:51:57AM +0200, Philippe Mathieu-Daudé wrote:
> On 3/5/24 10:07, Daniel P. Berrangé wrote:
> > On Fri, May 03, 2024 at 10:16:34AM +0300, Michael Tokarev wrote:
> > > Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
> > > This reverts commit f51f90c
Hi Salil,
On 12/3/24 02:59, Salil Mehta wrote:
KVM vCPU creation is done once during the vCPU realization when Qemu vCPU thread
is spawned. This is common to all the architectures as of now.
Hot-unplug of vCPU results in destruction of the vCPU object in QOM but the
corresponding KVM vCPU objec
Daniel P. Berrangé writes:
> On Fri, May 03, 2024 at 10:16:34AM +0300, Michael Tokarev wrote:
>> Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
>> This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
>>
>> riscv64 in debian has been non-functioning for almost
On Fri, May 03, 2024 at 09:07:34AM +0100, Daniel P. Berrangé wrote:
> On Fri, May 03, 2024 at 10:16:34AM +0300, Michael Tokarev wrote:
> > Revert "gitlab-ci: Disable the riscv64-debian-cross-container by default"
> > This reverts commit f51f90c65ed7706c3c4f7a889ce3d6b7ab75ef6a.
> >
> > riscv64 in
Previous patch fixed the PMP priority in raise_mmu_exception() but we're still
setting mtval2 incorrectly. In riscv_cpu_tlb_fill(), after pmp check in 2 stage
translation part, mtval2 will be set in case of successes 2 stage translation
but
failed pmp check.
In this case we gonna set mtval2 via e
On 25.04.2024 12:21, Andrew Jones wrote:
On Mon, Apr 22, 2024 at 02:31:36PM +0200, Andrew Jones wrote:
On Mon, Apr 22, 2024 at 02:42:54PM +0300, Alexei Filippov wrote:
kvm_riscv_handle_sbi() may return not supported return code to not
trigger qemu abort with vendor-specific sbi.
Add new err
在 2024/4/24 1:57, Ira Weiny 写道:
Shiyang Ruan wrote:
Currently driver only traces cxl events, poison creation (for both vmem
and pmem type) on cxl memdev is silent. OS needs to be notified then it
could handle poison pages in time. Per CXL spec, the device error event
could be signaled throu
Depending on the phase of the moon, this seems to be causing CI failures on
FreeBSD.
Fortunately, valgrind catches it too, and in a fully deterministic way:
==210026== Invalid write of size 4
==210026==at 0x5222F3: stm32l4x5_lpuart_class_init (stm32l4x5_usart.c:611)
==210026==by 0xA499E1:
On Fri, May 3, 2024 at 11:17 AM Philippe Mathieu-Daudé
wrote:
>
> If CONFIG_TCG is not defined, skip this directory calling
> subdir_done(). Then since we know CONFIG_TCG is defined,
> we don't need to check for it.
You can only remove the check if you assume that TCG (unlike e.g. KVM)
is enabled
On Fri, 3 May 2024 at 12:10, Paolo Bonzini wrote:
>
> Depending on the phase of the moon, this seems to be causing CI failures on
> FreeBSD.
> Fortunately, valgrind catches it too, and in a fully deterministic way:
>
> ==210026== Invalid write of size 4
> ==210026==at 0x5222F3: stm32l4x5_lpua
在 2024/4/24 2:40, Dan Williams 写道:
Shiyang Ruan wrote:
Currently driver only traces cxl events, poison creation (for both vmem
and pmem type) on cxl memdev is silent.
As it should be.
OS needs to be notified then it could handle poison pages in time.
No, it was always the case that late
在 2024/5/1 5:00, Alison Schofield 写道:
On Wed, Apr 17, 2024 at 03:50:52PM +0800, Shiyang Ruan wrote:
The length of Physical Address in General Media Event Record/DRAM Event
Record is 64-bit, so the field mask should be defined as such length.
Otherwise, this causes cxl_general_media and cxl_dr
On 5/1/24 20:27, Daniel P. Berrangé wrote:
Thomas proposed a new deprecation and removal policy for versioned
machine types that would see them liable for deletion after 6 years:
https://lists.nongnu.org/archive/html/qemu-devel/2024-04/msg04683.html
This suggest was met with broad approval,
On Fri, May 03, 2024 at 01:39:32PM GMT, Aleksei Filippov wrote:
>
>
> On 25.04.2024 12:21, Andrew Jones wrote:
> > On Mon, Apr 22, 2024 at 02:31:36PM +0200, Andrew Jones wrote:
> > > On Mon, Apr 22, 2024 at 02:42:54PM +0300, Alexei Filippov wrote:
> > > > kvm_riscv_handle_sbi() may return not sup
sparc-softmmu is able to run a subset of qtests when compiled
--without-default-devices,
so use it instead of x86_64-softmmu for the msys2 run.
Signed-off-by: Paolo Bonzini
---
.gitlab-ci.d/windows.yml | 5 +
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/.gitlab-ci.d/windows.
On Wed, 1 May 2024 at 19:28, Daniel P. Berrangé wrote:
> I wonder, however, whether we would benefit from changing how we
> update the VERSION file.
>
> eg instead of re-using the micro digit to indicate a dev or rc
> snapshot, represent those explicitly. eg "9.1.0-dev" and
> "9.1.0-rc1", "9.1.0-r
On 3/5/24 13:16, Paolo Bonzini wrote:
On Fri, May 3, 2024 at 11:17 AM Philippe Mathieu-Daudé
wrote:
If CONFIG_TCG is not defined, skip this directory calling
subdir_done(). Then since we know CONFIG_TCG is defined,
we don't need to check for it.
You can only remove the check if you assume th
Introduce a method called by cpu_reset(), common
to both system and user emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-common.h | 2 ++
accel/tcg/cpu-exec.c | 4
accel/tcg/sysemu/tcg-accel-ops.c | 3 ++-
accel/tcg/user-exec.c| 1 +
4 fi
Since v1:
- Dropped patch #1 (use meson subdir_done)
Fix a bug introduced during a refactor in commit bb6cf6f016
("accel/tcg: Factor tcg_cpu_reset_hold() out"), affecting
user emulation. (cpu_reset is called during thread creation,
after cpu_realize).
This issue was noticed by Ilya when running W
In commit 1b5120d74b ("accel: Introduce cpu_exec_reset_hold()")
we defined the user emulation backend cpu_exec_reset_hold() as
a stub. This was a mistake, since common fields are set in
CPU reset, and user emulation needs these fields to be resetted.
Move cpu_exec_reset_hold() back.
Signed-off-by:
Some files are specific to system emulation. Move them under
their own sysemu/ directory. This might help to notice what
is affected (user, system or both) when doing global refactors.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/{ => sysemu}/tcg-accel-ops-icount.h | 0
accel/tcg/{ => sy
In commit bb6cf6f016 ("accel/tcg: Factor tcg_cpu_reset_hold() out")
we unfortunately restricted the tcg_flush_jmp_cache() to system
emulation. Move it to the common tcg_exec_cpu_reset_hold() handler
so user emulation gets the jmp_cache initialized when threads
are created.
Remove the NULL check in
On Fri, May 03, 2024 at 02:15:09PM +0200, Paolo Bonzini wrote:
> sparc-softmmu is able to run a subset of qtests when compiled
> --without-default-devices,
> so use it instead of x86_64-softmmu for the msys2 run.
>
> Signed-off-by: Paolo Bonzini
> ---
> .gitlab-ci.d/windows.yml | 5 +
> 1 f
On 3/5/24 14:25, Philippe Mathieu-Daudé wrote:
Some files are specific to system emulation. Move them under
their own sysemu/ directory. This might help to notice what
is affected (user, system or both) when doing global refactors.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/{ => syse
On Mon, 15 May 2023 at 17:07, Stefan Hajnoczi wrote:
>
> From: Sam Li
>
> Add zoned device option to host_device BlockDriver. It will be presented only
> for zoned host block devices. By adding zone management operations to the
> host_block_device BlockDriver, users can use the new block layer AP
Since v2:
- Introduce softmmu_specific_ss[]
- Fix broken rebased meson in patch 2
Since v1:
- Dropped patch #1 (use meson subdir_done)
Fix a bug introduced during a refactor in commit bb6cf6f016
("accel/tcg: Factor tcg_cpu_reset_hold() out"), affecting
user emulation. (cpu_reset is called during
Currently these files are only used in system emulation,
but could eventually be used by user emulation. Use the
"softmmu_specific_ss" to express they are related to
SoftMMU.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/meson.build | 7 +--
1 file changed, 5 insertions(+), 2 deletions
In commit 1b5120d74b ("accel: Introduce cpu_exec_reset_hold()")
we defined the user emulation backend cpu_exec_reset_hold() as
a stub. This was a mistake, since common fields are set in
CPU reset, and user emulation needs these fields to be resetted.
Move cpu_exec_reset_hold() back.
Signed-off-by:
Some files are specific to system emulation. Move them under
their own sysemu/ directory. This might help to notice what
is affected (user, system or both) when doing global refactors.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/{ => sysemu}/tcg-accel-ops-icount.h | 0
accel/tcg/{ => sy
In commit bb6cf6f016 ("accel/tcg: Factor tcg_cpu_reset_hold() out")
we unfortunately restricted the tcg_flush_jmp_cache() to system
emulation. Move it to the common tcg_exec_cpu_reset_hold() handler
so user emulation gets the jmp_cache initialized when threads
are created.
Remove the NULL check in
On Fri, May 03, 2024 at 01:14:27PM +0100, Peter Maydell wrote:
> On Wed, 1 May 2024 at 19:28, Daniel P. Berrangé wrote:
> > I wonder, however, whether we would benefit from changing how we
> > update the VERSION file.
> >
> > eg instead of re-using the micro digit to indicate a dev or rc
> > snaps
Introduce a method called by cpu_reset(), common
to both system and user emulation.
Signed-off-by: Philippe Mathieu-Daudé
---
accel/tcg/internal-common.h | 2 ++
accel/tcg/cpu-exec.c | 4
accel/tcg/sysemu/tcg-accel-ops.c | 3 ++-
accel/tcg/user-exec.c| 1 +
4 fi
Hi,
In this RFC I want to check with Gerd and others if it's ok to add a PCI
id for the RISC-V IOMMU device. It's currently under review in [1]. The
idea is to fold this patch into the RISC-V IOMMU series if we're all ok
with this change.
Gerd, we picked the ID right after the PCI UFS device. Let
Reserve an id to be used by the RISC-V IOMMU PCI device.
Cc: Gerd Hoffmann
Signed-off-by: Daniel Henrique Barboza
---
docs/specs/pci-ids.rst | 2 ++
include/hw/pci/pci.h | 1 +
2 files changed, 3 insertions(+)
diff --git a/docs/specs/pci-ids.rst b/docs/specs/pci-ids.rst
index c0a3dec2e7..a89
On Mon, 26 Jun 2023 at 13:28, Michael S. Tsirkin wrote:
>
> From: Jonathan Cameron
>
> Current implementation is very simple so many of the corner
> cases do not exist (e.g. fragmenting larger poison list entries)
Hi; Coverity has just spotted what looks like a bug in this
function (CID 1544772)
On Fri, 16 Jun 2023 at 11:03, Song Gao wrote:
>
> From: Tianrui Zhao
>
> 1. Implement some functions for LoongArch numa support;
> 2. Implement fdt_add_memory_node() for fdt;
> 3. build_srat() fills node_id and adds build numa memory.
>
> Reviewed-by: Song Gao
> Signed-off-by: Tianrui Zhao
> Si
Markus Armbruster writes:
> Fabiano Rosas writes:
>
>> From: Peter Xu
>>
>> Peter missed the Sphinx HMP document for the "resume/-r" flag in commit
>> 7a4da28b26 ("qmp: hmp: add migrate "resume" option"). Add it. Avoid
>> adding a Fixes to make life easier for the stable maintainer.
>>
>> Whe
Keep all user emulation headers under the same user/ directory.
Signed-off-by: Philippe Mathieu-Daudé
---
Forgot to include this patch in "exec: Rework around CPUState user fields"
https://lore.kernel.org/qemu-devel/20240428221450.26460-1-phi...@linaro.org/
---
bsd-user/qemu.h
On 30/4/24 18:31, Philippe Mathieu-Daudé wrote:
Philippe Mathieu-Daudé (4):
target/sh4: Fix ADDV opcode
target/sh4: Fix SUBV opcode
target/sh4: Rename TCGv variables as manual for ADDV opcode
target/sh4: Rename TCGv variables as manual for SUBV opcode
Series queued, thanks.
On 2/5/24 16:29, Peter Maydell wrote:
We only support the most recent two versions of macOS (currently
macOS 13 Ventura and macOS 14 Sonoma), and our ui/cocoa.m code
already assumes at least macOS 12 Monterey or better, because it uses
NSScreen safeAreaInsets, which is 12.0-or-newer.
Remove the
On 5/3/24 05:52, Philippe Mathieu-Daudé wrote:
Keep all user emulation headers under the same user/ directory.
Signed-off-by: Philippe Mathieu-Daudé
---
Forgot to include this patch in "exec: Rework around CPUState user fields"
https://lore.kernel.org/qemu-devel/20240428221450.26460-1-phi...@lin
On 5/3/24 05:51, Fabiano Rosas wrote:
Markus Armbruster writes:
Fabiano Rosas writes:
From: Peter Xu
Peter missed the Sphinx HMP document for the "resume/-r" flag in commit
7a4da28b26 ("qmp: hmp: add migrate "resume" option"). Add it. Avoid
adding a Fixes to make life easier for the sta
On 5/3/24 01:51, Paolo Bonzini wrote:
Together with the series at
https://patchew.org/QEMU/20240423131612.28362-1-pbonz...@redhat.com/,
this allows adding sparc-softmmu to the target list of the
build-without-defaults CI job.
Signed-off-by: Paolo Bonzini
---
tests/qtest/m48t59-test.c | 11 ++
On 5/3/24 02:03, Paolo Bonzini wrote:
Migration code needs no private fields of the coroutine backend.
Include the "regular" coroutine.h header.
Signed-off-by: Paolo Bonzini
---
migration/migration.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
Reviewed-by: Richard Henderson
r~
The hypervisor needs to provide some functions to support Heki. These
form the Heki-Hypervisor API.
Define a heki_hypervisor structure to house the API functions. A
hypervisor that supports Heki must instantiate a heki_hypervisor
structure and pass it to the Heki common code. This allows the commo
Hi,
This patch series implements control-register (CR) pinning for KVM and
provides an hypervisor-agnostic API to protect guests. It includes the
guest interface, the host interface, and the KVM implementation.
It's not ready for mainline yet (see the current limitations), but we
think the overa
From: Madhavan T. Venkataraman
Hypervisor Enforced Kernel Integrity (Heki) is a feature that will use
the hypervisor to enhance guest virtual machine security.
Implement minimal code to introduce Heki:
- Define the config variables.
- Define a kernel command line parameter "heki" to turn the f
This enables guests to lock their CR0 and CR4 registers with a subset of
X86_CR0_WP, X86_CR4_SMEP, X86_CR4_SMAP, X86_CR4_UMIP, X86_CR4_FSGSBASE
and X86_CR4_CET flags.
The new KVM_HC_LOCK_CR_UPDATE hypercall takes three arguments. The
first is to identify the control register, the second is a bit
Add an interface for user space to be notified about guests' Heki policy
and related violations.
Extend the KVM_ENABLE_CAP IOCTL with KVM_CAP_HEKI_CONFIGURE and
KVM_CAP_HEKI_DENIAL. Each one takes a bitmask as first argument that can
contains KVM_HEKI_EXIT_REASON_CR0 and KVM_HEKI_EXIT_REASON_CR4.
The new CONFIG_HEKI_KUNIT_TEST option enables to run tests in a a kernel
module. The minimal required configuration is listed in the
virt/heki-test/.kunitconfig file.
test_cr_disable_smep checks control-register pinning by trying to
disable SMEP. This test should then failed on a non-protected k
On Fri, May 3, 2024 at 2:29 PM Daniel P. Berrangé wrote:
> We have compile coverage of x86_64-softmmu on the cross-win64 mingw
> job. So we're not loosing any compile coverage in aggregate with
> this change, in fact we improve it by compiling sparc here.
>
> The msys2-64bit job currently takes 50
On Thu, 2 May 2024 13:00:34 -0700 Richard Henderson
wrote:
>
> On 5/2/24 12:20, Matheus Tavares Bernardino wrote:
> >
> > +
> > +void test_multi_cof(void)
> > +{
> > +asm volatile(
> > +"p0 = cmp.eq(r0, r0)\n"
> > +"{\n"
> > +"if (p0) jump test_multi_cof_unaligned\
target/ppc/kvm.c calls out to code in hw/ppc/spapr*.c; that code is
not present and fails to link if CONFIG_PSERIES is not enabled.
Adjust kvm.c to depend on CONFIG_PSERIES instead of TARGET_PPC64,
and compile out anything that requires cap_papr, because only
the pseries machine will call kvmppc_se
On Fri, May 03, 2024, Mickaël Salaün wrote:
> Hi,
>
> This patch series implements control-register (CR) pinning for KVM and
> provides an hypervisor-agnostic API to protect guests. It includes the
> guest interface, the host interface, and the KVM implementation.
>
> It's not ready for mainline
On Fri, May 03, 2024 at 08:58:09AM +0200, Markus Armbruster wrote:
> Peter Xu writes:
>
> > Peter missed the Sphinx HMP document for the "resume/-r" flag in commit
> > 7a4da28b26 ("qmp: hmp: add migrate "resume" option"). Add it. Avoid
> > adding a Fixes to make life easier for the stable maint
On Fri, May 03, 2024, Mickaël Salaün wrote:
> Add an interface for user space to be notified about guests' Heki policy
> and related violations.
>
> Extend the KVM_ENABLE_CAP IOCTL with KVM_CAP_HEKI_CONFIGURE and
> KVM_CAP_HEKI_DENIAL. Each one takes a bitmask as first argument that can
> contains
On 4/29/24 08:50, Zhenzhong Duan wrote:
Hi,
The most important change in this version is instroducing a common
HostIOMMUDeviceCaps structure in HostIOMMUDevice and a new interface
between vIOMMU and HostIOMMUDevice.
HostIOMMUDeviceClass::realize() is introduced to initialize
HostIOMMUDeviceCaps
If there's still time, suggest to tweak the subject to
hmp/migration: Fix "migrate" command's documentation
Peter Xu writes:
> On Fri, May 03, 2024 at 08:58:09AM +0200, Markus Armbruster wrote:
>> Peter Xu writes:
>>
>> > Peter missed the Sphinx HMP document for the "resume/-r" flag in co
On Fri, May 03, 2024 at 04:04:25PM +0200, Cédric Le Goater wrote:
> However, have you considered another/complementary approach which
> would be to create an host IOMMU (iommufd) backend object and a vIOMMU
> device object together for each vfio-pci device being plugged in the
> machine ?
>
> Some
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