On 09/05/2023 20.44, Peter Maydell wrote:
On Thu, 13 Apr 2023 at 17:26, Peter Maydell wrote:
On Thu, 13 Apr 2023 at 17:08, Michael Tokarev wrote:
30.03.2023 18:26, Thomas Huth wrote:
Booting a Linux kernel with the malta machine is currently broken
on big endian hosts. The cpu_to_gt32 macr
On 5/31/23 03:23, Nicholas Piggin wrote:
SMT TCG emulation needs to be able to iterate over siblings in a core,
and needs to serialise core access to shared SPRs and state.
Signed-off-by: Nicholas Piggin
---
target/ppc/cpu.h | 9 +
target/ppc/cpu_init.c | 5 +
target/pp
On 30.05.23 19:29, Eric Blake wrote:
On Mon, May 29, 2023 at 05:26:50PM +0300, Vladimir Sementsov-Ogievskiy wrote:
On 15.05.23 22:53, Eric Blake wrote:
Upstream NBD now documents[1] an extension that supports 64-bit effect
lengths in requests. As part of that extension, the size of the reply
h
Richard Henderson wrote:
> On 5/30/23 11:25, Juan Quintela wrote:
>> The following changes since commit aa9bbd865502ed517624ab6fe7d4b5d89ca95e43:
>>Merge tag 'pull-ppc-20230528' of https://gitlab.com/danielhb/qemu
>> into staging (2023-05-29 14:31:52 -0700)
>> are available in the Git reposito
On 30.05.23 21:22, Eric Blake wrote:
On Tue, May 30, 2023 at 04:23:46PM +0300, Vladimir Sementsov-Ogievskiy wrote:
On 15.05.23 22:53, Eric Blake wrote:
Add the constants and structs necessary for later patches to start
implementing the NBD_OPT_EXTENDED_HEADERS extension in both the client
and s
On Tue, May 30, 2023 at 02:09:58PM -0400, Stefan Hajnoczi wrote:
Stop using the .bdrv_co_io_plug() API because it is not multi-queue
block layer friendly. Use the new blk_io_plug_call() API to batch I/O
submission instead.
Note that a dev_max_batch check is dropped in laio_io_unplug() because
th
On 31/5/23 08:36, Cédric Le Goater wrote:
On 5/31/23 08:17, Philippe Mathieu-Daudé wrote:
+QOM tinkerers
On 31/5/23 07:59, Cédric Le Goater wrote:
On 5/30/23 23:15, Philippe Mathieu-Daudé wrote:
On 30/5/23 22:34, Philippe Mathieu-Daudé wrote:
On 8/5/23 09:58, Cédric Le Goater wrote:
Simple r
On 31/5/23 08:48, Cédric Le Goater wrote:
On 5/30/23 23:14, Philippe Mathieu-Daudé wrote:
On 8/5/23 09:58, Cédric Le Goater wrote:
It will help in getting rid of some drive_get(IF_MTD) calls by
retrieving the BlockBackend directly from the m25p80 device.
Cc: Alistair Francis
Signed-off-by: Cé
On 31/5/23 08:28, Cédric Le Goater wrote:
On 5/30/23 23:22, Philippe Mathieu-Daudé wrote:
On 8/5/23 09:58, Cédric Le Goater wrote:
Most of the Aspeed machines use the UART5 device for the boot console,
and QEMU connects the first serial Chardev to this SoC device for this
purpose. See routine c
On 31/5/23 08:07, Li Zhijian wrote:
Allocate targets and targets[n] resources when all sanity checks are
passed to avoid memory leaks.
Suggested-by: Philippe Mathieu-Daudé
Signed-off-by: Li Zhijian
---
V3: allocte further resource when we can't fail # Philippe
Thanks for the v3!
Reviewed-by
Yeqi Fu writes:
> This patch introduces a set of feature instructions for native calls
> and provides helpers to translate these instructions to corresponding
> native functions. A shared library is also implemented, where native
> functions are rewritten as feature instructions. At runtime, us
On Tue, 30 May 2023, Zhao Liu wrote:
> From: Zhao Liu
>
> From SMBIOS 3.0 specification, thread count field means:
>
> Thread Count is the total number of threads detected by the BIOS for
> this processor socket. It is a processor-wide count, not a
> thread-per-core count. [1]
>
> So here we s
LIU Zhiwei writes:
> On 2023/5/30 22:24, Yeqi Fu wrote:
>> This patch introduces a set of feature instructions for native calls
>> and provides helpers to translate these instructions to corresponding
>> native functions. A shared library is also implemented, where native
>> functions are rewri
Yeqi Fu writes:
> This patch introduces a set of feature instructions for native calls
> and provides helpers to translate these instructions to corresponding
> native functions. A shared library is also implemented, where native
> functions are rewritten as feature instructions. At runtime, us
On 15.05.23 22:53, Eric Blake wrote:
Upcoming additions to support NBD 64-bit effect lengths allow for the
possibility to distinguish between payload length (capped at 32M) and
effect length (up to 63 bits). Without that extension, only the
NBD_CMD_WRITE request has a payload; but with the exten
On 30/05/2023 11:20, Thomas Huth wrote:
The PowerMacs have an OHCI controller soldered on the motherboard,
so this should always be enabled for the "mac99" machine.
This fixes the problem that QEMU aborts when the user tries to run
the "mac99" machine with a build that has been compiled with the
On 26.05.23 00:20, T.J. Alumbaugh wrote:
Hi,
please try writing a comprehensive patch description: the goal should be
that one can understand what's happening in the single patch without all
of the following patches at hand. [ that's how I am reading them, and
ahve to ask many stupid question
On 15.05.23 22:53, Eric Blake wrote:
Part of NBD's 64-bit headers extension involves passing the client's
requested offset back as part of the reply header (one reason for this
change: converting absolute offsets stored in
NBD_REPLY_TYPE_OFFSET_DATA to relative offsets within the buffer is
easier
On 26.05.23 00:20, T.J. Alumbaugh wrote:
- Adds QMP function 'working-set-config'
- Adds QMP function 'working-set-request'
- Retrieve working set via 'guest-working-set' property on balloon
cat script.py
NAME = "name"
SOCKET = 'vm.sock'
BALLOON = "/machine/peripheral/balloon0"
imp
On 26.05.23 00:20, T.J. Alumbaugh wrote:
This is the device implementation for the proposed expanded balloon feature
described here:
https://lore.kernel.org/linux-mm/20230509185419.1088297-1-yuan...@google.com/
This series has a fixed number of "bins" for the working set report, but this is
not
On 2023/5/30 0:19, Eugenio Perez Martin wrote:
> On Mon, May 29, 2023 at 3:18 PM Hawkins Jiawei wrote:
>>
>> This patch introduces vhost_vdpa_net_load_offloads() to
>> restore offloads state at device's startup.
>>
>> Signed-off-by: Hawkins Jiawei
>> ---
>> net/vhost-vdpa.c | 26 +++
On 2023/5/31 14:37, Eugenio Perez Martin wrote:
> On Wed, May 31, 2023 at 3:47 AM Jason Wang wrote:
>>
>> On Mon, May 29, 2023 at 9:18 PM Hawkins Jiawei wrote:
>>>
>>> This patch introduces vhost_vdpa_net_load_offloads() to
>>> restore offloads state at device's startup.
>>>
>>> Signed-off-by: Ha
On Wed, May 31, 2023 at 10:23 AM Hawkins Jiawei wrote:
>
> On 2023/5/30 0:19, Eugenio Perez Martin wrote:
> > On Mon, May 29, 2023 at 3:18 PM Hawkins Jiawei wrote:
> >>
> >> This patch introduces vhost_vdpa_net_load_offloads() to
> >> restore offloads state at device's startup.
> >>
> >> Signed-o
commit e37a5c7fa459 ("i386: Add Intel Processor Trace feature support")
added the support of Intel PT by making CPUID[14] of PT as fixed feature
set (from ICX) for any CPU model on any host. This truly breaks the PT
exposure on Intel SPR platform because SPR has less supported bitmap of
CPUID(0x14,
KVM only allows userspace to access legal number of MSR_IA32_RTIT_ADDRn,
which is enumrated by guest's CPUID(0x14,0x1):EAX[2:0], i.e.,
env->features[FEAT_14_1_EAX] & INTEL_PT_ADDR_RANGES_NUM_MASK
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.h | 2 ++
target/i386/kvm/kvm.c | 8
2 fi
For IceLake-server, it's just the same as using the default PT
feature set since the default one is exact taken from ICX.
For Snowridge and SapphireRapids, define it according to real silicon
capabilities.
Signed-off-by: Xiaoyao Li
---
Changes in v4:
- Add Intel PT capabilities for SapphireRapi
Bit[2:0] of CPUID.14H_01H:EAX stands as a whole for the number of INTEL
PT ADDR RANGES. For unsupported value that exceeds what KVM reports,
report it as a whole in mark_unavailable_features() as well.
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.c | 9 -
1 file changed, 8 insertions(+)
Per Intel SDM, bits 2:0 of CPUID(0x14,0x1).EAX indicate the number of
address ranges for INTEL-PT.
Signed-off-by: Xiaoyao Li
---
target/i386/cpu.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/target/i386/cpu.c b/target/i386/cpu.c
index 88e90c1f7b7c..7d2f20c84c7a 100644
---
Some CPUID leaves have meaningful subleaf index. Print the subleaf info
in feature_word_description for CPUID features.
Signed-off-by: Xiaoyao Li
Reviewed-by: Eduardo Habkost
---
target/i386/cpu.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/i386/cpu.c b/targe
CPUID leaf 0x14 subleaf 0x0 and 0x1 enumerate the resource and
capability of Intel PT.
Introduce FeatureWord FEAT_14_0_EBX, FEAT_14_1_EAX and FEAT_14_1_EBX,
and complete FEAT_14_0_ECX. Thus all the features of Intel PT can be
expanded when "-cpu host/max" and can be configured in named CPU model.
Initial virtualization of Intel PT was added by making it as fixed
feature set of ICX's capabilities. However, it breaks the Intel PT exposure
on SPR machine because SPR has less PT capabilities of
CPUID(0x14,1):EBX[15:0].
This series aims to make Intel PT configurable that named CPU model can
def
Historically the Intel PT feature set reported from ICX silicon
was chosen as the fixed feature set for Intel PT. If want to enable
and expose INTEL-PT to guest, the supported Intel PT capabilities
reported by KVM must cover this fixed feature set, which are named
with MINIMAL in INTEL_PT_MINIMAL_E
+static void aspeed_set_uart(Object *obj, const char *value, Error **errp)
+{
+ AspeedMachineState *bmc = ASPEED_MACHINE(obj);
+ AspeedMachineClass *amc = ASPEED_MACHINE_GET_CLASS(bmc);
+ AspeedSoCClass *sc = ASPEED_SOC_CLASS(object_class_by_name(amc->soc_name));
+ int val;
+
+ if (
On 2023/5/31 15:59, Alex Bennée wrote:
LIU Zhiwei writes:
On 2023/5/30 22:24, Yeqi Fu wrote:
This patch introduces a set of feature instructions for native calls
and provides helpers to translate these instructions to corresponding
native functions. A shared library is also implemented, whe
The standalone freebsd VM image misses a lot of libraries compared
to the image that we use in the Gitlab-CI (see the file
.gitlab-ci.d/cirrus/freebsd-13.vars). Let's extend the list here
and while we're at it, re-arrange the list in alphabetical order
without the cumbersome grouping into categorie
Am 30.05.23 um 20:39 schrieb Juan Quintela:
> Hi
>
> On this v2:
>
> - dropped qemu_fflush() assert for read only files (make Richard
> happy)
>
> - Update documentation for qemu_file_transferred (make Fabiano happy)
>
> - migration/rdma: Remove qemu_fopen_rdma() and make it look like
> eve
Richard Henderson wrote:
> On 5/30/23 11:25, Juan Quintela wrote:
>> The following changes since commit aa9bbd865502ed517624ab6fe7d4b5d89ca95e43:
>>Merge tag 'pull-ppc-20230528' of https://gitlab.com/danielhb/qemu
>> into staging (2023-05-29 14:31:52 -0700)
>> are available in the Git reposito
在 2023年05月31日 16:42, Zhao Liu 写道:
On Tue, May 30, 2023 at 08:20:34PM +0800, Tianrui Zhao wrote:
Date: Tue, 30 May 2023 20:20:34 +0800
From: Tianrui Zhao
Subject: [PATCH] hw/smbios: fix thead count field in type 4 table
X-Mailer: git-send-email 2.39.1
The thread_count value in smbios type_4
On 5/30/23 21:27, Weiwei Li wrote:
On 2023/5/31 04:23, Daniel Henrique Barboza wrote:
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
target/riscv/cpu_h
On 5/29/23 09:17, Weiwei Li wrote:
Normally, MPRV can be set to 1 only in M mode (It will be cleared
when returning to lower-privilege mode by MRET/SRET).
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/cpu_helper.c | 2 +-
On 5/29/23 09:17, Weiwei Li wrote:
Upon MRET or explicit memory access with MPRV=1, MPV should be ignored
when MPP=PRV_M.
Signed-off-by: Weiwei Li
Signed-off-by: Junqiang Wang
---
Reviewed-by: Daniel Henrique Barboza
target/riscv/cpu_helper.c | 3 ++-
target/riscv/op_helper.c | 3 +
There is no need to disable this useful compiler warning for
newer versions of the SDL anymore.
This also enables the printing of the version number with
newer versions of the SDL in the summary of the meson output
again.
Signed-off-by: Thomas Huth
---
meson.build | 10 ++
1 file change
On 30/05/2023 22:39, Philippe Mathieu-Daudé wrote:
> On 30/5/23 19:59, Joao Martins wrote:
>> Relax the vIOMMU migration blocker when the underlying IOMMU reports that
>> DMA translation disabled. When it is disabled there will be no DMA mappings
>> via the vIOMMU and the guest only uses it for
> On 31-May-2023, at 2:12 PM, Zhao Liu wrote:
>
> On Tue, May 30, 2023 at 08:20:34PM +0800, Tianrui Zhao wrote:
>> Date: Tue, 30 May 2023 20:20:34 +0800
>> From: Tianrui Zhao
>> Subject: [PATCH] hw/smbios: fix thead count field in type 4 table
>> X-Mailer: git-send-email 2.39.1
>>
>> The thr
Hi Thomas,
On 31/5/23 11:04, Thomas Huth wrote:
The standalone freebsd VM image misses a lot of libraries compared
to the image that we use in the Gitlab-CI (see the file
.gitlab-ci.d/cirrus/freebsd-13.vars). Let's extend the list here
and while we're at it, re-arrange the list in alphabetical o
Manos Pitsidianakis writes:
> This patch adds an audio device implementing the recent virtio sound
> spec (1.2) and a corresponding PCI wrapper device.
>
> PCM functionality is implemented, and jack[0], chmaps[1] messages are
> at the moment ignored.
>
> To test this, you'll need a >6.0 kernel
On 30/05/2023 22:45, Philippe Mathieu-Daudé wrote:
> On 30/5/23 19:59, Joao Martins wrote:
>> From: Avihai Horon
>>
>> Implement get_attr() method and use the address width property to report
>> the IOMMU_ATTR_MAX_IOVA attribute.
>>
>> Signed-off-by: Avihai Horon
>> Signed-off-by: Joao Martins
On 31/05/2023 11.52, Philippe Mathieu-Daudé wrote:
Hi Thomas,
On 31/5/23 11:04, Thomas Huth wrote:
The standalone freebsd VM image misses a lot of libraries compared
to the image that we use in the Gitlab-CI (see the file
.gitlab-ci.d/cirrus/freebsd-13.vars). Let's extend the list here
and whil
On 30/05/2023 23:04, Philippe Mathieu-Daudé wrote:
> Hi Joao,
>
> On 30/5/23 19:59, Joao Martins wrote:
>> Rename pci_device_iommu_address_space() into pci_device_iommu_info().
>> In the new function return a new type PCIAddressSpace that encapsulates
>> the AddressSpace pointer that originally wa
- add Alpine 3.17 & 3.18 targets
- bump gitlab CI Alpine/Fedora container versions accordingly
Erik Skultety (2):
tests: lcitool: Refresh to latest master
tests: lcitool: refresh: Bump container versions
tests/docker/dockerfiles/alpine.docker | 4 ++--
tests/docker/dockerfiles/fe
Alpine 3.16 -> 3.18
Fedora 37 -> 38
Signed-off-by: Erik Skultety
---
tests/docker/dockerfiles/alpine.docker | 4 ++--
tests/docker/dockerfiles/fedora-win32-cross.docker | 4 ++--
tests/docker/dockerfiles/fedora-win64-cross.docker | 4 ++--
tests/docker/dockerfiles/fedora.docker
- adds Alpine 3.17 & 3.18 targets, drops 3.15 & 3.16
- adds pipewire-dev mapping
Signed-off-by: Erik Skultety
---
tests/lcitool/libvirt-ci | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tests/lcitool/libvirt-ci b/tests/lcitool/libvirt-ci
index c8971e90a..6d8b63be7 16
---
On 5/27/23 01:15, Alex Williamson wrote:
> -static struct vfio_device_info *get_device_info(S390PCIBusDevice *pbdev,
> -uint32_t argsz)
> +static struct vfio_device_info *get_device_info(S390PCIBusDevice *pbdev);
> {
There is an extraneous semicolon
Fiona Ebner wrote:
> Am 30.05.23 um 20:39 schrieb Juan Quintela:
>> Hi
>>
>> On this v2:
>>
>> - dropped qemu_fflush() assert for read only files (make Richard
>> happy)
>>
>> - Update documentation for qemu_file_transferred (make Fabiano happy)
>>
>> - migration/rdma: Remove qemu_fopen_rdma
On Wed, May 31, 2023 at 10:12:26AM +0200, David Hildenbrand wrote:
> On 26.05.23 00:20, T.J. Alumbaugh wrote:
>
> Hi,
>
> please try writing a comprehensive patch description: the goal should be
> that one can understand what's happening in the single patch without all of
> the following patches
On Tuesday, May 30, 2023 10:41 PM, Peter Xu wrote:
> On Tue, May 30, 2023 at 05:02:59PM +0800, Wei Wang wrote:
> > The Postcopy preempt capability requires to be set before incoming
> > starts, so change the postcopy tests to start with deferred incoming
> > and call migrate-incoming after the cap
blk_insert_bs() requires that callers hold the AioContext lock for the
node that should be inserted. Take it.
Signed-off-by: Kevin Wolf
---
tests/unit/test-block-iothread.c | 7 ++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git a/tests/unit/test-block-iothread.c b/tests/unit/tes
If the caller keeps the AioContext lock for a block node in an iothread,
polling in bdrv_graph_wrlock() deadlocks if the condition isn't
fulfilled immediately.
Now that all callers make sure to actually have the AioContext locked
when they call bdrv_replace_child_noperm() like they should, we can
bdrv_set_file_or_backing_noperm() requires the caller to hold the
AioContext lock for the child node, but we hold the one for the parent
node in bdrv_reopen_parse_file_or_backing(). Take the other one
temporarily.
Signed-off-by: Kevin Wolf
---
block.c | 35 +--
1
bdrv_attach_child() requires that the caller holds the AioContext lock
for the new child node. Take it in bdrv_open_child() and document that
the caller must not hold any AioContext apart from the main AioContext.
Signed-off-by: Kevin Wolf
---
block.c | 13 +++--
1 file changed, 11 inser
bdrv_set_backing() requires the caller to hold the AioContext lock for
@backing_hd. Take it in bdrv_open_backing_file() before calling the
function.
Signed-off-by: Kevin Wolf
---
block.c | 5 +
1 file changed, 5 insertions(+)
diff --git a/block.c b/block.c
index 954b9923d9..d5f8231f31 10064
Signed-off-by: Kevin Wolf
---
block.c | 25 -
1 file changed, 24 insertions(+), 1 deletion(-)
diff --git a/block.c b/block.c
index a0793b6435..954b9923d9 100644
--- a/block.c
+++ b/block.c
@@ -3794,6 +3794,7 @@ static BlockDriverState
*bdrv_append_temp_snapshot(BlockDriv
This series fixes the deadlock that was observed before commit ad128dff
('graph-lock: Disable locking for now'), which just disabled the graph
lock completely as a workaround to get 8.0.1 stable.
In theory the problem is simple: We can't poll while still holding the
lock of a different AioContext.
The function can move the child node to a different AioContext. In this
case, it also must take the AioContext lock for the new context before
calling functions that require the caller to hold the AioContext for the
child node.
Signed-off-by: Kevin Wolf
---
block.c | 21 -
1
blk_insert_bs() requires that callers hold the AioContext lock for the
node that should be inserted. Take it.
Signed-off-by: Kevin Wolf
---
hw/core/qdev-properties-system.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/hw/core/qdev-properties-system.c b/hw/core/qdev-properties-system.c
Now that bdrv_graph_wrlock() temporarily drops the AioContext lock that
its caller holds, it can poll without causing deadlocks. We can now
re-enable graph locking.
This reverts commit ad128dff0bf4b6f971d05eb4335a627883a19c1d.
Signed-off-by: Kevin Wolf
---
block/graph-lock.c | 23 --
bdrv_root_attach_child() requires callers to hold the AioContext lock
for child_bs. Take it in block_job_add_bdrv() before calling the
function.
Signed-off-by: Kevin Wolf
---
blockjob.c | 17 -
1 file changed, 12 insertions(+), 5 deletions(-)
diff --git a/blockjob.c b/blockjob.c
This is a better regression test for the bugs hidden by commit 80fc5d26
('graph-lock: Disable locking for now'). With that commit reverted, it
hangs instantaneously and reliably for me.
It is important to have a reliable test like this, because the following
commits will set out to fix the actual
Thomas Huth writes:
> On 24/05/2023 15.34, Milan Zamazal wrote:
>> Signed-off-by: Milan Zamazal
>> ---
>
>> tests/qtest/vhost-user-test.c | 2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>> diff --git a/tests/qtest/vhost-user-test.c
>> b/tests/qtest/vhost-user-test.c
>> index e4f95b28
On Wed, 31 May 2023 09:51:43 +0200
Philippe Mathieu-Daudé wrote:
> On 31/5/23 08:07, Li Zhijian wrote:
> > Allocate targets and targets[n] resources when all sanity checks are
> > passed to avoid memory leaks.
> >
> > Suggested-by: Philippe Mathieu-Daudé
> > Signed-off-by: Li Zhijian
> > ---
>
Milan Zamazal writes:
> This patch series adds a vhost-user VIRTIO device for SCMI.
> It's similar to other similar vhost-user VIRTIO devices.
>
> I'm aware of the work in progress by Alex Bennée to simplify similar devices
> and avoid excessive code duplication. I think the SCMI device suppor
ARM intrinsics for AES deviate from the x86 ones in the way they cover
the different stages of each round, and so mapping one to the other is
not entirely straight-forward. However, with a bit of care, we can still
use the x86 ones to emulate the ARM ones, which makes them constant time
(which is a
Use the host native instructions to implement the AES instructions
exposed by the emulated target. The mapping is not 1:1, so it requires a
bit of fiddling to get the right result.
This is still RFC material - the current approach feels too ad-hoc, but
given the non-1:1 correspondence, doing a pro
When available, use the AArch64 AES instructions to implement the x86
ones. These are not a 1:1 fit, but considerably more efficient, and
without data dependent timing.
For a typical benchmark (linux tcrypt mode=500), this gives a 2-3x
speedup when running on ThunderX2.
Signed-off-by: Ard Biesheu
On Wed, May 31, 2023 at 10:46:17AM +0530, Anup Patel wrote:
> On Fri, May 26, 2023 at 5:41 PM Sunil V L wrote:
> > hw/riscv: virt: Assume M-mode FW in pflash0 only when "-bios none"
> > riscv/virt: Support using pflash via -blockdev option
> > docs/system: riscv: Add pflash usage details
>
>
Hi,
While trying to convert the debian-riscv64-cross docker container to an
lcitool based one I ran into a problem building QEMU. The configure step
fails because despite cross compiling we still need a host compiler to
build the hexagon codegen tooling.
After scratching my head for a while I dis
From: Klaus Jensen
Add i2c_smbus_pec() to calculate the SMBus Packet Error Code for a
message.
Signed-off-by: Klaus Jensen
---
hw/i2c/smbus_master.c | 28
include/hw/i2c/smbus_master.h | 2 ++
2 files changed, 30 insertions(+)
diff --git a/hw/i2c/smbus_ma
From: Klaus Jensen
This adds a generic MCTP endpoint model that other devices may derive
from. I'm not 100% happy with the design of the class methods, but it's
a start.
Also included is a very basic implementation of an NVMe-MI device,
supporting only a small subset of the required commands. Li
From: Klaus Jensen
Add an abstract MCTP over I2C endpoint model. This implements MCTP
control message handling as well as handling the actual I2C transport
(packetization).
Devices are intended to derive from this and implement the class
methods.
Parts of this implementation is inspired by code
From: Klaus Jensen
Add the 'nmi-i2c' device that emulates an NVMe Management Interface
controller.
Initial support is very basic (Read NMI DS, Configuration Get).
This is based on previously posted code by Padmakar Kalghatgi, Arun
Kumar Agasar and Saurav Kumar.
Signed-off-by: Klaus Jensen
---
On Wed, May 31, 2023 at 12:23:34PM +0100, Alex Bennée wrote:
> Hi,
>
> While trying to convert the debian-riscv64-cross docker container to an
> lcitool based one I ran into a problem building QEMU. The configure step
> fails because despite cross compiling we still need a host compiler to
> build
Alex Bennée writes:
> Milan Zamazal writes:
>
>> This patch series adds a vhost-user VIRTIO device for SCMI.
>> It's similar to other similar vhost-user VIRTIO devices.
>>
>> I'm aware of the work in progress by Alex Bennée to simplify similar devices
>> and avoid excessive code duplication. I
Currently, we only avoid emulating L3 cache properties for AMD CPU
when l3-cache is off, but failed to consider this case on CPUID 8000_001D.
This result in a fact that we will still have L3 caches in the VM
although we pass "host-cache-info=off,l3-cache=off" CLI to qemu.
Fixes: 8f4202fb108 ("i386
On Fri, May 26, 2023 at 06:58:45PM +0100, Daniel P. Berrangé wrote:
> On Mon, Apr 24, 2023 at 06:01:36PM -0300, Fabiano Rosas wrote:
> > Daniel P. Berrangé writes:
> >
> > > There are 27 pre-copy live migration scenarios being tested. In all of
> > > these we force non-convergance and run for one
The required kernel changes associated with the patch are here:
https://lore.kernel.org/linux-s390/20230530223538.279198-1-akrow...@linux.ibm.com/
On 5/30/23 6:55 PM, Tony Krowiak wrote:
When a user attempts to remove a vfio-ap mediated device attached to a
guest, the operation hangs until the
On 26.05.23 16:30, Jean-Louis Dupond wrote:
On 26/05/2023 15:31, Hanna Czenczek wrote:
[...]
I don’t follow how this patch is cleaner than the “block: Add zeroes
discard option” patch. That patch’s diff stat is +14/-5, this one’s
is 120+/57-.
Multiple reasons :)
- It's made for this use-c
On 5/30/23 8:56 PM, Matthew Rosato wrote:
On 5/30/23 6:55 PM, Tony Krowiak wrote:
Signed-off-by: Tony Krowiak
---
linux-headers/linux/vfio.h | 9 +
1 file changed, 9 insertions(+)
Worth nothing here that linux-headers patches should be generated using
scripts/update-linux-heade
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 13 +
include/hw/m68k/q800.h | 1 +
2 files changed, 6 insertions(+), 8 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index c34b2548ca..3d0a56d9f3 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -372,7 +372
This will allow the q800-glue.h header to be included separately so that the
GLUE device can be referenced externally.
Signed-off-by: Mark Cave-Ayland
---
MAINTAINERS | 2 +
hw/m68k/meson.build | 2 +-
hw/m68k/q800-glue.c | 252
This brings GLUEState in line with our current QOM guidelines.
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index 1aead224e2..bb9e857632 100644
--- a/hw/m68k/q800.c
+++ b/hw/m68k/q800.c
@@ -100,6 +100,7 @@
[MCA: the original series has now been split into 2 separate parts based upon
Phil's comments re: QOM parenting for objects in Q800MachineState. Part 1
consists of the Q800MachineState patches along with QOM parenting fixes and
the 2 mac_via RTC patches.]
This series contains the remaining patches
This provides an overall container and owner for Machine-related objects such
as MemoryRegions.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
MAINTAINERS| 1 +
hw/m68k/q800.c | 2 ++
include/hw/m68k/q800.h | 37 +
3 fil
Ensure there is a space before the final closing brace for all global
properties.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
hw/m68k/q800.c | 10 +-
1 file changed, 5 insertions(+), 5 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index b35ecafbc7..1aead
This will enable us later to distinguish between QOM initialisation and machine
initialisation.
Signed-off-by: Mark Cave-Ayland
Reviewed-by: Laurent Vivier
---
hw/m68k/q800.c | 5 +++--
1 file changed, 3 insertions(+), 2 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index 93a3f9699
Also change the instantiation of the VIA1 device to use
object_initialize_child().
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 16 +---
include/hw/m68k/q800.h | 2 ++
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
in
Also change the instantiation of the VIA2 device to use
object_initialize_child().
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 27 ---
include/hw/m68k/q800.h | 1 +
2 files changed, 17 insertions(+), 11 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68
Also change the instantiation of the SWIM device to use
object_initialize_child().
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 8 +---
include/hw/m68k/q800.h | 2 ++
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q800.c
index befef5f
Also change the instantiation of the escc_orgate device to use
object_initialize_child().
Signed-off-by: Mark Cave-Ayland
---
hw/m68k/q800.c | 16 +---
include/hw/m68k/q800.h | 2 ++
2 files changed, 11 insertions(+), 7 deletions(-)
diff --git a/hw/m68k/q800.c b/hw/m68k/q8
The current use of aliased memory regions causes us 2 problems: firstly the
output of "info qom-tree" is absolutely huge and difficult to read, and
secondly we have already reached the internal limit for memory regions as
adding any new memory region into the mac-io region causes QEMU to assert
wit
This is to enable them to be used outside of dp8393x.c.
Signed-off-by: Mark Cave-Ayland
CC: Jason Wang
---
hw/net/dp8393x.c | 32 +
include/hw/net/dp8393x.h | 60
2 files changed, 61 insertions(+), 31 deletions(-)
create mode
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