On 30/10/2022 04.21, Bin Meng wrote:
On Sun, Oct 30, 2022 at 12:39 AM Stefan Weil wrote:
...
Maybe it is sufficient to build only a 64 bit installer. Is there still
need for QEMU on 32 bit Windows? For CI, most parts of the NSIS process
(which requires a lot of resources) are covered by either
On Mon, Oct 31, 2022 at 11:10:20AM +0800, Cindy Lu wrote:
> Add support for vIOMMU. add the new function to deal with iommu MR.
> - during iommu_region_add register a specific IOMMU notifier,
> and store all notifiers in a list.
> - during iommu_region_del, compare and delete the IOMMU notifier fr
On Mon, Oct 31, 2022 at 02:56:47PM +0800, Cindy Lu wrote:
> On Mon, 31 Oct 2022 at 14:55, Michael S. Tsirkin wrote:
> >
> > On Mon, Oct 31, 2022 at 02:44:11PM +0800, Cindy Lu wrote:
> > > On Mon, 31 Oct 2022 at 14:38, Michael S. Tsirkin wrote:
> > > >
> > > > On Mon, Oct 31, 2022 at 11:10:19AM +0
,
On Mon, 31 Oct 2022 at 15:04, Michael S. Tsirkin wrote:
>
> On Mon, Oct 31, 2022 at 11:10:20AM +0800, Cindy Lu wrote:
> > Add support for vIOMMU. add the new function to deal with iommu MR.
> > - during iommu_region_add register a specific IOMMU notifier,
> > and store all notifiers in a list
On Mon, Oct 31, 2022 at 03:15:14PM +0800, Cindy Lu wrote:
> ,
>
>
> On Mon, 31 Oct 2022 at 15:04, Michael S. Tsirkin wrote:
> >
> > On Mon, Oct 31, 2022 at 11:10:20AM +0800, Cindy Lu wrote:
> > > Add support for vIOMMU. add the new function to deal with iommu MR.
> > > - during iommu_region_add
On 2022/10/29 15:53, Michael S. Tsirkin wrote:
> On Thu, Oct 27, 2022 at 11:26:11AM +0800, Yicong Yang wrote:
>> From: Yicong Yang
>>
>> Update the ACPI tables according to the acpi aml_build change.
>>
>> Signed-off-by: Yicong Yang
>
> OK nice but if patch 1 is applied alone that will break mak
On Oct 21 14:59, Daniel Wagner wrote:
> On Tue, Oct 18, 2022 at 10:15:57AM +0200, Daniel Wagner wrote:
> > On Mon, Oct 10, 2022 at 07:15:08PM +0200, Klaus Jensen wrote:
> > > This is all upstream. Namespaces with 'shared=on' *should* all be
> > > automatically attached to any hotplugged controller
Hi Yanan,
On 2022/10/31 14:56, wangyanan (Y) wrote:
> Hi Yicong,
>
> On 2022/10/27 11:26, Yicong Yang wrote:
>> From: Yicong Yang
>>
>> Currently we'll always generate a cluster node no matter user has
>> specified '-smp clusters=X' or not. Cluster is an optional level
>> and will participant th
On 30/10/2022 11.59, Stefan Weil wrote:
Most of them were found and fixed using codespell.
Signed-off-by: Stefan Weil
---
v2: Fixes from Peter Maydell's comments
My focus was fixing typos which are relevant for the generated documentation.
codespell finds many more typos in source code, and
`make check-spelling` can now be used to get a list of spelling errors.
It uses the latest version of codespell, a spell checker implemented in Python.
Signed-off-by: Stefan Weil
---
This RFC can already be used for manual tests, but still reports false
positives, mostly because some variable na
On Fri, Oct 28, 2022 at 6:45 PM Michael S. Tsirkin wrote:
>
> On Fri, Oct 28, 2022 at 06:02:50PM +0200, Eugenio Pérez wrote:
> > By qemu coding style.
> >
> > Signed-off-by: Eugenio Pérez
>
> You wrote this code originally so I don't mind but just to note I don't
> want a flurry of patches "fixin
On 31/10/2022 08.43, Stefan Weil wrote:
`make check-spelling` can now be used to get a list of spelling errors.
It uses the latest version of codespell, a spell checker implemented in Python.
Signed-off-by: Stefan Weil
---
This RFC can already be used for manual tests, but still reports false
On 31/10/22 05:40, Brad Smith wrote:
qga: Add initial OpenBSD support
Signed-off-by: Brad Smith
---
meson.build | 2 +-
qga/commands-bsd.c | 5 +
qga/commands-posix.c | 9 +++--
qga/main.c | 4 ++--
4 files changed, 15 insertions(+), 5 deletions(-)
Reviewed-
On 29/10/22 10:24, Michael S. Tsirkin wrote:
On Fri, Oct 28, 2022 at 06:02:47PM +0200, Eugenio Pérez wrote:
Some fixes that did not get in time for the last net pull request.
Reviewed-by: Michael S. Tsirkin
Jason's tree since he has some bits this depends on.
FYI I made 2 comments/question
On 31/10/22 06:41, Richard Henderson wrote:
With odd_ofs set, we weren't copying enough data.
Fixes: 09eb6d7025d1 ("target/arm: Move sve zip high_ofs into simd_data")
Reported-by: Idan Horowitz
Signed-off-by: Richard Henderson
---
target/arm/sve_helper.c | 4 ++--
1 file changed, 2 insertio
On Sat, Oct 29, 2022 at 12:48:43AM +0200, Philippe Mathieu-Daudé wrote:
> On 28/10/22 18:02, Eugenio Pérez wrote:
> > This causes errors on virtio modern devices on big endian hosts
> >
> > Fixes: 01f8beacea2a ("vhost: toggle device callbacks using used event idx")
> > Signed-off-by: Eugenio Pérez
On 25/10/22 12:33, ~axelheider wrote:
From: Axel Heider
The CNT register is a read-only register. There is no need to
store it's value, it can be calculated on demand.
The calculated frequency is needed temporarily only.
Signed-off-by: Axel Heider
---
hw/timer/imx_epit.c | 42 ++
On 25/10/22 17:33, ~axelheider wrote:
From: Axel Heider
Signed-off-by: Axel Heider
---
hw/timer/imx_epit.c | 10 ++
1 file changed, 10 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On Tue, Oct 11, 2022 at 12:41:50PM +0200, Eugenio Pérez wrote:
> SVQ may run or not in a device depending on runtime conditions (for
> example, if the device can move CVQ to its own group or not).
>
> Allocate the resources unconditionally, and decide later if to use them
> or not.
>
> Signed-off
On 25/10/22 20:32, ~axelheider wrote:
From: Axel Heider
---
hw/timer/imx_epit.c | 3 +++
1 file changed, 3 insertions(+)
Reviewed-by: Philippe Mathieu-Daudé
On 29/10/22 18:41, ~axelheider wrote:
From: Axel Heider
Signed-off-by: Axel Heider
---
hw/timer/imx_epit.c | 11 ---
1 file changed, 4 insertions(+), 7 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 31/10/22 00:59, ~axelheider wrote:
From: Axel Heider
remove unused defines, add needed defines
Signed-off-by: Axel Heider
---
hw/timer/imx_epit.c | 4 ++--
include/hw/timer/imx_epit.h | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
Reviewed-by: Philippe Mathieu-Dau
On Tue, Oct 11, 2022 at 12:41:54PM +0200, Eugenio Pérez wrote:
> Isolate control virtqueue in its own group, allowing to intercept control
> commands but letting dataplane run totally passthrough to the guest.
>
> Signed-off-by: Eugenio Pérez
I guess we need svq for this. Not a reason to allocat
On 31/10/22 01:28, ~axelheider wrote:
From: Axel Heider
- simplify code, improve comments
- fix https://gitlab.com/qemu-project/qemu/-/issues/1263
This doesn't match GitLab issues closing pattern:
https://docs.gitlab.com/ee/user/project/issues/managing_issues.html#default-closing-pattern
S
On Sat, Oct 29, 2022 at 12:53 AM Philippe Mathieu-Daudé
wrote:
>
> On 28/10/22 18:02, Eugenio Pérez wrote:
> > This causes errors on virtio modern devices on big endian hosts
> >
> > Signed-off-by: Eugenio Pérez
> > ---
> > hw/virtio/vhost-shadow-virtqueue.c | 3 ++-
> > 1 file changed, 2 inse
On Mon, 31 Oct 2022 at 15:20, Michael S. Tsirkin wrote:
>
> On Mon, Oct 31, 2022 at 03:15:14PM +0800, Cindy Lu wrote:
> > ,
> >
> >
> > On Mon, 31 Oct 2022 at 15:04, Michael S. Tsirkin wrote:
> > >
> > > On Mon, Oct 31, 2022 at 11:10:20AM +0800, Cindy Lu wrote:
> > > > Add support for vIOMMU. add
References: https://gitlab.com/qemu-project/qemu/-/issues/1007
Signed-off-by: Drew DeVault
---
linux-user/syscall.c | 50 ++--
1 file changed, 44 insertions(+), 6 deletions(-)
diff --git a/linux-user/syscall.c b/linux-user/syscall.c
index f55cdebee5..795f7
We need to check HCR_E2H and HCR_TGE to select the right MMU index for
the correct translation regime.
To check for EL2&0 translation regime:
- For S1E0*, S1E1* and S12E* ops, check both HCR_E2H and HCR_TGE
- For S1E2* ops, check only HCR_E2H
Signed-off-by: Ake Koomsin
---
v2:
- Rebase with the
On Sat, Oct 29, 2022 at 12:48 AM Philippe Mathieu-Daudé
wrote:
>
> On 28/10/22 18:02, Eugenio Pérez wrote:
> > This causes errors on virtio modern devices on big endian hosts
> >
> > Fixes: 01f8beacea2a ("vhost: toggle device callbacks using used event idx")
> > Signed-off-by: Eugenio Pérez
> > -
From: Yicong Yang
Add and whitelist *.topology blobs, prepares for the aarch64's ACPI
topology building test.
Signed-off-by: Yicong Yang
---
tests/data/acpi/virt/APIC.topology | 0
tests/data/acpi/virt/DSDT.topology | 0
tests/data/acpi/virt/PPTT.topology | 0
tests/
From: Yicong Yang
This series mainly change the policy for building a cluster topology node
in PPTT. Previously we'll always build a cluster node in PPTT without
asking the user, after this set the cluster node will be built only the
the user specify through "-smp clusters=X".
One problem is rel
From: Yicong Yang
Currently we'll always generate a cluster node no matter user has
specified '-smp clusters=X' or not. Cluster is an optional level
and will participant the building of Linux scheduling domains and
only appears on a few platforms. It's unncessary to always build
it which cannot r
From: Yicong Yang
Add test for aarch64's ACPI topology building for all the supported
levels.
Acked-by: Michael S. Tsirkin
Signed-off-by: Yicong Yang
---
tests/qtest/bios-tables-test.c | 22 ++
1 file changed, 22 insertions(+)
diff --git a/tests/qtest/bios-tables-test.c b
From: Yicong Yang
Update the ACPI tables according to the acpi aml_build change.
Acked-by: Michael S. Tsirkin
Signed-off-by: Yicong Yang
---
tests/data/acpi/virt/PPTT | Bin 96 -> 76 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 1 -
2 files changed, 1 deletion(-)
d
From: Yicong Yang
Add *.topology tables for the aarch64's topology test.
Acked-by: Michael S. Tsirkin
Signed-off-by: Yicong Yang
---
tests/data/acpi/virt/APIC.topology | Bin 0 -> 700 bytes
tests/data/acpi/virt/DSDT.topology | Bin 0 -> 5398 bytes
tests/data/acpi/virt/PPTT.t
The following changes since commit 75d30fde55485b965a1168a21d016dd07b50ed32:
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into
staging (2022-10-30 15:07:25 -0400)
are available in the Git repository at:
https://gitlab.com/stweil/qemu.git tags/pull-qemu-202
From: Bin Meng
At present packaging the required DLLs of QEMU executables is a
manual process, and error prone.
Actually build/config-host.mak contains a GLIB_BINDIR variable
which is the directory where glib and other DLLs reside. This
works for both Windows native build and cross-build on Linu
From: Bin Meng
"make installer" on Windows fails with the following message:
Traceback (most recent call last):
File "G:\msys64\home\foo\git\qemu\scripts\nsis.py", line 89, in
main()
File "G:\msys64\home\foo\git\qemu\scripts\nsis.py", line 34, in main
with open(
OSError:
From: Bin Meng
libnfs.h declares nfs_fstat() as the following for win32:
int nfs_fstat(struct nfs_context *nfs, struct nfsfh *nfsfh,
struct __stat64 *st);
The 'st' parameter should be of type 'struct __stat64'. The
codes happen to build successfully for 64-bit Windows, but it
From: Bin Meng
There is no need to append a path separator to the destination
directory that is passed to "make install".
Signed-off-by: Bin Meng
Message-Id: <20220908132817.1831008-2-bmeng...@gmail.com>
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Stefan Weil
Signed-off-by: Stefan Weil
On Mon, Oct 31, 2022 at 2:43 PM Michael S. Tsirkin wrote:
>
> On Fri, Oct 28, 2022 at 09:49:36PM +0800, Yi Liu wrote:
> > On 2022/10/28 14:14, Jason Wang wrote:
> > > This patch introduce ECAP_PASID via "x-pasid-mode". Based on the
> > > existing support for scalable mode, we need to implement the
Am 31.10.22 um 07:52 schrieb Thomas Huth:
On 29/10/2022 15.45, Bin Meng wrote:
Stefan has reviewed / tested patch 1-3. Not sure who is going to queue
these 3 patches?
If Stefan has time for a pull request, I think he would be the best
fit. Stefan?
Otherwise, maybe Marc-André could take tho
On 2022/10/31 17:15, Jason Wang wrote:
On Mon, Oct 31, 2022 at 2:43 PM Michael S. Tsirkin wrote:
On Fri, Oct 28, 2022 at 09:49:36PM +0800, Yi Liu wrote:
On 2022/10/28 14:14, Jason Wang wrote:
This patch introduce ECAP_PASID via "x-pasid-mode". Based on the
existing support for scalable mode,
Hi Stefan
On Mon, Oct 31, 2022 at 1:27 PM Stefan Weil via wrote:
>
> Am 31.10.22 um 07:52 schrieb Thomas Huth:
>
> > On 29/10/2022 15.45, Bin Meng wrote:
> >> Stefan has reviewed / tested patch 1-3. Not sure who is going to queue
> >> these 3 patches?
> >
> > If Stefan has time for a pull request
On 31/10/22 09:17, Michael S. Tsirkin wrote:
On Sat, Oct 29, 2022 at 12:48:43AM +0200, Philippe Mathieu-Daudé wrote:
On 28/10/22 18:02, Eugenio Pérez wrote:
This causes errors on virtio modern devices on big endian hosts
Fixes: 01f8beacea2a ("vhost: toggle device callbacks using used event idx
Commit 85c4bf8aa6 ("vl: Unlink absolute PID file path") introduced a
critical error when the PID file path cannot be resolved. Before this
commit, it was possible to invoke QEMU when the PID file was a file
created with mkstemp that was already unlinked at the time of the
invocation. There might be
Signed-off-by: Stefan Weil
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
diff --git a/MAINTAINERS b/MAINTAINERS
index 64893e36bc..534b1b8a63 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -548,6 +548,7 @@ F: */*win32*
F: include/*/*win32*
X: qga/*win32*
F: qemu.nsi
+F: scripts/nsis.py
Liang Yan writes:
> With cpu.pmu=off, perfctr_core could still be seen in an AMD guest cpuid.
> By further digging, I found cpu.perfctr_core did the trick. However,
> considering the 'enable_pmu' in KVM could work on both Intel and AMD,
> we may add AMD PMU control under 'enabe_pmu' in QEMU too.
On Mon, Oct 31, 2022 at 1:57 PM Stefan Weil wrote:
>
> Signed-off-by: Stefan Weil
thanks
Reviewed-by: Marc-André Lureau
> ---
> MAINTAINERS | 1 +
> 1 file changed, 1 insertion(+)
>
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 64893e36bc..534b1b8a63 100644
> --- a/MAINTAINERS
> +++ b/MAI
On Thu, Oct 27, 2022 at 07:36:35PM +0100, Alex Bennée wrote:
> This test is hanging under heavy load when the two socats race while
> trying to create the socket. I've tried various approaches to avoid
> the race but it seems "creat=0" won't stop socat trying to create a
> pipe if it executes first
On Fri, 28 Oct 2022 at 09:24, Thomas Huth wrote:
> Brad Smith (2):
> tests/vm: update openbsd to release 7.2
> tests: Add sndio to the FreeBSD CI containers / VM
The lcitool submodule was updated in this commit without an
explanation. I looked through the libvirt-ci.git commits and fo
On 31/10/22 10:57, Stefan Weil via wrote:
Signed-off-by: Stefan Weil
---
MAINTAINERS | 1 +
1 file changed, 1 insertion(+)
Reviewed-by: Philippe Mathieu-Daudé
On Fri, 28 Oct 2022 at 13:46, Warner Losh wrote:
>
> The following changes since commit 344744e148e6e865f5a57e745b02a87e5ea534ad:
>
> Merge tag 'dump-pull-request' of https://gitlab.com/marcandre.lureau/qemu
> into staging (2022-10-26 10:53:49 -0400)
>
> are available in the Git repository at:
On Mon, Oct 31, 2022 at 9:25 AM Michael S. Tsirkin wrote:
>
> On Tue, Oct 11, 2022 at 12:41:54PM +0200, Eugenio Pérez wrote:
> > Isolate control virtqueue in its own group, allowing to intercept control
> > commands but letting dataplane run totally passthrough to the guest.
> >
> > Signed-off-by:
Am 31.10.22 um 08:52 schrieb Thomas Huth:
On 31/10/2022 08.43, Stefan Weil wrote:
`make check-spelling` can now be used to get a list of spelling errors.
It uses the latest version of codespell, a spell checker implemented
in Python.
Signed-off-by: Stefan Weil
---
This RFC can already be u
On Thu, 27 Oct 2022 10:15:58 -0400
"Michael S. Tsirkin" wrote:
> On Thu, Oct 27, 2022 at 03:52:53PM +0200, Igor Mammedov wrote:
> > On Thu, 27 Oct 2022 01:59:22 -0400
> > "Michael S. Tsirkin" wrote:
> >
> > > Just noticed this when disassembling:
> > >
> > > Parsing completed
> > > ACPI Warn
On Mon, 31 Oct 2022 at 00:29, Richard Henderson
wrote:
>
> On 10/31/22 04:21, Philippe Mathieu-Daudé wrote:
> > On 30/10/22 16:45, Peter Maydell wrote:
> >>> -#define TCG_TARGET_REG_BITS 64
> >>
> >> Why do we delete this?
> >
> > We get the default definition from include/tcg/tcg.h:
> >
> >58
On Thu, 27 Oct 2022 11:11:48 -0400
"Michael S. Tsirkin" wrote:
> we had such a beautiful structure for updating
> expected files, designed to keep bisect working.
> It turns out that we ignored the result of
> the allow list checks unless all tables matched
> anyway.
>
> Sigh.
strange,
it seems
On 31/10/2022 11.44, Stefan Weil wrote:
Am 31.10.22 um 08:52 schrieb Thomas Huth:
On 31/10/2022 08.43, Stefan Weil wrote:
`make check-spelling` can now be used to get a list of spelling errors.
It uses the latest version of codespell, a spell checker implemented in
Python.
Signed-off-by: St
On Mon, Oct 31, 2022 at 11:49:42AM +0100, Igor Mammedov wrote:
> On Thu, 27 Oct 2022 11:11:48 -0400
> "Michael S. Tsirkin" wrote:
>
> > we had such a beautiful structure for updating
> > expected files, designed to keep bisect working.
> > It turns out that we ignored the result of
> > the allow
On Mon, Oct 31, 2022 at 11:44:48AM +0100, Stefan Weil via wrote:
> Am 31.10.22 um 08:52 schrieb Thomas Huth:
>
> > On 31/10/2022 08.43, Stefan Weil wrote:
> > > `make check-spelling` can now be used to get a list of spelling errors.
> > > It uses the latest version of codespell, a spell checker im
On Mon, Oct 31, 2022 at 07:21:31PM +0800, wangyanan (Y) wrote:
> Hi Yicong,
>
> On 2022/10/31 17:05, Yicong Yang wrote:
> > From: Yicong Yang
> >
> > Update the ACPI tables according to the acpi aml_build change.
> We may also need the disassembled context of the table change
> in the commit mes
Reviewed-by: Konstantin Kostiuk
On Mon, Oct 31, 2022 at 10:12 AM Philippe Mathieu-Daudé
wrote:
> On 31/10/22 05:40, Brad Smith wrote:
> > qga: Add initial OpenBSD support
> >
> > Signed-off-by: Brad Smith
> > ---
> > meson.build | 2 +-
> > qga/commands-bsd.c | 5 +
> > qga/
Hi Yicong,
On 2022/10/31 17:05, Yicong Yang wrote:
From: Yicong Yang
Add test for aarch64's ACPI topology building for all the supported
levels.
Acked-by: Michael S. Tsirkin
Signed-off-by: Yicong Yang
---
tests/qtest/bios-tables-test.c | 22 ++
1 file changed, 22 inse
On 2022/10/31 17:05, Yicong Yang wrote:
From: Yicong Yang
Currently we'll always generate a cluster node no matter user has
specified '-smp clusters=X' or not. Cluster is an optional level
and will participant the building of Linux scheduling domains and
only appears on a few platforms.
It's
This is a respin of Bernhard's v4 with Freescale eSDHC implemented
as an 'UNIMP' region. See v4 cover here:
https://lore.kernel.org/qemu-devel/20221018210146.193159-1-shen...@gmail.com/
Only tested with the ppce500 machine (no further regression testing).
Since v4:
- Do not rename ESDHC_* definit
From: Bernhard Beschow
Allows e500 boards to have their root file system reside on flash using
only builtin devices located in the eLBC memory region.
Note that the flash memory area is only created when a -pflash argument is
given, and that the size is determined by the given file. The idea is
From: Bernhard Beschow
According to the JEDEC standard the device length is communicated to an
OS as an exponent (power of two).
Signed-off-by: Bernhard Beschow
Reviewed-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
Message-Id: <20221018210146.193159-3-shen...@gmail.com>
Signed-off-by: Phi
From: Bernhard Beschow
The documentation suggests that there is a qemu-system-ppc32 binary
while the 32 bit version is actually just named qemu-system-ppc. Settle
on qemu-system-ppc64 which also works for 32 bit machines and causes
less clutter in the documentation.
Found-by: BALATON Zoltan
Sug
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sdhci.c | 4
1 file changed, 4 insertions(+)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index 0e5e988927..f9c5b58e6d 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1332,6 +1332,10 @@ sdhci_write(void *opaque, hwaddr offset, uint64_t val,
Signed-off-by: Philippe Mathieu-Daudé
---
hw/sd/sdhci.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/sd/sdhci.c b/hw/sd/sdhci.c
index f9c5b58e6d..40f37694d5 100644
--- a/hw/sd/sdhci.c
+++ b/hw/sd/sdhci.c
@@ -1341,7 +1341,7 @@ static const MemoryRegionOps sdhci_mmio_ops =
From: Bernhard Beschow
Adds missing functionality to e500plat machine which increases the
chance of given "real" firmware images to access SD cards.
Signed-off-by: Bernhard Beschow
Message-Id: <20221018210146.193159-8-shen...@gmail.com>
[PMD: Simplify using create_unimplemented_device("esdhc")]
On Mon, Oct 31, 2022 at 9:21 AM Michael S. Tsirkin wrote:
>
> On Tue, Oct 11, 2022 at 12:41:50PM +0200, Eugenio Pérez wrote:
> > SVQ may run or not in a device depending on runtime conditions (for
> > example, if the device can move CVQ to its own group or not).
> >
> > Allocate the resources unco
On Mon, Oct 31, 2022 at 04:41:05PM +1100, Richard Henderson wrote:
> Delay cpu_list_add until realize is complete, so that cross-cpu
> interaction does not happen with incomplete cpu state. For this,
> we must delay plugin initialization out of tcg_exec_realizefn,
> because no cpu_index has been a
On 4/10/22 16:54, Peter Maydell wrote:
On Tue, 4 Oct 2022 at 14:33, Alex Bennée wrote:
Peter Maydell writes:
The MSC is in the address map like most other stuff, and thus there is
no restriction on whether it can be accessed by other things than CPUs
(DMAing to it would be silly but is perf
Hi Yicong,
On 2022/10/31 17:05, Yicong Yang wrote:
From: Yicong Yang
Update the ACPI tables according to the acpi aml_build change.
We may also need the disassembled context of the table change
in the commit message, for review.
For your reference: see patch 6 in [1]:
https://patchew.org/QEM
On 30/10/22 12:46, Bernhard Beschow wrote:
On Sun, Oct 30, 2022 at 1:10 AM Philippe Mathieu-Daudé
mailto:phi...@linaro.org>> wrote:
On 29/10/22 20:28, Bernhard Beschow wrote:
> Am 29. Oktober 2022 13:04:00 UTC schrieb Bernhard Beschow
mailto:shen...@gmail.com>>:
>> Am 29. O
Hi Daniel,
On 26/10/22 19:18, Daniel Henrique Barboza wrote:
Hi,
Since this is being sent to qemu-ppc and has to do with e500 I decided to
take a look. I acked the e500 related patches, 5 and 7. Patch 6 LGTM as
well
but I'd rather not ack it it's SD specific code.
I'll send a PowerPC pull re
On 30/10/22 23:27, Philippe Mathieu-Daudé wrote:
The following changes since commit 344744e148e6e865f5a57e745b02a87e5ea534ad:
Merge tag 'dump-pull-request' of https://gitlab.com/marcandre.lureau/qemu
into staging (2022-10-26 10:53:49 -0400)
are available in the Git repository at:
https:
On Fri, 28 Oct 2022 12:34:18 +0200
Bernhard Beschow wrote:
> The is_piix4 attribute is set once in one location and read once in
> another. Doing both in one location allows for removing the attribute
> altogether.
we also test for piix4 in acpi_get_pm_info(),
Perhaps we should move is_piix4 to
On 2022/10/31 19:48, wangyanan (Y) wrote:
> Hi Yicong,
>
> On 2022/10/31 17:05, Yicong Yang wrote:
>> From: Yicong Yang
>>
>> Add test for aarch64's ACPI topology building for all the supported
>> levels.
>>
>> Acked-by: Michael S. Tsirkin
>> Signed-off-by: Yicong Yang
>> ---
>> tests/qtest/b
On Mon, Oct 31, 2022 at 12:56:06PM +0100, Eugenio Perez Martin wrote:
> On Mon, Oct 31, 2022 at 9:21 AM Michael S. Tsirkin wrote:
> >
> > On Tue, Oct 11, 2022 at 12:41:50PM +0200, Eugenio Pérez wrote:
> > > SVQ may run or not in a device depending on runtime conditions (for
> > > example, if the d
Hi Michael and Yanan,
On 2022/10/31 20:30, Michael S. Tsirkin wrote:
> On Mon, Oct 31, 2022 at 07:21:31PM +0800, wangyanan (Y) wrote:
>> Hi Yicong,
>>
>> On 2022/10/31 17:05, Yicong Yang wrote:
>>> From: Yicong Yang
>>>
>>> Update the ACPI tables according to the acpi aml_build change.
>> We may
On Mon, Oct 31, 2022 at 18:01 Igor Mammedov wrote:
> On Mon, 31 Oct 2022 06:52:11 -0400
> "Michael S. Tsirkin" wrote:
>
> > On Mon, Oct 31, 2022 at 11:49:42AM +0100, Igor Mammedov wrote:
> > > On Thu, 27 Oct 2022 11:11:48 -0400
> > > "Michael S. Tsirkin" wrote:
> > >
> > > > we had such a beaut
On 2022/10/31 19:17, wangyanan (Y) wrote:
>
> On 2022/10/31 17:05, Yicong Yang wrote:
>> From: Yicong Yang
>>
>> Currently we'll always generate a cluster node no matter user has
>> specified '-smp clusters=X' or not. Cluster is an optional level
>> and will participant the building of Linux sche
Omitting errp for pci_add_capability() causes it to abort if
capabilities overlap. A caller of a PCIe function which calls
pci_add_capability() in turn is expected to ensure that will not
happen.
Signed-off-by: Akihiko Odaki
Acked-by: Jonathan Cameron (for CXL parts)
---
docs/pcie_sriov.txt
we had such a beautiful structure for updating
expected files, designed to keep bisect working.
It turns out that we ignored the result of
the allow list checks unless all tables matched
anyway.
Sigh.
Let's at least make it work going forward.
Signed-off-by: Michael S. Tsirkin
---
tests/qtest/
From: Robert Hoo
Since it will be heavily used in next patch, define macro
NVDIMM_DEVICE_DSM_UUID for "4309AC30-0D11-11E4-9191-0800200C9A66", which is
NVDIMM device specific method uuid defined in NVDIMM _DSM interface spec,
Section 3. [1]
No functional changes in this patch.
[1] https://pmem.i
On Mon, Oct 31, 2022 at 09:33:02PM +0900, Akihiko Odaki wrote:
> pci_add_capability appears most PCI devices. Its error handling required
> lots of code, and led to inconsistent behaviors such as:
> - passing error_abort
> - passing error_fatal
> - asserting the returned value
> - propagating the e
Holiday here tomorrow, so most likely this is it for features for this release.
The following changes since commit 75d30fde55485b965a1168a21d016dd07b50ed32:
Merge tag 'block-pull-request' of https://gitlab.com/stefanha/qemu into
staging (2022-10-30 15:07:25 -0400)
are available in the Git r
From: Robert Hoo
And empty bios-tables-test-allowed-diff.h.
Diff of ASL form, from qtest testlog.txt:
@@ -1,30 +1,30 @@
/*
* Intel ACPI Component Architecture
* AML/ASL+ Disassembler version 20180629 (64-bit version)
* Copyright (c) 2000 - 2018 Intel Corporation
*
* Disassembling to
Omitting errp for pci_add_capability() causes it to abort if
capabilities overlap. A caller of msi_init(), which calls
pci_add_capability() in turn, is expected to ensure that will not
happen.
Signed-off-by: Akihiko Odaki
---
hw/pci/msi.c | 9 +
1 file changed, 1 insertion(+), 8 deletion
Omitting errp for pci_add_capability() causes it to abort if
capabilities overlap. A caller of slotid_cap_init(), which calls
pci_add_capability() in turn, is expected to ensure that will not
happen.
Signed-off-by: Akihiko Odaki
---
hw/pci/slotid_cap.c | 8 ++--
1 file changed, 2 insertions(
From: Ani Sinha
e820 reserved entries were used before the dynamic entries with fw config files
were intoduced. Please see the following change:
7d67110f2d9a6("pc: add etc/e820 fw_cfg file")
Identical support was introduced into seabios as well with the following commit:
ce39bd4031820 ("Add supp
From: Lei He
virtio-crypto: Modify the current interface of virtio-crypto
device to support asynchronous mode.
Signed-off-by: lei he
Message-Id: <20221008085030.70212-2-helei.si...@bytedance.com>
Reviewed-by: Michael S. Tsirkin
Signed-off-by: Michael S. Tsirkin
---
include/sysemu/cryptodev.h
From: Ani Sinha
This introduces QEMU acpi/smbios biosbits avocado test which is run
from within the python virtual environment. When the bits tests are run, bits
binaries are downloaded from an external repo/location, bios bits iso is
regenerated containing the acpi/smbios bits tests that are mai
From: Ani Sinha
This change adds initial biosbits config file that instructs biosbits to run
bios test suits in batch mode. Additionally acpi and smbios structures are also
dumped.
Cc: Daniel P. Berrangé
Cc: Paolo Bonzini
Cc: Maydell Peter
Cc: John Snow
Cc: Thomas Huth
Cc: Alex Bennée
Cc:
From: Julia Suvorova
The new test is run with a large number of cpus and checks if the
core_count field in smbios_cpu_test (structure type 4) is correct.
Choose q35 as it allows to run with -smp > 255.
Signed-off-by: Julia Suvorova
Message-Id: <20220731162141.178443-5-jus...@redhat.com>
Messag
From: Lei He
Add encoding interfaces for DER encoding:
1. support decoding of 'bit string', 'octet string', 'object id'
and 'context specific tag' for DER encoder.
2. implemented a simple DER encoder.
3. add more testsuits for DER encoder.
Signed-off-by: lei he
Message-Id: <20221008085030.70212
From: Robert Hoo
In If condition, using bitwise and/or, rather than logical and/or.
The result change in AML code:
If (((Local6 == Zero) | (Arg0 != Local0)))
==>
If (((Local6 == Zero) || (Arg0 != Local0)))
If (((ObjectType (Arg3) == 0x04) & (SizeOf (Arg3) == One)))
==>
If (((ObjectType (Arg3)
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