Signed-off-by: Laurent Vivier
---
tests/qtest/meson.build | 1 +
tests/qtest/netdev-socket.c | 391
2 files changed, 392 insertions(+)
create mode 100644 tests/qtest/netdev-socket.c
diff --git a/tests/qtest/meson.build b/tests/qtest/meson.build
index e
Copied from socket netdev file and modified to use SocketAddress
to be able to introduce new features like unix socket.
"udp" and "mcast" are squashed into dgram netdev, multicast is detected
according to the IP address type.
"listen" and "connect" modes are managed by stream netdev. An optional
p
From: Stefano Brivio
Other errors are treated as failure by net_stream_client_init(),
but if connect() returns EINVAL, we'll fail silently. Remove the
related exception.
Signed-off-by: Stefano Brivio
[lvivier: applied to net/stream.c]
Signed-off-by: Laurent Vivier
Reviewed-by: Daniel P. Berran
To be consistent with socket_uri(), add 'tcp:' prefix for inet type in
socket_parse(), by default socket_parse() use tcp when no prefix is
provided (format is host:port).
In socket_uri(), use 'vsock:' prefix for vsock type rather than 'tcp:'
because it makes a vsock address look like an inet addre
Use QIOChannel, QIOChannelSocket and QIONetListener.
Signed-off-by: Laurent Vivier
---
net/stream.c| 482 +---
qemu-options.hx | 4 +-
2 files changed, 171 insertions(+), 315 deletions(-)
diff --git a/net/stream.c b/net/stream.c
index 0f91ff20df
As qemu_opts_parse_noisily() flattens the QAPI structures ("type" field
of Netdev structure can collides with "type" field of SocketAddress),
we introduce a way to bypass qemu_opts_parse_noisily() and use directly
visit_type_Netdev() to parse the backend parameters.
More details from Markus:
qemu
dgram_dst is a sockaddr_in structure. To be able to use it with
unix socket, use a pointer to a generic sockaddr structure.
Signed-off-by: Laurent Vivier
Reviewed-by: Stefano Brivio
---
net/dgram.c | 76 +++--
1 file changed, 45 insertions(+), 31
The BoF session will be in Lifey A (the big hall) this afternoon. I thought
being able to sit around tables while we discuss things would make things a
bit easier. We can share note taking on the etherpad:
https://etherpad.opendev.org/p/qemu-emulation-bof%40kvmforum2022
I'll run a HO at: https:
Rename SocketAddress_to_str() to socket_uri() and move it to
util/qemu-sockets.c close to socket_parse().
socket_uri() generates a string from a SocketAddress while
socket_parse() generates a SocketAddress from a string.
Signed-off-by: Laurent Vivier
---
include/qemu/sockets.h | 2 +-
monitor/
The only caller passes &error_fatal, so use this directly in the function.
It's what we do for -blockdev, -device, and -object.
Suggested-by: Markus Armbruster
Signed-off-by: Laurent Vivier
Reviewed-by: Markus Armbruster
---
include/net/net.h | 2 +-
net/net.c | 20 +++---
On 9/13/22 09:12, Alex Bennée wrote:
The BoF session will be in Lifey A (the big hall) this afternoon. I thought
being able to sit around tables while we discuss things would make things a bit
easier. We can share note taking on the etherpad:
https://etherpad.opendev.org/p/qemu-emulation-bof%4
On 9/12/22 13:26, Milica Lazarevic wrote:
The m_requested_instruction_categories field always has the same value,
ALL_ATTRIBUTES. The only use of that field is within the if statement.
When replaced with a specific value, the if statement is always false,
so it has been removed.
Now, when the on
On 9/12/22 13:26, Milica Lazarevic wrote:
We're deleting the m_pc field of the NMD class. It's now part of the
Dis_info struct that this patch introduces. Currently, the Dis_info
struct has just one field, m_pc, which we need for address calculation
in the ADDRESS function.
We're filling Dis_inf
On 9/12/22 13:26, Milica Lazarevic wrote:
Functions that have just one parameter and simply return it have been
deleted. Calls to these functions have been replaced with the argument
itself.
We're deleting following functions:
- both versions of copy()
- encode_s_from_address()
- encode_u_from_a
On 9/12/22 13:26, Milica Lazarevic wrote:
Following functions just wrap the decode_gpr_gpr3() function:
- encode_rs3_and_check_rs3_ge_rt3()
- encode_rs3_and_check_rs3_lt_rt3()
Therefore those have been deleted. Calls to these two functions have
been replaced with calls to decode_gpr_gpr3.
Signed
On 9/12/22 13:26, Milica Lazarevic wrote:
The return type of typedef disassembly_function is changed to char *
instead of std::string. Therefore, for every particular
disassembly_function function signature is changed.
For example:
- static std::string ABS_D(uint64 instruction, img_address m_pc)
On Tue, Sep 13, 2022 at 09:16:07AM +0200, Cédric Le Goater wrote:
> On 9/13/22 09:12, Alex Bennée wrote:
> > The BoF session will be in Lifey A (the big hall) this afternoon. I thought
> > being able to sit around tables while we discuss things would make things a
> > bit easier. We can share not
On 9/12/22 13:26, Milica Lazarevic wrote:
CPR functions has been removed.
Before this patch, we'd been calling img_format twice, the first time
through the CPR function to get an appropriate string and the second
time to print that formatted string. There's no more need for that.
Therefore, call
On 9/12/22 13:26, Milica Lazarevic wrote:
Both versions of IMMEDIATE functions have been removed.
Before this patch, we'd been calling img_format twice, the first time
through the IMMEDIATE to get an appropriate string and the second time
to print that string. There's no more need for that. Ther
On 9/12/22 13:26, Milica Lazarevic wrote:
Disassemble function that calls the other variant of it is deleted.
Where it is called, now we're directly calling the other implementation.
Signed-off-by: Milica Lazarevic
---
disas/nanomips.cpp | 7 +--
1 file changed, 1 insertion(+), 6 deletion
On 9/12/22 13:26, Milica Lazarevic wrote:
g_autofree attribute is added for every dynamically allocated string to
prevent memory leaking.
The implementation of the several functions that work with dynamically
allocated strings is slightly changed so we can add those attributes.
Signed-off-by: M
On 9/12/22 13:26, Milica Lazarevic wrote:
This patch expands the Dis_info struct, which should hold the
necessary data for handling runtime errors. Fields fprintf_func and
stream are in charge of error printing. Field buf enables the use of
sigsetjmp() and siglongjmp() functions. Support for runt
On 9/12/22 13:26, Milica Lazarevic wrote:
Now that everything has been converted to C code the nanomips.cpp file
has been renamed. Therefore, meson.build file is also changed.
Signed-off-by: Milica Lazarevic
---
disas/meson.build | 2 +-
disas/{nanomips.cpp => nanomips.c} | 0
On 9/12/22 13:26, Milica Lazarevic wrote:
Since there's no support for exception handling in C, the try-catch
blocks have been deleted, and throw clauses are replaced. When a runtime
error happens, we're printing out the error message. Disassembling of
the current instruction interrupts. This beh
On 9/12/22 00:04, Paolo Bonzini wrote:
+while (vec_len > 8) {
+vec_len -= 8;
+tcg_gen_shli_tl(s->T0, s->T0, 8);
+tcg_gen_ld8u_tl(t, cpu_env, offsetof(CPUX86State, xmm_t0.ZMM_B(vec_len
- 1)));
+tcg_gen_or_tl(s->T0, s->T0, t);
}
The shl + or is deposit,
On 9/12/22 00:04, Paolo Bonzini wrote:
+void glue(helper_vtestps, SUFFIX)(CPUX86State *env, Reg *d, Reg *s)
+{
+uint64_t zf = 0, cf = 0;
uint32_t, to match the size of the operation.
+int i;
+
+for (i = 0; i < 2 << SHIFT; i++) {
+zf |= (s->L(i) & d->L(i));
+cf |=
$ cat mmap.c
#include
#include
int
main (void)
{
void *A;
size_t L = 0, U, Max = 0;
for (U = 1; ; U *= 2)
{
A = mmap (0, U, PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE,
-1, 0);
if (A == (void *) -1)
break;
else
munmap (A, U);
}
while
Hi all,
I'm wondering if there is an official way to load bare metal software
within qemu emulations.
I've seen a lot of people (including us) using -kernel. However, the
doc seems to imply that the generic loader would be a better approach
(cf [1]). I know that the compatibility with older Qemus
On Thu, Sep 08, 2022, Kirill A. Shutemov wrote:
> On Wed, Aug 31, 2022 at 05:24:39PM +0300, Kirill A . Shutemov wrote:
> > On Sat, Aug 20, 2022 at 10:15:32PM -0700, Hugh Dickins wrote:
> > > > I will try next week to rework it as shim to top of shmem. Does it work
> > > > for you?
> > >
> > > Yes,
On 9/12/22 00:04, Paolo Bonzini wrote:
Nothing special going on here, for once.
Hooray!
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 5 +++
target/i386/tcg/emit.c.inc | 76
target/i386/tcg/translate.c | 1 +
3 files ch
hi all,
I want to support sr-iov to virtio-net, How about this feature?
On Fri, Sep 9, 2022 at 5:50 AM Dongwon Kim wrote:
> The scanout is currently updated only if the whole rect is inside the
> scanout space. This is not a correct condition because the scanout should
> be updated even a small area in the scanout space is covered by the rect.
>
> Cc: Gerd Hoffmann
Hi
On Wed, Aug 24, 2022 at 12:52 PM Bin Meng wrote:
> From: Bin Meng
>
> The maximum number of wait objects for win32 should be
> MAXIMUM_WAIT_OBJECTS, not MAXIMUM_WAIT_OBJECTS + 1.
>
> Signed-off-by: Bin Meng
> ---
>
> Changes in v3:
> - move the check of adding the same HANDLE twice to a sep
From: "Dr. David Alan Gilbert"
When 'keyval_do_merge' checks consistency of types, if they mismatch
print the types so we get a hint of what's going on.
e.g.
qemu-system-x86_64: Parameter 'memory' used inconsistently (qstring/qdict)
Signed-off-by: Dr. David Alan Gilbert
---
util/keyval.c | 6
From: "Dr. David Alan Gilbert"
Fix the ordering of the help text so it's always after the commands
being defined. A few had got out of order. Keep 'info' at the end.
Signed-off-by: Dr. David Alan Gilbert
---
hmp-commands.hx | 46 +++---
1 file changed,
On 9/12/22 00:04, Paolo Bonzini wrote:
+static void gen_VMOVHPx_ld(DisasContext *s, CPUX86State *env, X86DecodedInsn
*decode)
+{
+if (decode->op[0].offset != decode->op[1].offset) {
+tcg_gen_ld_i64(s->tmp1_i64, cpu_env, decode->op[1].offset +
offsetof(XMMReg, XMM_Q(0)));
+tc
Hi
Please, send any topic that you are interested in covering.
At the end of Monday I will send an email with the agenda or the
cancellation of the call, so hurry up.
After discussions on the QEMU Summit, we are going to have always open a
KVM call where you can add topics.
Call details:
B
On 9/12/22 00:04, Paolo Bonzini wrote:
+static void decode_0F2B(DisasContext *s, CPUX86State *env, X86OpEntry *entry,
uint8_t *b)
+{
+static const X86OpEntry opcodes_0F2B[4] = {
+X86_OP_ENTRY3(MOVDQ, M,x, None,None, V,x, vex4), /* MOVNTPS */
+X86_OP_ENTRY3(MOVDQ, M
On Tue, 13 Sep 2022 08:39:46 +0200
Laurent Vivier wrote:
> "-netdev socket" only supports inet sockets.
>
> It's not a complex task to add support for unix sockets, but
> the socket netdev parameters are not defined to manage well unix
> socket parameters.
>
> As discussed in:
>
> "socket.c
On 9/12/22 00:04, Paolo Bonzini wrote:
+if (rfbm & XSTATE_YMM_MASK) {
+if (xstate_bv & XSTATE_BNDREGS_MASK) {
+do_xrstor_ymmh(env, ptr, ra);
Paste-o on second line.
Otherwise,
Reviewed-by: Richard Henderson
r~
On 9/12/22 00:04, Paolo Bonzini wrote:
From: Paul Brook
Include AVX, AVX2 and VAES in the guest cpuid features supported by TCG.
Signed-off-by: Paul Brook
Message-Id:<20220424220204.2493824-40-p...@nowt.org>
Signed-off-by: Paolo Bonzini
---
target/i386/cpu.c | 10 +-
1 file changed,
On 9/12/22 00:04, Paolo Bonzini wrote:
These are exactly the same as the non-VEX version, but one has to be careful
that only VEX.L=0 is allowed.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/decode-new.c.inc | 25 +
target/i386/tcg/emit.c.inc | 20 +++
On 9/12/22 00:04, Paolo Bonzini wrote:
Extracted from a patch by Paul Brook.
Signed-off-by: Paolo Bonzini
---
tests/tcg/i386/Makefile.target | 2 +-
tests/tcg/i386/test-avx.c | 201 ++---
tests/tcg/i386/test-avx.py | 3 +-
3 files changed, 112 insert
On 9/12/22 00:04, Paolo Bonzini wrote:
+tcg_gen_qemu_ld_i64(s->tmp1_i64, s->A0, s->mem_index, MO_64);
I just noticed this here, but please examine any other direct loads: you've forgotten the
endian specification: MO_64 | MO_LE, or MO_LEUQ for short.
r~
On 9/12/22 00:04, Paolo Bonzini wrote:
Everything else has been converted to the new decoder, so separate the
part that survives.
Signed-off-by: Paolo Bonzini
---
target/i386/tcg/translate.c | 104 +++-
1 file changed, 68 insertions(+), 36 deletions(-)
Review
On 9/12/22 00:03, Paolo Bonzini wrote:
target/i386: remove old SSE decoder
Patch 37 never arrived, but I can imagine what it looked like. :-)
The series is looking good. All of the nits were minor.
r~
From: Dmitry Osipenko
Host blobs don't need udmabuf, it's only needed by guest blobs. The host
blobs are utilized by the Mesa virgl driver when persistent memory mapping
is needed by a GL buffer, otherwise virgl driver doesn't use blobs.
Persistent mapping support bumps GL version from 4.3 to 4.5
From: Gerd Hoffmann
Use VIRTIO_GPU_SHM_ID_HOST_VISIBLE as id for virtio-gpu.
v2: Formatting fixes
Signed-off-by: Antonio Caggiano
Acked-by: Michael S. Tsirkin
---
hw/display/virtio-gpu-pci.c| 15 +++
hw/display/virtio-gpu.c| 1 +
hw/display/virtio-vga.c| 33 +
Support BLOB resources creation, mapping and unmapping by calling the
new stable virglrenderer 0.10 interface. Only enabled when available and
via the blob config. E.g. -device virtio-vga-gl,blob=true
v2: Fix memory leaks and unmap resource on destroy.
Signed-off-by: Antonio Caggiano
Signed-off-
Add shared memory and support blob resource creation, mapping and
unmapping through virglrenderer new stable APIs[0] when available.
[0] https://gitlab.freedesktop.org/virgl/virglrenderer/-/merge_requests/891
Antonio Caggiano (1):
virtio-gpu: Handle resource blob commands
Dmitry Osipenko (1):
On 9/13/22 10:35, Andreas Schwab wrote:
$ cat mmap.c
#include
#include
int
main (void)
{
void *A;
size_t L = 0, U, Max = 0;
for (U = 1; ; U *= 2)
{
A = mmap (0, U, PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE,
-1, 0);
if (A == (void *) -1)
break;
From: "Dr. David Alan Gilbert"
Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG'
and the data structure 'virtio_pci_shm_cap' to go with it.
They allow defining shared memory regions with sizes and offsets
of 2^32 and more.
Multiple instances of the capability are allowed and disting
On Mon, Sep 12, 2022 at 1:41 PM Richard Henderson
wrote:
>
> On 9/12/22 00:04, Paolo Bonzini wrote:
> > +/*
> > + * 00 = p* Pq, Qq (if mmx not NULL; no VEX)
> > + * 66 = vp* Vx, Hx, Wx
> > + *
> > + * These are really the same encoding, because 1) V is the same as P when
> > VEX.V
> > + * is not
On 9/13/22 11:56, Paolo Bonzini wrote:
On Mon, Sep 12, 2022 at 1:41 PM Richard Henderson
wrote:
On 9/12/22 00:04, Paolo Bonzini wrote:
+/*
+ * 00 = p* Pq, Qq (if mmx not NULL; no VEX)
+ * 66 = vp* Vx, Hx, Wx
+ *
+ * These are really the same encoding, because 1) V is the same as P when VEX.V
在 2022/9/8 下午5:46, Xiaojuan Yang 写道:
These patches integrate all previous patches, including
'[PATCH v1 0/2] Add mem hotplug and improve acpi dsdt (26 Aug )',
'[PATCH v1] hw/loongarch: Fix acpi ged irq number in dsdt table (19
Aug)',
'[PATCH v1 0/6] Add funtions for LoongArch virt machine (11 A
On Mon, 12 Sept 2022 at 18:45, Arwed Meyer wrote:
> thanks for adding some context. Good question.
> Unfortunately I don't know the device and migration code much, so I
> can't really say anything about this. I guess(!) it should be enough to
> save/load contents of struct MouseChardev. No idea if
On Tue, 13 Sept 2022 at 10:44, Clément Chigot wrote:
> I'm wondering if there is an official way to load bare metal software
> within qemu emulations.
> I've seen a lot of people (including us) using -kernel. However, the
> doc seems to imply that the generic loader would be a better approach
> (c
On Tue, Sep 13, 2022 at 09:44:27AM +, Sean Christopherson wrote:
> On Thu, Sep 08, 2022, Kirill A. Shutemov wrote:
> > On Wed, Aug 31, 2022 at 05:24:39PM +0300, Kirill A . Shutemov wrote:
> > > On Sat, Aug 20, 2022 at 10:15:32PM -0700, Hugh Dickins wrote:
> > > > > I will try next week to rewor
On Tue, Sep 13, 2022 at 6:57 PM Antonio Caggiano
wrote:
>
> From: "Dr. David Alan Gilbert"
>
> Define a new capability type 'VIRTIO_PCI_CAP_SHARED_MEMORY_CFG'
> and the data structure 'virtio_pci_shm_cap' to go with it.
> They allow defining shared memory regions with sizes and offsets
> of 2^32
On Tue, Sep 13, 2022 at 5:39 PM Clément Chigot wrote:
>
> Hi all,
>
> I'm wondering if there is an official way to load bare metal software
> within qemu emulations.
> I've seen a lot of people (including us) using -kernel. However, the
> doc seems to imply that the generic loader would be a bette
We had only been reporting the stage2 page size. This causes
problems if stage1 is using a larger page size (16k, 2M, etc),
but stage2 is using a smaller page size, because cputlb does
not set large_page_{addr,mask} properly.
Fix by using the max of the two page sizes.
Reported-by: Marc Zyngier
When use dpdk-vdpa tests vdpa device. You need to specify the mac address to
start the virtual machine through libvirt or qemu, but now, the libvirt or
qemu can call dpdk vdpa vendor driver's ops .get_config through
vhost_net_get_config
to get the mac address of the vdpa hardware without manual co
Before this commit, there were contradictory descriptions about size of EFER
register.
Line 113 says the size is 8 bytes.
Line 129 says the size is 4 bytes.
As a result, when GDB is debugging an OS running on QEMU, the GDB cannot
read 'g' packets correctly. This 'g' packet transmits values of each
Writes to SR may change security state, which may involve
a swap of %ssp with %usp as reflected in %a7. Finish the
writeback of %sp@+ before swapping stack pointers.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206
Signed-off-by: Richard Henderson
---
target/m68k/translate.c | 8 +++
The second was described by Mark in the lobby of KVM Forum.
The first was found by inspection of other uses of gen_helper_set_sr.
r~
Richard Henderson (2):
target/m68k: Fix MACSR to CCR
target/m68k: Perform writback before modifying SR
target/m68k/translate.c | 14 +-
1 file cha
First, we were writing to the entire SR register, instead
of only the flags portion. Second, we were not clearing C
as per the documentation (X was cleared via the 0xf mask).
Signed-off-by: Richard Henderson
---
target/m68k/translate.c | 6 --
1 file changed, 4 insertions(+), 2 deletions(-)
Andreas Schwab writes:
> $ cat mmap.c
> #include
> #include
>
> int
> main (void)
> {
> void *A;
> size_t L = 0, U, Max = 0;
> for (U = 1; ; U *= 2)
> {
> A = mmap (0, U, PROT_NONE, MAP_PRIVATE | MAP_ANONYMOUS | MAP_NORESERVE,
> -1, 0);
> if (A == (void *) -1)
> b
Clément Chigot writes:
> Hi all,
>
> I'm wondering if there is an official way to load bare metal software
> within qemu emulations.
> I've seen a lot of people (including us) using -kernel. However, the
> doc seems to imply that the generic loader would be a better approach
> (cf [1]). I know
Le 13/09/2022 à 16:28, Richard Henderson a écrit :
Writes to SR may change security state, which may involve
a swap of %ssp with %usp as reflected in %a7. Finish the
writeback of %sp@+ before swapping stack pointers.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206
Signed-off-by: Ri
On Tue, Sep 13, 2022, Kirill A. Shutemov wrote:
> On Tue, Sep 13, 2022 at 09:44:27AM +, Sean Christopherson wrote:
> > On Thu, Sep 08, 2022, Kirill A. Shutemov wrote:
> > > On Wed, Aug 31, 2022 at 05:24:39PM +0300, Kirill A . Shutemov wrote:
> > > > On Sat, Aug 20, 2022 at 10:15:32PM -0700, Hug
> > Hi all,
> >
> > I'm wondering if there is an official way to load bare metal software
> > within qemu emulations.
> > I've seen a lot of people (including us) using -kernel. However, the
> > doc seems to imply that the generic loader would be a better approach
> > (cf [1]). I know that the comp
Le 13/09/2022 à 16:28, Richard Henderson a écrit :
First, we were writing to the entire SR register, instead
of only the flags portion. Second, we were not clearing C
as per the documentation (X was cleared via the 0xf mask).
Signed-off-by: Richard Henderson
---
target/m68k/translate.c | 6 +
If translation is disabled, the default memory type is Device,
which requires alignment checking. Document, but defer, the
more general case of per-page alignment checking.
Reported-by: Idan Horowitz
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1204
Signed-off-by: Richard Henderson
-
On Tue, Sep 13, 2022 at 02:53:25PM +, Sean Christopherson wrote:
> > > Switching topics, what actually prevents mmapp() on the shim? I tried to
> > > follow,
> > > but I don't know these areas well enough.
> >
> > It has no f_op->mmap, so mmap() will fail with -ENODEV. See do_mmap().
> > (I
On Tue, Sep 13, 2022, Kirill A. Shutemov wrote:
> On Tue, Sep 13, 2022 at 02:53:25PM +, Sean Christopherson wrote:
> > > > Switching topics, what actually prevents mmapp() on the shim? I tried
> > > > to follow,
> > > > but I don't know these areas well enough.
> > >
> > > It has no f_op->mm
On 13/09/2022 15:28, Richard Henderson wrote:
Writes to SR may change security state, which may involve
a swap of %ssp with %usp as reflected in %a7. Finish the
writeback of %sp@+ before swapping stack pointers.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1206
Signed-off-by: Richar
On 13/09/2022 15:28, Richard Henderson wrote:
The second was described by Mark in the lobby of KVM Forum.
The first was found by inspection of other uses of gen_helper_set_sr.
r~
Richard Henderson (2):
target/m68k: Fix MACSR to CCR
target/m68k: Perform writback before modifying SR
tar
Le 13/09/2022 à 18:29, Mark Cave-Ayland a écrit :
On 13/09/2022 15:28, Richard Henderson wrote:
The second was described by Mark in the lobby of KVM Forum.
The first was found by inspection of other uses of gen_helper_set_sr.
r~
Richard Henderson (2):
target/m68k: Fix MACSR to CCR
targe
While it's unclear to me what git send-email actually does with the
-v2 parameter (it is not documented, but also not rejected), it does
not add a v2 tag to the email's subject, which is what led to the
mishap in [1].
[1]: https://lists.nongnu.org/archive/html/qemu-devel/2022-09/msg00679.html
---
From: Ross Lagerwall
When resuming after a migration, the backend sends CMD_INIT to the
emulator from the startup callback, then it sends the migration state
from the vmstate to the emulator, then it sends CMD_INIT again. Skip the
first CMD_INIT during a migration to avoid initializing the TPM tw
From: Ross Lagerwall
When running under Xen and the guest reboots, it boots into a new domain
with a new QEMU process (and a new swtpm process if using the emulator
backend). The existing reset function is triggered just before the old
QEMU process exists which causes QEMU to startup the TPM back
Swtpm may release the lock once the last one of its state blobs has been
migrated out. In case of VM migration failure QEMU now needs to notify
swtpm that it should again take the lock, which it can otherwise only do
once it has received the first TPM command from the VM.
Only try to send the lock
Use the latest tpm_ioctl.h from upstream swtpm project.
Signed-off-by: Stefan Berger
Reviewed-by: Marc-André Lureau
Message-id: 20220912174741.1542330-2-stef...@linux.ibm.com
---
backends/tpm/tpm_ioctl.h | 96 +++-
1 file changed, 76 insertions(+), 20 deletio
Hello!
This PR contains TPM-related patches for Xen and shared storage support.
Cheers!
Stefan
The following changes since commit 79dfa177ae348bb5ab5f97c0915359b13d6186e2:
Merge tag 'pull-qapi-2022-09-07' of git://repo.or.cz/qemu/armbru into staging
(2022-09-07 13:13:30 -0400)
are
On 9/13/22 17:29, Mark Cave-Ayland wrote:
Possibly it might be worth including a tidied-up version of the "WIP: target/m68k: always
exit_tb when changing sr with andi/ori/eori" commit from that branch which is also related
to switching between supervisor and user modes under MacOS. Shall I tidy
PECI - Platform Environment Control Interface
This commit adds support for reading basic sensor values from a client
on the PECI bus.
BMCs can use the PECI wire to get thermal information out of an Intel
cpu. Additionally, on hardware, various MSRs are exposed over the
PECI bus. Part of PCI config
The Platform Environment Control Interface (PECI), is a way for Intel
processors to communicate with management controllers.
This series of patches simulate some PECI subsystem functionality. This
work is currently used against Nuvoton 7xx BMC, but it can easily be
extended to support Aspeed BMCs.
On Fri, 9 Sept 2022 at 12:54, Peter Delevoryas wrote:
>
> On Tue, Sep 06, 2022 at 10:05:49PM +, Titus Rwantare wrote:
...
> >
> > This is something that can also be extended as other parameters arise that
> > need
> > to differ between platforms. So far you can have have different CPUs, DIMM
On Fri, 9 Sept 2022 at 12:58, Peter Delevoryas wrote:
> > +/*
> > + * PECI Client device
> > + * Copyright 2021 Google LLC
> > + *
> > + * SPDX-License-Identifier: GPL-2.0-or-later
>
> Not sure, but I think the SPDX license identifier is supposed to be in
> the first line? Maybe not though. I wou
On Fri, 9 Sept 2022 at 12:48, Peter Delevoryas wrote:
>
> On Tue, Sep 06, 2022 at 10:05:52PM +, Titus Rwantare wrote:
> > Signed-off-by: Titus Rwantare
> > Reviewed-by: Hao Wu
> > ---
...
> > +++ b/include/hw/peci/peci.h
> > @@ -112,6 +112,26 @@ typedef struct PECITempTarget {
> > uint8
This allows BMC firmware for npcm7xx BMCs to talk to a PECI client
in qemu.
Signed-off-by: Titus Rwantare
Reviewed-by: Patrick Venture
Reviewed-by: Peter Delevoryas
---
MAINTAINERS| 1 +
hw/arm/Kconfig | 1 +
hw/arm/npcm7xx.c | 9 ++
hw/p
Signed-off-by: Titus Rwantare
Reviewed-by: Hao Wu
---
hw/peci/peci-client.c | 63 ++
hw/peci/peci-core.c| 44 +++--
include/hw/peci/peci.h | 23 +++
3 files changed, 128 insertions(+), 2 deletions(-)
diff --git a/h
In ppc4xx_sdram_init() the struct is allocated with g_new0() so no
need to clear its elements. In the bamboo machine init memset can be
replaced with array initialiser which is shorter.
Signed-off-by: BALATON Zoltan
---
hw/ppc/ppc440_bamboo.c | 6 ++
hw/ppc/ppc4xx_devs.c | 8 ++--
2 fi
This is the end of the QOMify series started by Cédric. This series
handles the SDRAM controller models to clean them up, QOMify and unify
them and at least partially clean up the mess that has accumulated
around these in the past. This includes the not yet merged patches
from the last series and n
Instead of storing sdram bank parameters in unrelated arrays put them
in a struct so it's clear they belong to the same bank and simplify
the state struct using this bank type.
Signed-off-by: BALATON Zoltan
Reviewed-by: Philippe Mathieu-Daudé
---
hw/ppc/ppc440_uc.c | 49 +--
Change ppc4xx_sdram_banks() to take one Ppc4xxSdramBank array instead
of the separate arrays and adjust ppc4xx_sdram_init() and
ppc440_sdram_init() accordingly as well as machines using these.
Signed-off-by: BALATON Zoltan
---
v2: Use pointer for ram_banks in the prototype of the init funcs as
an
The do_init parameter of ppc4xx_sdram_init() is used to map memory
regions that is normally done by the firmware by programming the SDRAM
controller. This is needed when booting a kernel directly from -kernel
without a firmware. Do this from board code accesing normal SDRAM
controller registers the
Instead of checking if memory size is valid in board code move this
check to ppc4xx_sdram_init() as this is a restriction imposed by the
SDRAM controller.
Signed-off-by: BALATON Zoltan
---
hw/ppc/ppc405.h | 2 --
hw/ppc/ppc405_boards.c | 10 --
hw/ppc/ppc405_uc.c | 11 ++--
Signed-off-by: BALATON Zoltan
Reviewed-by: Cédric Le Goater
---
hw/ppc/ppc440_bamboo.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/ppc/ppc440_bamboo.c b/hw/ppc/ppc440_bamboo.c
index 2aac8a3fe9..2bd5e41140 100644
--- a/hw/ppc/ppc440_bamboo.c
+++ b/hw/ppc/ppc440_bamboo.c
Constants that are written zero padded for no good reason are hard to
read, it's easier to see what is meant if it's just 0 or 1 instead.
Signed-off-by: BALATON Zoltan
---
hw/ppc/ppc4xx_devs.c | 40
1 file changed, 20 insertions(+), 20 deletions(-)
diff
1 - 100 of 191 matches
Mail list logo
