Re: [PATCH v4 3/5] target/s390x: Fix cc_calc_sla_64() missing overflows

On 12.01.22 17:50, Ilya Leoshkevich wrote: > An overflow occurs for SLAG when at least one shifted bit is not equal > to sign bit. Therefore, we need to check that `shift + 1` bits are > neither all 0s nor all 1s. The current code checks only `shift` bits, > missing some overflows. > > Fixes: cbe2

Re: [PATCH v4 4/5] target/s390x: Fix shifting 32-bit values for more than 31 bits

On 12.01.22 17:50, Ilya Leoshkevich wrote: > According to PoP, both 32- and 64-bit shifts use lowest 6 address > bits. The current code special-cases 32-bit shifts to use only 5 bits, > which is not correct. For example, shifting by 32 bits currently > preserves the initial value, however, it's sup

Re: [PATCH v4 5/5] tests/tcg/s390x: Test shift instructions

On 12.01.22 17:50, Ilya Leoshkevich wrote: > Add a test for each shift instruction in order to to prevent > regressions. > > Signed-off-by: Ilya Leoshkevich > --- > tests/tcg/s390x/Makefile.target | 1 + > tests/tcg/s390x/shift.c | 270 > 2 files change

Re: [PATCH v1 1/2] decodetree: Add an optional predicate-function for decoding

On Thu, 13 Jan 2022 at 06:07, Alistair Francis wrote: > > On Thu, Jan 13, 2022 at 1:42 AM Philipp Tomsich > wrote: > > > > Alistair, > > > > Do you (and the other RISC-V custodians of target/riscv) have any opinion > > on this? > > We can go either way — and it boils down to a style and process

Re: [PATCH 0/3] malta: Move PCI interrupt handling from gt64xxx to piix4

Hi Bernhard, On 12/1/22 22:36, Bernhard Beschow wrote: Hi, first-time contributor here. Inspired by an article in LWN [1] I figured I'd get my hands dirty with QEMU development. According to the article my goal is to eliminate some "accidental complexity". While studying the code I noticed som

Re: [PATCH v2 2/6] hw/usb/canokey: Add trace events

On Fri, Jan 07, 2022 at 11:35:13PM +0800, Hongren (Zenithal) Zheng wrote: > Signed-off-by: Hongren (Zenithal) Zheng scripts/checkpatch.pl complains: ERROR: line over 90 characters #112: FILE: hw/usb/canokey.c:209: +trace_canokey_handle_data_out_err(ep_out, p->iov.size, key->ep_out_s

Re: [PATCH 09/15] audio: revert tests for pcm_ops table

On Thu, Jan 06, 2022 at 10:23:26AM +0100, Volker Rümelin wrote: > From: Volker Rümelin > > With previous commit every audio backend has a pcm_ops function > table. It's no longer necessary to test if the table is > available. This reverts commit cbaf25d1f5: "audio: fix > wavcapture segfault" You

Re: [PATCH v2 4/6] docs: Add CanoKey documentation

On 07/01/2022 16.37, Hongren (Zenithal) Zheng wrote: Signed-off-by: Hongren (Zenithal) Zheng --- docs/canokey.txt | 140 +++ I think this should likely rather go into the docs/system/devices directory instead? And it would be nice if you could also

Re: [PATCH v2 2/2] tests: add qtest for hw/sensor/sbtsi

On 13/01/2022 00.26, Patrick Venture wrote: From: Hao Wu Reviewed-by: Doug Evanwqs Signed-off-by: Hao Wu Signed-off-by: Patrick Venture --- tests/qtest/meson.build | 1 + tests/qtest/tmp_sbtsi-test.c | 161 +++ I'd prefer to use "-" instead of "_" i

Re: [PATCH v2] audio: Add sndio backend

On Mon, Dec 20, 2021 at 04:41:31PM +0100, Christian Schoenebeck wrote: > On Freitag, 17. Dezember 2021 10:38:32 CET Alexandre Ratchov wrote: > > sndio is the native API used by OpenBSD, although it has been ported to > > other *BSD's and Linux (packages for Ubuntu, Debian, Void, Arch, etc.). > > d

Re: [Virtio-fs] [PATCH] virtiofsd: Do not support blocking flock

On Tue, 11 Jan 2022 19:10:43 +0100 Sebastian Hasler wrote: > With the current implementation, blocking flock can lead to > deadlock. Thus, it's better to return EOPNOTSUPP if a user attempts > to perform a blocking flock request. > > Signed-off-by: Sebastian Hasler > --- > tools/virtiofsd/pass

Re: [PATCH v7 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

On Thu, Jan 13, 2022 at 02:48:15PM +0800, Peter Xu wrote: > On Thu, Jan 06, 2022 at 07:13:39PM -0300, Leonardo Bras wrote: > > @@ -558,15 +575,26 @@ static ssize_t qio_channel_socket_writev(QIOChannel > > *ioc, > > memcpy(CMSG_DATA(cmsg), fds, fdsize); > > } > > > > +if (flags

Re: [PATCH 3/4] acpi: fix OEM ID/OEM Table ID padding

On Thu, 13 Jan 2022, Dmitry V. Orekhov wrote: > I can't apply the patch to the qemu-6.1.0 source code on my own. > There is no acpi_table_begin function in the qemu-6.1.0 source code > (hw/acpi/aml-buld.c). > Try the following patch : >From 10620c384bf05f0a7561c1afd0ec8ad5af9b7c0f Mon Sep 17 00

Re: [PULL 00/31] testing/next and other misc fixes

Peter Maydell writes: (adding the s390x people to the CC if they have any clues) > On Wed, 12 Jan 2022 at 11:27, Alex Bennée wrote: >> >> The following changes since commit bf99e0ec9a51976868d7a8334620716df15fe7fe: >> >> Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into stag

Re: [PATCH v7 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

On Thu, Jan 13, 2022 at 10:06:14AM +, Daniel P. Berrangé wrote: > On Thu, Jan 13, 2022 at 02:48:15PM +0800, Peter Xu wrote: > > On Thu, Jan 06, 2022 at 07:13:39PM -0300, Leonardo Bras wrote: > > > @@ -558,15 +575,26 @@ static ssize_t qio_channel_socket_writev(QIOChannel > > > *ioc, > > >

[PATCH 0/2] TPM-CRB: Remove spurious error report when used with VFIO

launching a guest with a TPM-CRB device and VFIO-PCI devices. The CRB command buffer currently is a RAM MemoryRegion and given its base address alignment, it causes an error report on vfio_listener_region_add(). This series proposes to use a ram-device region instead which helps in better assessin

[PATCH 2/2] hw/vfio/common: Silence ram device offset alignment error traces

Failing to DMA MAP a ram_device should not cause an error message. This is currently happening with the TPM CRB command region and this is causing confusion. We may want to keep the trace for debug purpose though. Signed-off-by: Eric Auger --- I am not totally clear why we do not fail on the n

[PATCH 1/2] tpm: CRB: Use ram_device for "tpm-crb-cmd" region

Representing the CRB cmd/response buffer as a standard RAM region causes some trouble when the device is used with VFIO. Indeed VFIO attempts to DMA_MAP this region as usual RAM but this latter does not have a valid page size alignment causing such an error report: "vfio_listener_region_add receive

Re: [PATCH v6 13/23] target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs

On Wed, Jan 12, 2022 at 5:46 PM Frank Chang wrote: > > Anup Patel 於 2021年12月30日 週四 下午8:47寫道： >> >> From: Anup Patel >> >> The AIA specification introduces new [m|s|vs]topi CSRs for >> reporting pending local IRQ number and associated IRQ priority. >> >> Signed-off-by: Anup Patel >> Signed-off-b

Re: [PATCH v7 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

On Thu, Jan 13, 2022 at 06:34:12PM +0800, Peter Xu wrote: > On Thu, Jan 13, 2022 at 10:06:14AM +, Daniel P. Berrangé wrote: > > On Thu, Jan 13, 2022 at 02:48:15PM +0800, Peter Xu wrote: > > > On Thu, Jan 06, 2022 at 07:13:39PM -0300, Leonardo Bras wrote: > > > > @@ -558,15 +575,26 @@ static ssi

Re: [PATCH v6 09/23] target/riscv: Implement AIA local interrupt priorities

On Wed, Jan 12, 2022 at 8:30 AM Frank Chang wrote: > > On Wed, Jan 12, 2022 at 1:18 AM Anup Patel wrote: >> >> >> >> On Mon, Jan 10, 2022 at 6:38 PM Frank Chang wrote: >> > >> > Anup Patel 於 2021年12月30日 週四 下午8:38寫道： >> >> >> >> From: Anup Patel >> >> >> >> The AIA spec defines programmable 8-b

Re: [PATCH v6 11/23] target/riscv: Implement AIA hvictl and hviprioX CSRs

On Wed, Jan 12, 2022 at 6:45 PM Frank Chang wrote: > > Anup Patel 於 2021年12月30日 週四 下午8:41寫道： >> >> From: Anup Patel >> >> The AIA hvictl and hviprioX CSRs allow hypervisor to control >> interrupts visible at VS-level. This patch implements AIA hvictl >> and hviprioX CSRs. >> >> Signed-off-by: An

Re: [PATCH v7 1/5] QIOChannel: Add flags on io_writev and introduce io_flush callback

On Thu, Jan 06, 2022 at 07:13:38PM -0300, Leonardo Bras wrote: > Add flags to io_writev and introduce io_flush as optional callback to > QIOChannelClass, allowing the implementation of zero copy writes by > subclasses. > > How to use them: > - Write data using qio_channel_writev(...,QIO_CHANNEL_WR

Re: [PATCH] migration: Add canary to VMSTATE_END_OF_LIST

On Thu, 13 Jan 2022 at 01:21, Peter Xu wrote: > > On Wed, Jan 12, 2022 at 10:56:07AM +, Peter Maydell wrote: > > We could have vmstate_register_with_alias_id() iterate through > > and assert presence of the right terminator (probably only if > > qtest enabled, or some other suitable condition)

Re: [PATCH v2 1/2] hw/sensor: Add SB-TSI Temperature Sensor Interface

Hi Patrick, On 13/1/22 00:26, Patrick Venture wrote: From: Hao Wu SB Temperature Sensor Interface (SB-TSI) is an SMBus compatible interface that reports AMD SoC's Ttcl (normalized temperature), and resembles a typical 8-pin remote temperature sensor's I2C interface to BMC. This patch implemen

Re: [PATCH v2 1/4] include/qemu: rename Windows context definitions to expose bitness

On 13/1/22 01:52, Viktor Prutyanov wrote: Context structure in 64-bit Windows differs from 32-bit one and it should be reflected in its name. Signed-off-by: Viktor Prutyanov --- contrib/elf2dmp/main.c | 6 +++--- dump/win_dump.c | 14 +++--- include/qemu/win_dump

Re: [PATCH 0/3] malta: Move PCI interrupt handling from gt64xxx to piix4

Hi Philippe, On Thu, Jan 13, 2022 at 10:24 AM Philippe Mathieu-Daudé wrote: > Hi Bernhard, > > On 12/1/22 22:36, Bernhard Beschow wrote: > > Hi, > > > > first-time contributor here. Inspired by an article in LWN [1] I figured > I'd > > get my hands dirty with QEMU development. According to the a

Re: [PATCH v2 3/4] include/qemu: add 32-bit Windows dump structures

On 13/1/22 01:52, Viktor Prutyanov wrote: These structures are required to produce 32-bit guest Windows Complete Memory Dump. Add 32-bit Windows dump header, CPU context and physical memory descriptor structures along with corresponding definitions. Signed-off-by: Viktor Prutyanov --- include

Re: [PATCH v2 4/4] dump/win_dump: add 32-bit guest Windows support

On 13/1/22 01:52, Viktor Prutyanov wrote: Before this patch, 'dump-guest-memory -w' was accepting only 64-bit dump header provided by guest through vmcoreinfo and thus was unable to produce 32-bit guest Windows dump. So, add 32-bit guest Windows dumping support. Signed-off-by: Viktor Prutyanov

Re: [PATCH] docs/can: convert to restructuredText

On Wed, 5 Jan 2022 at 20:56, wrote: > > From: Lucas Ramage > > Buglink: https://gitlab.com/qemu-project/qemu/-/issues/527 > Signed-off-by: Lucas Ramage > --- > docs/{can.txt => system/can.rst} | 92 ++-- > docs/system/index.rst| 1 + > 2 files changed, 4

[PATCH v6 00/22] Support UXL filed in xstatus

In this patch set, we process the pc reigsters writes, gdb reads and writes, and address calculation under different UXLEN settings. The patch set v6 has been tested by running rv64 Linux with rv32 rootfs in compat mode. You can almost follow the test [1] given by GuoRen, except using the branch

[PATCH v6 01/22] target/riscv: Adjust pmpcfg access with mxl

Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson --- target/riscv/csr.c | 19 +++ target/riscv/pmp.c | 12 2 files changed, 23 insertions(+), 8 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index adb3d4381d..e7578f3e0f 100644 --- a/target

[PATCH v6 02/22] target/riscv: Don't save pc when exception return

As pc will be written by the xepc in exception return, just ignore pc in translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/helper.h | 4 ++-- target/riscv/insn_trans/trans_privileged.c.inc | 7 ++-

Re: [RFC PATCH v3 7/7] gitlab-ci: Support macOS 12 via cirrus-run

On 13/1/22 08:39, Thomas Huth wrote: On 10/01/2022 14.10, Philippe Mathieu-Daudé wrote: Add support for macOS 12 build on Cirrus-CI, similarly to commit 0e103a65ba1 ("gitlab: support for ... macOS 11 via cirrus-run"). Update the lcitool repository to get the macos12 mappings, and generate the v

[PATCH v6 06/22] target/riscv: Ignore the pc bits above XLEN

The read from PC for translation is in cpu_get_tb_cpu_state, before translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu_helper.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/target/riscv/cpu_helper.c b/

[PATCH v6 04/22] target/riscv: Sign extend pc for different XLEN

When pc is written, it is sign-extended to fill the widest supported XLEN. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- .../riscv/insn_trans/trans_privileged.c.inc | 2 +- target/riscv/insn_trans/trans_rvi.c.inc | 5 ++-- target/riscv/ins

[PATCH v6 03/22] target/riscv: Sign extend link reg for jal and jalr

Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvi.c.inc | 4 +--- target/riscv/translate.c| 4 +--- 2 files changed, 2 insertions(+), 6 deletions(-) diff --git a/target/riscv/insn_trans/trans_rvi.c.inc b/target/riscv/insn_trans/trans_rvi.c.inc index 3a0ae28fef..b9b

[PATCH v6 10/22] target/riscv: Adjust csr write mask with XLEN

Write mask is representing the bits we care about. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rvi.c.inc | 12 target/riscv/op_helper.c| 3 ++- 2 files changed, 10 insertions(+), 5 deleti

[PATCH v6 07/22] target/riscv: Extend pc for runtime pc write

In some cases, we must restore the guest PC to the address of the start of the TB, such as when the instruction counter hits zero. So extend pc register according to current xlen for these cases. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/

[PATCH v6 05/22] target/riscv: Create xl field in env

Signed-off-by: LIU Zhiwei --- target/riscv/cpu.c| 1 + target/riscv/cpu.h| 31 +++ target/riscv/cpu_helper.c | 34 ++ target/riscv/csr.c| 2 ++ target/riscv/machine.c| 10 ++ 5 files changed, 46 inse

[PATCH v6 17/22] target/riscv: Remove VILL field in VTYPE

Signed-off-by: LIU Zhiwei Acked-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 1 - 1 file changed, 1 deletion(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index 645a1b3f6c..85eb5c63cf 100644 --- a/target/riscv/cpu.h +++ b/target/riscv/cpu.h @@ -110,7 +

[PATCH v6 08/22] target/riscv: Use gdb xml according to max mxlen

Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.c | 8 ++--- target/riscv/gdbstub.c | 71 +++--- 2 files changed, 55 insertions(+), 24 deletions(-) diff --git a/target/riscv/cpu.c b/target/risc

Re: [PATCH] tests/qtest: add qtests for npcm7xx sdhci

On Fri, 7 Jan 2022 at 22:32, Patrick Venture wrote: > > From: Shengtan Mao > > Reviewed-by: Hao Wu > Reviewed-by: Chris Rauer > Signed-off-by: Shengtan Mao > --- > tests/qtest/meson.build | 1 + > tests/qtest/npcm7xx_sdhci-test.c | 201 +++ > 2 files cha

[PATCH v6 09/22] target/riscv: Relax debug check for pm write

Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/csr.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index b282a642f5..3f3afbed21 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -

Re: [PATCH 0/2] Adds designware i2c module and adds it to virt arm

On Thu, 13 Jan 2022 at 11:48, Peter Maydell wrote: > > On Mon, 10 Jan 2022 at 21:47, Patrick Venture wrote: > > > > This patch series introduces a new i2c module, namely the designware one > > and further enables this (optionally) for the virt-arm machine. > > > > Chris Rauer (2): > > hw/i2c:

[PATCH v6 12/22] target/riscv: Alloc tcg global for cur_pm[mask|base]

Replace the array of pm_mask/pm_base with scalar variables. Remove the cached array value in DisasContext. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/translate.c | 32 1 file changed, 8 insertions(+),

[PATCH v6 11/22] target/riscv: Create current pm fields in env

Signed-off-by: LIU Zhiwei Reviewed-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/cpu.c| 1 + target/riscv/cpu.h| 4 target/riscv/cpu_helper.c | 43 +++ target/riscv/csr.c| 19 + target/risc

[PATCH v6 13/22] target/riscv: Calculate address according to XLEN

Define one common function to compute a canonical address from a register plus offset. Merge gen_pm_adjust_address into this function. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/insn_trans/trans_rva.c.inc | 9 +++-- target/riscv

[PATCH v6 19/22] target/riscv: Adjust vector address with mask

The mask comes from the pointer masking extension, or the max value corresponding to XLEN bits. Signed-off-by: LIU Zhiwei Acked-by: Alistair Francis Reviewed-by: Richard Henderson --- target/riscv/vector_helper.c | 25 +++-- 1 file changed, 15 insertions(+), 10 deletions(-)

[PATCH v6 15/22] target/riscv: Split out the vill from vtype

We need not specially process vtype when XLEN changes. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 1 + target/riscv/cpu_helper.c| 3 +-- target/riscv/csr.c | 13 - target/riscv/machine.c

[PATCH v6 14/22] target/riscv: Split pm_enabled into mask and base

Use cached cur_pmmask and cur_pmbase to infer the current PM mode. This may decrease the TCG IR by one when pm_enabled is true and pm_base_enabled is false. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.h| 3 ++- target/ri

[PATCH v6 21/22] target/riscv: Enable uxl field write

Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/csr.c | 17 - 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index 8e67ff7c54..d944ee9caf 100644 --- a/target/riscv/csr

Re: [PATCH] migration: Add canary to VMSTATE_END_OF_LIST

On Thu, Jan 13, 2022 at 11:00:20AM +, Peter Maydell wrote: > On Thu, 13 Jan 2022 at 01:21, Peter Xu wrote: > > > > On Wed, Jan 12, 2022 at 10:56:07AM +, Peter Maydell wrote: > > > We could have vmstate_register_with_alias_id() iterate through > > > and assert presence of the right terminat

[PATCH v6 16/22] target/riscv: Adjust vsetvl according to XLEN

Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/cpu.h | 5 + target/riscv/vector_helper.c | 7 +-- 2 files changed, 10 insertions(+), 2 deletions(-) diff --git a/target/riscv/cpu.h b/target/riscv/cpu.h index abf217e34f..

Re: [PATCH v4 0/2] hw/arm/virt: Support for virtio-mem-pci

On Tue, 11 Jan 2022 at 06:34, Gavin Shan wrote: > > This series supports virtio-mem-pci device, by simply following the > implementation on x86. The exception is the block size is 512MB on > ARM64 instead of 128MB on x86, compatible with the memory section > size in linux guest. > > The work was d

[PATCH v6 18/22] target/riscv: Fix check range for first fault only

Only check the range that has passed the address translation. Signed-off-by: LIU Zhiwei Reviewed-by: Richard Henderson Reviewed-by: Alistair Francis --- target/riscv/vector_helper.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/target/riscv/vector_helper.c b/target/ri

Re: [PATCH 0/2] Adds designware i2c module and adds it to virt arm

On Mon, 10 Jan 2022 at 21:47, Patrick Venture wrote: > > This patch series introduces a new i2c module, namely the designware one and > further enables this (optionally) for the virt-arm machine. > > Chris Rauer (2): > hw/i2c: Add designware i2c controller. > hw/arm: Enable smbus on arm virt

[PATCH v6 20/22] target/riscv: Adjust scalar reg in vector with XLEN

When sew <= 32bits, not need to extend scalar reg. When sew > 32bits, if xlen is less that sew, we should sign extend the scalar register, except explicitly specified by the spec. Signed-off-by: LIU Zhiwei --- target/riscv/insn_trans/trans_rvv.c.inc | 2 +- 1 file changed, 1 insertion(+), 1 dele

Re: [PATCH 0/3] malta: Move PCI interrupt handling from gt64xxx to piix4

On 13/1/22 12:22, Bernhard Beschow wrote: Hi Philippe, On Thu, Jan 13, 2022 at 10:24 AM Philippe Mathieu-Daudé > wrote: > Bernhard Beschow (3): >    malta: Move PCI interrupt handling from gt64xxx to piix4 >    pci: Always pass own DeviceState to pci_map_

[PATCH v6 22/22] target/riscv: Relax UXL field for debugging

Signed-off-by: LIU Zhiwei --- target/riscv/csr.c | 7 --- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/target/riscv/csr.c b/target/riscv/csr.c index d944ee9caf..1037c6b15d 100644 --- a/target/riscv/csr.c +++ b/target/riscv/csr.c @@ -580,7 +580,7 @@ static RISCVException write

Re: [PATCH v7 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

On Thu, Jan 13, 2022 at 10:42:39AM +, Daniel P. Berrangé wrote: > On Thu, Jan 13, 2022 at 06:34:12PM +0800, Peter Xu wrote: > > On Thu, Jan 13, 2022 at 10:06:14AM +, Daniel P. Berrangé wrote: > > > On Thu, Jan 13, 2022 at 02:48:15PM +0800, Peter Xu wrote: > > > > On Thu, Jan 06, 2022 at 07:

Re: [PATCH v6 20/23] hw/intc: Add RISC-V AIA IMSIC device emulation

On Thu, Jan 13, 2022 at 12:56 PM Frank Chang wrote: > > Anup Patel 於 2021年12月30日 週四 下午9:00寫道： >> >> From: Anup Patel >> >> The RISC-V AIA (Advanced Interrupt Architecture) defines a new >> interrupt controller for MSIs (message signal interrupts) called >> IMSIC (Incoming Message Signal Interrup

Re: [PULL 00/31] testing/next and other misc fixes

Alex Bennée writes: > Peter Maydell writes: > > (adding the s390x people to the CC if they have any clues) > >> On Wed, 12 Jan 2022 at 11:27, Alex Bennée wrote: >>> >>> The following changes since commit bf99e0ec9a51976868d7a8334620716df15fe7fe: >>> >>> Merge remote-tracking branch 'remotes

Re: [PATCH v7 2/5] QIOChannelSocket: Implement io_writev zero copy flag & io_flush for CONFIG_LINUX

On Thu, Jan 06, 2022 at 07:13:39PM -0300, Leonardo Bras wrote: > For CONFIG_LINUX, implement the new zero copy flag and the optional callback > io_flush on QIOChannelSocket, but enables it only when MSG_ZEROCOPY > feature is available in the host kernel, which is checked on > qio_channel_socket_con

Re: [PATCH v7 3/5] migration: Add zero-copy parameter for QMP/HMP for Linux

On Thu, Jan 06, 2022 at 07:13:40PM -0300, Leonardo Bras wrote: > Add property that allows zero-copy migration of memory pages, > and also includes a helper function migrate_use_zero_copy() to check > if it's enabled. > > No code is introduced to actually do the migration, but it allow > future imp

Re: [PATCH v7 4/5] migration: Add migrate_use_tls() helper

On Thu, Jan 06, 2022 at 07:13:41PM -0300, Leonardo Bras wrote: > A lot of places check parameters.tls_creds in order to evaluate if TLS is > in use, and sometimes call migrate_get_current() just for that test. > > Add new helper function migrate_use_tls() in order to simplify testing > for TLS usa

Re: [PATCH v4 07/23] multifd: Use proper maximum compression values

* Juan Quintela (quint...@redhat.com) wrote: > It happens that there are functions to calculate the worst possible > compression size for a packet. Use them. > > Suggested-by: Dr. David Alan Gilbert > Signed-off-by: Juan Quintela Reviewed-by: Dr. David Alan Gilbert > --- > migration/multifd

Re: [PULL 00/34] ppc queue

On Wed, 12 Jan 2022 at 11:56, Cédric Le Goater wrote: > > The following changes since commit 7bb1272f40bdbdebcaec1737c412dcb52e414842: > > Merge remote-tracking branch > 'remotes/jsnow-gitlab/tags/python-pull-request' into staging (2022-01-11 > 14:20:42 +) > > are available in the Git repo

Re: [PULL V2 00/13] Net patches

On Wed, 12 Jan 2022 at 08:32, Jason Wang wrote: > > The following changes since commit 64c01c7da449bcafc614b27ecf1325bb08031c84: > > Merge remote-tracking branch 'remotes/philmd/tags/sdmmc-20220108' into > staging (2022-01-11 11:39:31 +) > > are available in the git repository at: > > htt

Re: [PATCH 1/2] tpm: CRB: Use ram_device for "tpm-crb-cmd" region

On 1/13/22 05:37, Eric Auger wrote: Representing the CRB cmd/response buffer as a standard RAM region causes some trouble when the device is used with VFIO. Indeed VFIO attempts to DMA_MAP this region as usual RAM but this latter does not have a valid page size alignment causing such an error r

Re: [PATCH] tests/qtest: add qtests for npcm7xx sdhci

Hi! On 07/01/2022 23.25, Patrick Venture wrote: [...] diff --git a/tests/qtest/npcm7xx_sdhci-test.c b/tests/qtest/npcm7xx_sdhci-test.c new file mode 100644 index 00..feb09b921a --- /dev/null +++ b/tests/qtest/npcm7xx_sdhci-test.c @@ -0,0 +1,201 @@ +/* + * QTests for NPCM7xx SD-3.0 / MMC

Re: [PATCH] Fix null pointer dereference in util/fdmon-epoll.c

On Tue, Jan 11, 2022 at 08:10:59PM +0800, Daniella Lee wrote: > Orginal qemu commit hash: de3f5223fa4cf8bfc5e3fe1fd495ddf468edcdf7 > In util/fdmon-epoll.c, function fdmon_epoll_update, variable "old_node" > maybe NULL with the condition, while it is directly used in the statement and > may lead t

Re: [PATCH v6 09/23] target/riscv: Implement AIA local interrupt priorities

On Thu, Jan 13, 2022 at 6:45 PM Anup Patel wrote: > On Wed, Jan 12, 2022 at 8:30 AM Frank Chang > wrote: > > > > On Wed, Jan 12, 2022 at 1:18 AM Anup Patel wrote: > >> > >> > >> > >> On Mon, Jan 10, 2022 at 6:38 PM Frank Chang > wrote: > >> > > >> > Anup Patel 於 2021年12月30日 週四 下午8:38寫道： > >>

Re: [PATCH v6 02/23] target/riscv: Implement SGEIP bit in hip and hie CSRs

Anup Patel 於 2021年12月30日 週四 下午8:36寫道： > From: Anup Patel > > A hypervisor can optionally take guest external interrupts using > SGEIP bit of hip and hie CSRs. > > Signed-off-by: Anup Patel > Signed-off-by: Anup Patel > Reviewed-by: Alistair Francis > --- > target/riscv/cpu.c | 3 ++- >

Re: [PATCH 1/2] tpm: CRB: Use ram_device for "tpm-crb-cmd" region

Hi Stefan, On 1/13/22 3:06 PM, Stefan Berger wrote: > > On 1/13/22 05:37, Eric Auger wrote: >> Representing the CRB cmd/response buffer as a standard >> RAM region causes some trouble when the device is used >> with VFIO. Indeed VFIO attempts to DMA_MAP this region >> as usual RAM but this latter

[PATCH V2 for-6.2 0/2] fixes for bdrv_co_block_status

V1->V2: Patch 1: Treat a hole just like an unallocated area. [Ilya] Patch 2: Apply workaround only for pre-Quincy librbd versions and ensure default striping and non child images. [Ilya] Peter Lieven (2): block/rbd: fix handling of holes in .bdrv_co_block_status block/rbd: workarou

[PATCH V2 for-6.2 1/2] block/rbd: fix handling of holes in .bdrv_co_block_status

the assumption that we can't hit a hole if we do not diff against a snapshot was wrong. We can see a hole in an image if we diff against base if there exists an older snapshot of the image and we have discarded blocks in the image where the snapshot has data. Fix this by simply handling a hole

[PATCH V2 for-6.2 2/2] block/rbd: workaround for ceph issue #53784

librbd had a bug until early 2022 that affected all versions of ceph that supported fast-diff. This bug results in reporting of incorrect offsets if the offset parameter to rbd_diff_iterate2 is not object aligned. This patch works around this bug for pre Quincy versions of librbd. Cc: qemu-sta...

[PATCH 1/2] printer: Introduce printer subsystem

From: zhangruien This patch describes the skeleton of QEMU printer subsystem with a dummy builtin driver. Signed-off-by: zhangruien --- MAINTAINERS | 7 ++ include/printer/printer.h | 42 ++ meson.build | 12 ++- meson_options.txt | 3 + printe

[PATCH 0/2] Introduce printer subsystem and USB printer device

From: zhangruien Currently, printer support in QEMU can generally be considered with these approaches: 1) USB passthrough & redirection, with the limitation of flexibility and transport-specific issues that come along with. 2) Network reachability with network printers, which is also driver-

[PATCH 2/2] usb-printer: Introduce USB printer class

From: zhangruien The USB printer device emulation is currently provided with: 1) Definitions and corresponding action handlers of class-specific requests with essential descriptors in USB Printer Class Specification 1.1 [1]. 2) Extended definitions of interface protocol and class-specific

Re: [PATCH 3/4] acpi: fix OEM ID/OEM Table ID padding

On 1/13/22 13:22, Ani Sinha wrote: On Thu, 13 Jan 2022, Dmitry V. Orekhov wrote: I can't apply the patch to the qemu-6.1.0 source code on my own. There is no acpi_table_begin function in the qemu-6.1.0 source code (hw/acpi/aml-buld.c). Try the following patch : From 10620c384bf05f0a7561c1af

[PATCH v12 2/7] net/vmnet: add vmnet backends to qapi/net

Create separate netdevs for each vmnet operating mode: - vmnet-host - vmnet-shared - vmnet-bridged Signed-off-by: Vladislav Yaroshchuk --- net/clients.h | 11 net/meson.build | 7 +++ net/net.c | 10 net/vmnet-bridged.m | 25 + net/vmnet-common.m | 20

Re: [PATCH 3/4] acpi: fix OEM ID/OEM Table ID padding

On 1/12/22 16:03, Igor Mammedov wrote: Commit [2] broke original '\0' padding of OEM ID and OEM Table ID fields in headers of ACPI tables. While it doesn't have impact on default values since QEMU uses 6 and 8 characters long values respectively, it broke usecase where IDs are provided on QEMU CL

[PATCH v12 0/7] Add vmnet.framework based network backend

macOS provides networking API for VMs called 'vmnet.framework': https://developer.apple.com/documentation/vmnet We can provide its support as the new QEMU network backends which represent three different vmnet.framework interface usage modes: * `vmnet-shared`: allows the guest to communicat

[PATCH v12 1/7] net/vmnet: add vmnet dependency and customizable option

vmnet.framework dependency is added with 'vmnet' option to enable or disable it. Default value is 'auto'. vmnet features to be used are available since macOS 11.0, corresponding probe is created into meson.build. Signed-off-by: Vladislav Yaroshchuk --- meson.build | 16 +++

[PATCH v12 5/7] net/vmnet: implement bridged mode (vmnet-bridged)

Signed-off-by: Vladislav Yaroshchuk --- net/vmnet-bridged.m | 105 +--- 1 file changed, 100 insertions(+), 5 deletions(-) diff --git a/net/vmnet-bridged.m b/net/vmnet-bridged.m index 4e42a90391..f528af036c 100644 --- a/net/vmnet-bridged.m +++ b/net/vmnet-b

[PATCH v12 4/7] net/vmnet: implement host mode (vmnet-host)

Signed-off-by: Vladislav Yaroshchuk --- net/vmnet-host.c | 110 --- 1 file changed, 104 insertions(+), 6 deletions(-) diff --git a/net/vmnet-host.c b/net/vmnet-host.c index 4a5ef99dc7..90430dcb1a 100644 --- a/net/vmnet-host.c +++ b/net/vmnet-host.c @@

[PATCH v12 3/7] net/vmnet: implement shared mode (vmnet-shared)

Interaction with vmnet.framework in different modes differs only on configuration stage, so we can create common `send`, `receive`, etc. procedures and reuse them. vmnet.framework supports iov, but writing more than one iov into vmnet interface fails with 'VMNET_INVALID_ARGUMENT'. Collecting provi

[PATCH v12 7/7] net/vmnet: update MAINTAINERS list

Signed-off-by: Vladislav Yaroshchuk --- MAINTAINERS | 5 + 1 file changed, 5 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index c98a61caee..638d129305 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2641,6 +2641,11 @@ W: http://info.iet.unipi.it/~luigi/netmap/ S: Maintained F: net/n

[PATCH v12 6/7] net/vmnet: update qemu-options.hx

Signed-off-by: Vladislav Yaroshchuk --- qemu-options.hx | 25 + 1 file changed, 25 insertions(+) diff --git a/qemu-options.hx b/qemu-options.hx index ec90505d84..81dd34f550 100644 --- a/qemu-options.hx +++ b/qemu-options.hx @@ -2732,6 +2732,25 @@ DEF("netdev", HAS_ARG, QE

[PATCH] ppc/ppc405: Fix TLB flushing

Commit cd0c6f473532 did not take into account 405 CPUs when adding support to batching of TCG tlb flushes. Set the TLB_NEED_LOCAL_FLUSH flags when the SPR_40x_PID is switched and when the TLB updated. Cc: Thomas Huth Cc: Christophe Leroy Cc: Fabiano Rosas Fixes: cd0c6f473532 ("ppc: Do some batc

Re: [PULL v2 21/36] backends: move dbus-vmstate1.xml to backends/

On Tue, 21 Dec 2021 at 07:04, wrote: > > From: Marc-André Lureau > > Although not used by the backend itself, use a common location for > documentation and sharing purposes. > > Signed-off-by: Marc-André Lureau > Acked-by: Gerd Hoffmann > --- > {tests/qtest => backends}/dbus-vmstate1.xml | 0 >

Re: [PATCH] docs/can: convert to restructuredText

Hi Peter, Thanks for that. The next on the list is docs/ccid.txt, should this go in the same "Device Emulation / Emulated Devices" section? It mentions USB at the top. Regards, ‐‐‐ Original Message ‐‐‐ On Thursday, January 13th, 2022 at 6:37 AM, Peter Maydell wrote: > On Wed, 5 Jan

[PATCH v8] isa-applesmc: provide OSK forwarding on Apple hosts

On Apple hosts we can read AppleSMC OSK key directly from host's SMC and forward this value to QEMU Guest. New 'hostosk' property is added: * `-device isa-applesmc,hostosk=on` The property is set to 'on' by default for machine version > 6.2 Apple licence allows use and run up to two additional co

Re: [PATCH v4 2/5] target/s390x: Fix SRDA CC calculation

On 12.01.22 17:50, Ilya Leoshkevich wrote: > SRDA uses r1_D32 for binding the first operand and s64 for setting CC. > cout_s64() relies on o->out being the shift result, however, > wout_r1_D32() clobbers it. > > Fix by using a temporary. > > Fixes: a79ba3398a0a ("target-s390: Convert SHIFT DOUBLE

[PATCH v2] virtiofsd: Do not support blocking flock

With the current implementation, blocking flock can lead to deadlock. Thus, it's better to return EOPNOTSUPP if a user attempts to perform a blocking flock request. Signed-off-by: Sebastian Hasler --- tools/virtiofsd/passthrough_ll.c | 9 + 1 file changed, 9 insertions(+) diff --git a/t

Re: [PATCH v11 1/7] net/vmnet: add vmnet dependency and customizable option

Fixed in v12. Thank you! ср, 12 янв. 2022 г. в 19:53, Roman Bolshakov : > On Wed, Jan 12, 2022 at 03:21:44PM +0300, Vladislav Yaroshchuk wrote: > > vmnet.framework dependency is added with 'vmnet' option > > to enable or disable it. Default value is 'auto'. > > > > vmnet features to be used are a

Re: [PATCH 1/2] tpm: CRB: Use ram_device for "tpm-crb-cmd" region

On 1/13/22 09:40, Eric Auger wrote: Hi Stefan, On 1/13/22 3:06 PM, Stefan Berger wrote: On 1/13/22 05:37, Eric Auger wrote: Representing the CRB cmd/response buffer as a standard RAM region causes some trouble when the device is used with VFIO. Indeed VFIO attempts to DMA_MAP this region as u

Re: [PATCH] docs/can: convert to restructuredText

On Thu, 13 Jan 2022 at 15:26, Lucas Ramage wrote: > > Hi Peter, > > Thanks for that. > > The next on the list is docs/ccid.txt, should this go in the same "Device > Emulation / Emulated Devices" section? It mentions USB at the top. Yes, please. thanks -- PMM

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