The PAPR platform describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime component of the firmware (RTAS) has
been implemented as a 20 byte
On 6/7/21 01:46, BALATON Zoltan wrote:
The pegasos2 board comes with an Open Firmware compliant ROM based on
SmartFirmware but it has some changes that are not open source
therefore the ROM binary cannot be included in QEMU. Guests running on
the board however depend on services provided by th
On 6/14/21 5:52 PM, Peter Maydell wrote:
On Tue, 8 Jun 2021 at 17:10, Alexandre Iooss wrote:
This is a Cortex-M3 based machine. Information can be found at:
https://www.st.com/en/evaluation-tools/stm32vldiscovery.html
Signed-off-by: Alexandre Iooss
The commit message says this is Cortex-M3
On Mon, Jun 14 2021, John Snow wrote:
(...)
> # OS
>
> Currently "os: XXX" for BSD, Linux, Windows, and macOS.
>
> https://gitlab.com/qemu-project/qemu/-/labels?subscribed=&search=os%3A
>
> Multiple OS labels can be applied to an issue.
>
> Originally, we kept this label somewhat vague and have
On 14/06/2021 14:47, Philippe Mathieu-Daudé wrote:
On 6/14/21 1:59 PM, Mark Cave-Ayland wrote:
On 14/06/2021 10:01, Philippe Mathieu-Daudé wrote:
On 6/14/21 9:44 AM, Mark Cave-Ayland wrote:
On 14/06/2021 06:42, Philippe Mathieu-Daudé wrote:
On 6/13/21 12:26 PM, Mark Cave-Ayland wrote:
Com
On 6/14/21 8:19 PM, Klaus Jensen wrote:
On Jun 14 15:54, Jakub Jermář wrote:
An IRQ vector used by a completion queue cannot be deasserted without
first checking if the same vector does not need to stay asserted for
some other completion queue. To this end the controller structure is
extended by
On Wed, Jun 9, 2021 at 2:12 AM Alexandre Iooss wrote:
>
> This SoC is similar to stm32f205 SoC.
> This will be used by the STM32VLDISCOVERY to create a machine.
>
> Signed-off-by: Alexandre Iooss
> ---
> MAINTAINERS| 6 ++
> hw/arm/Kconfig | 6 ++
> hw/arm
On Fri, Jun 11, 2021 at 7:08 PM Frank Chang <0xc0de0...@gmail.com> wrote:
>
> LIU Zhiwei 於 2021年6月11日 週五 下午4:56寫道：
>>
>>
>> On 6/11/21 4:42 PM, Frank Chang wrote:
>>
>> LIU Zhiwei 於 2021年6月11日 週五 下午4:30寫道：
>>>
>>>
>>> On 6/11/21 4:15 PM, Frank Chang wrote:
>>>
>>> LIU Zhiwei 於 2021年4月9日 週五 下午3:5
On 12/06/2021 01.33, Richard Henderson wrote:
From: Richard Henderson
Now that the minimum gcc version is 7.5, we can use C11.
This will allow lots of cleanups to the code, currently
hidden behind macros in include/qemu/compiler.h.
Signed-off-by: Richard Henderson
---
configure | 4 ++--
On 15/06/2021 01.31, Richard Henderson wrote:
Now that the minimum gcc version is 7.5, we can use C11.
This will allow lots of cleanups to the code, currently
hidden behind macros in include/qemu/compiler.h.
Signed-off-by: Richard Henderson
---
configure | 4 ++--
meson.build | 2 +-
2 fi
On 15/06/2021 01.31, Richard Henderson wrote:
Signed-off-by: Richard Henderson
---
fpu/softfloat.c | 16 ++--
1 file changed, 10 insertions(+), 6 deletions(-)
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 4d0160fe9c..6e769f990c 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfl
On 15.06.21 05:07, Richard Henderson wrote:
Rename to s390_cpu_set_psw and s390_cpu_get_psw_mask at the
same time. Adjust so that they compile for user-only.
Signed-off-by: Richard Henderson
Reviewed-by: David Hildenbrand
--
Thanks,
David / dhildenb
On Tue, Jun 15, 2021 at 5:17 PM Alexandre IOOSS wrote:
>
> On 6/14/21 5:52 PM, Peter Maydell wrote:
> > On Tue, 8 Jun 2021 at 17:10, Alexandre Iooss wrote:
> >>
> >> This is a Cortex-M3 based machine. Information can be found at:
> >> https://www.st.com/en/evaluation-tools/stm32vldiscovery.html
>
On 15.06.21 05:07, Richard Henderson wrote:
Use s390_cpu_get_psw_mask so that we print the correct
architectural value of psw.mask. Do not print cc_op
unless tcg_enabled.
Signed-off-by: Richard Henderson
---
target/s390x/helper.c | 12 +++-
1 file changed, 7 insertions(+), 5 deletio
On 15.06.21 05:07, Richard Henderson wrote:
No change in behaviour, as gdbstub was correctly written to
install and extract the cc value.
Signed-off-by: Richard Henderson
---
target/s390x/gdbstub.c | 15 ++-
1 file changed, 2 insertions(+), 13 deletions(-)
diff --git a/target/s3
On 15.06.21 05:07, Richard Henderson wrote:
We want to use this function for debugging, and debug should
not modify cpu state (even non-architectural cpu state) lest
we introduce heisenbugs.
Signed-off-by: Richard Henderson
---
target/s390x/helper.c | 8
1 file changed, 4 insertions
On 6/15/21 9:41 AM, Alistair Francis wrote:
Aren't you missing some timers, like timer[5] 0x4000_0C00?
Alistair
I double-checked using the reference manual and the datasheet and there
is not timer[5]:
- page 36 of
https://www.st.com/resource/en/reference_manual/cd00246267-stm32f100xx-advance
On 15/06/2021 01.31, Richard Henderson wrote:
We will shortly convert lockable.h to _Generic, and we cannot
have two compatible types in the same expansion. Wrap QemuMutex
in a struct, and unwrap in qemu-thread-posix.c.
Signed-off-by: Richard Henderson
---
include/qemu/thread-posix.h | 10 ++
On Tue, Jun 15, 2021 at 06:49:15AM +0200, Gerd Hoffmann wrote:
> Hi,
>
> > Another possibility to eschew .o parsing is to add something like this to
> > the sources
> >
> > #ifdef QEMU_MODINFO
> > #define MODULE_METADATA(key, value) \
> >=<>= MODINFO key value
> > #else
> > #define MODULE_M
On 15/06/2021 01.31, Richard Henderson wrote:
Move the declarations from thread-win32.h into thread.h
and remove the macro redirection from thread-posix.h.
This will be required by following cleanups.
Signed-off-by: Richard Henderson
---
include/qemu/thread-posix.h | 4
include/qemu/th
On 6/14/21 6:04 PM, Peter Maydell wrote:
Is this definitely right? The STM32F00 datasheet I found
thinks it only has 61 external interrupts.
Yes you are right, I don't really known what I have done here. I will
fix this in next patchset version.
To double-check, it is described page 131 of
On 15/06/2021 01.31, Richard Henderson wrote:
_Static_assert is part of C11, which is now required.
Signed-off-by: Richard Henderson
---
configure | 18 --
include/qemu/compiler.h | 11 ---
2 files changed, 29 deletions(-)
diff --git a/configure b/conf
On 15.06.21 05:07, Richard Henderson wrote:
At present, we're referencing env->psw.mask directly, which
fails to ensure that env->cc_op is incorporated or updated.
Use s390_cpu_{set_psw,get_psw_mask} to fix this.
Mirror the kernel's cleaning of the psw.mask in save_sigregs
and restore_sigregs.
14.06.2021 13:36, Emanuele Giuseppe Esposito wrote:
On 04/06/2021 11:17, Emanuele Giuseppe Esposito wrote:
Attaching gdbserver implies that the qmp socket
should wait indefinitely for an answer from QEMU.
For Timeout class, create a @contextmanager that
switches Timeout with NoTimeout (empty
On Tue, Jun 15, 2021 at 5:50 PM Alexandre IOOSS wrote:
>
> On 6/15/21 9:41 AM, Alistair Francis wrote:
> > Aren't you missing some timers, like timer[5] 0x4000_0C00?
> >
> > Alistair
>
> I double-checked using the reference manual and the datasheet and there
> is not timer[5]:
> - page 36 of
> htt
On Sat, Jun 12, 2021 at 12:04 AM Anup Patel wrote:
>
> On Fri, Jun 11, 2021 at 2:16 PM Alistair Francis wrote:
> >
> > On Fri, Jun 11, 2021 at 3:04 PM Anup Patel wrote:
> > >
> > > On Fri, Jun 11, 2021 at 4:49 AM Alistair Francis
> > > wrote:
> > > >
> > > > On Sat, May 15, 2021 at 12:34 AM An
On Jun 15 09:42, Jakub Jermář wrote:
On 6/14/21 8:19 PM, Klaus Jensen wrote:
On Jun 14 15:54, Jakub Jermář wrote:
An IRQ vector used by a completion queue cannot be deasserted without
first checking if the same vector does not need to stay asserted for
some other completion queue. To this end t
On Mon, Jun 14, 2021 at 12:20 AM Lukas Jünger
wrote:
>
> QOMify sifive_uart model
>
> Signed-off-by: Lukas Jünger
Can you update the titles as requested by Bin?
After that:
Reviewed-by: Alistair Francis
Alistair
> ---
> include/hw/char/sifive_uart.h | 11 ++--
> hw/char/sifive_uart.c
Mahmoud Mandour writes:
> On 14/06/2021 11:01, Alexandre Iooss wrote:
>> Log instruction execution and memory access to a file.
>> This plugin can be used for reverse engineering or for side-channel analysis
>> using QEMU.
>>
>> Signed-off-by: Alexandre Iooss
>> ---
>> MAINTAINERS
On 15/06/2021 02.03, John Snow wrote:
On 6/7/21 11:31 AM, John Snow wrote:
Add "Bug" and "Feature Request" templates to the Gitlab interface to
help improve the quality of newly reported issues.
To see what this looks like, I've temporarily allowed my Gitlab fork to
diverge with these files mer
** Tags added: qemu-21.10
** Also affects: qemu (Ubuntu)
Importance: Undecided
Status: New
** Changed in: qemu (Ubuntu)
Status: New => Triaged
--
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https://bugs.launchpad.n
From: Bin Meng
Since commit 605def65 ("target/riscv: Use the RISCVException enum for CSR
operations")
the CSR predicate() function was changed to return RISCV_EXCP_NONE
instead of 0 for a valid CSR, but it forgot to update the dynamic
CSR XML generation codes in gdbstub.
Fixes: 605def65
Philippe Mathieu-Daudé writes:
> When the management layer queries a binary built using --disable-tpm
> for TPM devices, it gets confused by getting empty responses:
>
> { "execute": "query-tpm" }
> {
> "return": [
> ]
> }
> { "execute": "query-tpm-types" }
> {
> "retu
11.06.2021 22:03, Eric Blake wrote:
To save the user from having to check 'qemu-img info --backing-chain'
or other followup command to determine which "depth":n goes beyond the
chain, add a boolean field "backing" that is set only for unallocated
portions of the disk.
Signed-off-by: Eric Blake
-
Stefan Berger writes:
> On 6/14/21 4:12 PM, Philippe Mathieu-Daudé wrote:
>>
>> G I forgot to commit:
>>
>> -- >8 --
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 7d9cd290426..636bf2f5365 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -2707,7 +2707,6 @@ TPM
>> M: Stefan Berger
On 14/06/2021 19.32, John Snow wrote:
[...]
RTH raises the issue of the "TCI" subsystem of TCG, which is not a full
accelerator in its own right, but (I think) a special case of TCG. If I keep
the 1:1 mapping to ACCEL_CLASS_NAME, "accel: TCI" is inappropriate.
Some suggestions:
- "TCI" by itse
Richard Henderson writes:
> Rename to s390_cpu_set_psw and s390_cpu_get_psw_mask at the
> same time. Adjust so that they compile for user-only.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
14.06.2021 14:02, Paolo Bonzini wrote:
Add a testcase for the test fixed by commit 'async: the main AioContext
is only "current" if under the BQL.
Signed-off-by: Paolo Bonzini
Reviewed-by: Vladimir Sementsov-Ogievskiy
--
Best regards,
Vladimir
On 15.06.21 05:07, Richard Henderson wrote:
The PSW_MASK_CC component of psw.mask was not handled properly
in the creation or restoration of signal frames.
Maybe add a Reported-by: jonathan.albre...@linux.vnet.ibm.com
in the right patches?
Richard Henderson (5):
target/s390x: Expose
Libvirt's "domcapabilities" command has a way to state whether certain
graphic frontends are available in QEMU or not. Originally, libvirt
looked at the "--help" output of the QEMU binary to determine whether
SDL was available or not (by looking for the "-sdl" parameter in the
help text), but since
Hi Alistair,
On Wed, Mar 31, 2021 at 11:53 PM Alistair Francis wrote:
>
> On Tue, Mar 30, 2021 at 10:18 PM Bin Meng wrote:
> >
> > The following check:
> >
> > if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
> > return -RISCV_EXCP_ILLEGAL_INST;
> > }
> >
> > is redundant in f
On Tue, 15 Jun 2021 at 08:16, Alexandre IOOSS wrote:
>
> On 6/14/21 5:52 PM, Peter Maydell wrote:
> > Could you add some documentation for the new board, please?
> > This lives in docs/system/arm. Commit c9f8511ea8d2b807 gives
> > an example of adding docs for a board.
> Should I rather:
> 1. Add
在 2021/6/12 上午12:49, Andrew Melnichenko 写道:
Hi,
So I think the series is for unprivileged_bpf disabled. If I'm not
wrong, I guess the policy is to grant CAP_BPF but do fine grain
checks
via LSM.
The main idea is to run eBPF RSS with qemu without any permission.
Libvirt should
On 6/15/21 10:04 AM, Alistair Francis wrote:
On Tue, Jun 15, 2021 at 5:50 PM Alexandre IOOSS wrote:
On 6/15/21 9:41 AM, Alistair Francis wrote:
Aren't you missing some timers, like timer[5] 0x4000_0C00?
Alistair
I double-checked using the reference manual and the datasheet and there
is n
On Thu, 3 Jun 2021 at 18:13, Peter Maydell wrote:
>
> Currently the Arm code in target/arm/kvm64.c which decides whether
> it should report memory errors via the ACPI GHES table works
> only with the 'virt' board; in fact it won't even link if the
> virt board is configured out of the QEMU binary.
On Sat, 12 Jun 2021 at 20:57, Richard Henderson
wrote:
>
> The test was off-by-one, because tag_last points to the
> last byte of the tag to check, thus tag_last - prev_page
> will equal TARGET_PAGE_SIZE when we use the first byte
> of the next page.
>
> Resolves: https://gitlab.com/qemu-project/q
Richard Henderson writes:
> The PSW_MASK_CC component of psw.mask was not handled properly
> in the creation or restoration of signal frames.
Still seeing issues running on s390x machine:
05:00:29 [ajb@qemu01:~/l/q/b/debug] s390x/signal-fixes|… 38 + retry.py -n 100
-c -- ./qemu-s390x ./tests
On Tue, Jun 15, 2021 at 06:54:41AM +0200, Gerd Hoffmann wrote:
> > > Problem with that approach is that it doesn't work for module
> > > dependencies ...
> > >
> > > Comments on the idea? Suggestions for the module dependency problem?
> > > Could maybe libbfd be used to find module (symbol) depen
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> Windows 10 calls an SMCCC call via SMC unconditionally on boot. It lives
> in the trusted application call number space, but its purpose is unknown.
>
> In our current SMC implementation, we inject a UDEF for unknown SMC calls,
> including th
Daniel Henrique Barboza writes:
> The spapr-nvdimm driver is able to operate in two ways. The first
> one is as a regular memory in which the NUMA node of the parent
> pc-dimm class is used. The second mode, as persistent memory, allows for
> a different NUMA node to be used based on the locality
On Mon, 14 Jun 2021 at 06:28, Philippe Mathieu-Daudé wrote:
>
> Commit 7de2e856533 made migration/qemu-file-channel.c include
> "io/channel-tls.h" but forgot to add the new GNUTLS dependency
> on Meson, leading to build failure on OSX:
>
> [2/35] Compiling C object libmigration.fa.p/migration_qe
On Tue, 15 Jun 2021, Alexey Kardashevskiy wrote:
On 6/7/21 01:46, BALATON Zoltan wrote:
The pegasos2 board comes with an Open Firmware compliant ROM based on
SmartFirmware but it has some changes that are not open source
therefore the ROM binary cannot be included in QEMU. Guests running on
the
On Tue, Jun 15, 2021 at 10:39:08AM +0100, Peter Maydell wrote:
> On Mon, 14 Jun 2021 at 06:28, Philippe Mathieu-Daudé wrote:
> >
> > Commit 7de2e856533 made migration/qemu-file-channel.c include
> > "io/channel-tls.h" but forgot to add the new GNUTLS dependency
> > on Meson, leading to build failu
Alex Bennée writes:
> Richard Henderson writes:
>
>> The PSW_MASK_CC component of psw.mask was not handled properly
>> in the creation or restoration of signal frames.
>
> Still seeing issues running on s390x machine:
>
> 05:00:29 [ajb@qemu01:~/l/q/b/debug] s390x/signal-fixes|… 38 + retry.py -
Richard Henderson writes:
> Now that the minimum gcc version is 7.5, we can use C11.
> This will allow lots of cleanups to the code, currently
> hidden behind macros in include/qemu/compiler.h.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Ok, thanks, then let's close this ticket now.
** Changed in: qemu
Status: Incomplete => Fix Released
--
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https://bugs.launchpad.net/bugs/1878323
Title:
Assertion-failure in usb_de
** Changed in: qemu
Status: Incomplete => Confirmed
--
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https://bugs.launchpad.net/bugs/1878057
Title:
null-ptr dereference in megasas_command_complete
Status in QEMU:
Confirmed
Richard Henderson writes:
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> With Apple Silicon available to the masses, it's a good time to add support
> for driving its virtualization extensions from QEMU.
>
> This patch adds all necessary architecture specific code to get basic VMs
> working. It's still pretty raw,
Richard Henderson writes:
> _Static_assert is part of C11, which is now required.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On Tue, 15 Jun 2021, Alexey Kardashevskiy wrote:
The PAPR platform describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it specifies
require collaboration between the firmware and the hypervisor.
Since the beginning, the runtime component of th
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> From: Peter Collingbourne
>
> Sleep on WFI until the VTIMER is due but allow ourselves to be woken
> up on IPI.
>
> In this implementation IPI is blocked on the CPU thread at startup and
> pselect() is used to atomically unblock the signal a
On Tue, Jun 15, 2021 at 7:15 PM Alexandre IOOSS wrote:
>
>
>
> On 6/15/21 10:04 AM, Alistair Francis wrote:
> > On Tue, Jun 15, 2021 at 5:50 PM Alexandre IOOSS wrote:
> >>
> >> On 6/15/21 9:41 AM, Alistair Francis wrote:
> >>> Aren't you missing some timers, like timer[5] 0x4000_0C00?
> >>>
> >>>
On Tue, Jun 15, 2021 at 6:51 PM Bin Meng wrote:
>
> From: Bin Meng
>
> Since commit 605def65 ("target/riscv: Use the RISCVException enum for CSR
> operations")
> the CSR predicate() function was changed to return RISCV_EXCP_NONE
> instead of 0 for a valid CSR, but it forgot to update the dyn
On Tue, Jun 15, 2021 at 7:07 PM Bin Meng wrote:
>
> Hi Alistair,
>
> On Wed, Mar 31, 2021 at 11:53 PM Alistair Francis
> wrote:
> >
> > On Tue, Mar 30, 2021 at 10:18 PM Bin Meng wrote:
> > >
> > > The following check:
> > >
> > > if (!env->debugger && !riscv_cpu_fp_enabled(env)) {
> > >
Richard Henderson writes:
> Move the declarations from thread-win32.h into thread.h
> and remove the macro redirection from thread-posix.h.
> This will be required by following cleanups.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
Richard Henderson writes:
> Create macros for file+line expansion in qemu_rec_mutex_unlock
> like we have for qemu_mutex_unlock.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> Now that we have working system register sync, we push more target CPU
> properties into the virtual machine. That might be useful in some
> situations, but is not the typical case that users want.
>
> So let's add a -cpu host option that all
Richard Henderson writes:
> We will shortly convert lockable.h to _Generic, and we cannot
> have two compatible types in the same expansion. Wrap QemuMutex
> in a struct, and unwrap in qemu-thread-posix.c.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> Now that we have all logic in place that we need to handle
> Hypervisor.framework
> on Apple Silicon systems, let's add CONFIG_HVF for aarch64 as well so that we
> can build it.
>
> Signed-off-by: Alexander Graf
> Reviewed-by: Roman Bolshak
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> Windows 10 calls an SMCCC call via SMC unconditionally on boot. It lives
> in the trusted application call number space, but its purpose is unknown.
>
> In our current SMC implementation, we inject a UDEF for unknown SMC calls,
> including th
Ping.
On Wed, Jun 9, 2021 at 9:41 PM Doug Evans wrote:
> Ping.
>
> On Fri, May 28, 2021 at 4:53 PM Doug Evans wrote:
>
>> This patchset takes the original patch from Maxim,
>> https://www.mail-archive.com/qemu-devel@nongnu.org/msg569573.html
>> and updates it.
>>
>> Option hostfwd is extended t
Richard Henderson writes:
> This is both more and less complicated than our expansion
> using __builtin_choose_expr and __builtin_types_compatible_p.
>
> The expansion through QEMU_MAKE_LOCKABLE_ doesn't work because
> we're not emumerating all of the types within the same _Generic,
> which resul
Richard Henderson writes:
> All previous users now use C11 _Generic.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Alex Bennée
--
Alex Bennée
On 14/06/2021 19:37, Richard Henderson wrote:
On 6/14/21 12:16 PM, Bruno Larsen (billionai) wrote:
This patch changes ppc_cpu_get_phys_page_debug so that it is now
able to translate both, priviledged and real mode addresses
independently of whether the CPU executing it has those permissions
Thi
marcandre.lur...@redhat.com writes:
> From: Marc-André Lureau
>
> Modify check_if() to normalize the condition tree.
How is it normalized? Let me rephrase my question: how does the IR
change? If the generated code changes, how?
> Add _make_if() to build a QAPISchemaIfCond tree.
>
> Signed-off
Kindly ping,
Hi everyone,
Will this patch be picked up soon, or is there any other work for me to do?
Best Regards,
Kunkun Jiang
On 2021/5/27 20:31, Kunkun Jiang wrote:
In the vfio_migration_init(), the SaveVMHandler is registered for
VFIO device. But it lacks the operation of 'unregister'. I
No need to carry the flag all the time in many scenarios.
Signed-off-by: Zhang Chen
---
include/qemu/sockets.h | 1 +
util/qemu-sockets.c| 14 ++
2 files changed, 15 insertions(+)
diff --git a/include/qemu/sockets.h b/include/qemu/sockets.h
index 7d1f813576..d5abc227eb 100644
-
Current colo-compare and net-filters attached on chardev or netdev.
It still need more fine-grained network control based on IPFlowSpec.
Due to some real user scenarios don't need to monitor all traffic.
And qemu net-filter also need function to more detailed flow control.
This series give user ab
Add hmp_colo_passthrough_add and hmp_colo_passthrough_del make user
can maintain COLO network passthrough list in human monitor
Signed-off-by: Zhang Chen
---
hmp-commands.hx | 26 ++
include/monitor/hmp.h | 2 ++
monitor/hmp-cmds.c| 82 +
Since the real user scenario does not need COLO to monitor all traffic.
Add colo-passthrough-add and colo-passthrough-del to maintain
a COLO network passthrough list. Add IPFlowSpec struct for all QMP commands.
All the fields of IPFlowSpec are optional.
Signed-off-by: Zhang Chen
---
net/net.c
Rename structure with COLO index and move it to .h file,
It make other modules can reuse COLO code.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 132 -
net/colo-compare.h | 86 +
2 files changed, 109 insertions(+), 10
Add passthrough list for each CompareState.
Signed-off-by: Zhang Chen
---
net/colo-compare.c | 28
net/colo-compare.h | 12
2 files changed, 40 insertions(+)
diff --git a/net/colo-compare.c b/net/colo-compare.c
index dcd24bb113..3fa108069d 100644
--- a/
Use connection protocol,src port,dst port,src ip,dst ip as the key
to bypass certain network traffic in COLO compare.
Signed-off-by: Zhang Chen
---
net/net.c | 162 +-
1 file changed, 160 insertions(+), 2 deletions(-)
diff --git a/net/net.c b/
marcandre.lur...@redhat.com writes:
> From: Marc-André Lureau
>
> Update the documentation describing the changes in this series.
Suggest to add "upfront" for clarity.
>
> Signed-off-by: Marc-André Lureau
> Reviewed-by: Stefan Hajnoczi
> Tested-by: John Snow
> ---
> docs/devel/qapi-code-gen
Done, except for the tests in PATCH 7.
I agree with the QAPI schema language change.
Having this many classes just for conditionals feels tiresome. I'm
tempted to try axing all but one just to see how it comes out. This is
not a demand.
Let's discuss my review comments, and then figure out wha
On 14/06/2021 18:25, Fabiano Rosas wrote:
"Bruno Larsen (billionai)" writes:
This patch changes ppc_cpu_get_phys_page_debug so that it is now
able to translate both, priviledged and real mode addresses
independently of whether the CPU executing it has those permissions
This was mentioned by F
Hi Igor,
On 2021/6/8 21:38, Igor Mammedov wrote:
On Tue, 8 Jun 2021 20:24:35 +0800
Xingang Wang wrote:
Hi Igor,
On 2021/6/5 20:32, Igor Mammedov wrote:
On Tue, 25 May 2021 03:49:57 +
Wang Xingang wrote:
From: Xingang Wang
These patches add support for configure bypass_iommu on/o
On 14/06/2021 16:37, Philippe Mathieu-Daudé wrote:
On 6/14/21 9:16 PM, Bruno Larsen (billionai) wrote:
This patch changes ppc_cpu_get_phys_page_debug so that it is now
able to translate both, priviledged and real mode addresses
independently of whether the CPU executing it has those permissions
On 14/06/21 12:09, Lara Lazier wrote:
+#define SVM_VMRUN_INTERCEPT (1ULL << 32)
+
struct QEMU_PACKED vmcb_control_area {
uint16_t intercept_cr_read;
uint16_t intercept_cr_write;
...
+if (!(env->intercept & SVM_VMRUN_INTERCEPT)) {
+cpu_vmexit(env, SVM_EXIT_ERR, 0,
On 15/06/2021 00:20, Richard Henderson wrote:
On 6/14/21 6:41 PM, David Gibson wrote:
I think move these to mmu-book3s-v3.h, since they're correct for both
the radix and hash sides of the modern book3s mmu.
They're also correct for all non-booke mmus, e.g. hash32 and 6xx,
which is why I reco
On Tue, Jun 15, 2021 at 1:41 PM Alistair Francis wrote:
>
> On Sat, Jun 12, 2021 at 12:04 AM Anup Patel wrote:
> >
> > On Fri, Jun 11, 2021 at 2:16 PM Alistair Francis
> > wrote:
> > >
> > > On Fri, Jun 11, 2021 at 3:04 PM Anup Patel wrote:
> > > >
> > > > On Fri, Jun 11, 2021 at 4:49 AM Alist
On Wed, 19 May 2021 at 21:23, Alexander Graf wrote:
>
> We need to handle PSCI calls. Most of the TCG code works for us,
> but we can simplify it to only handle aa64 mode and we need to
> handle SUSPEND differently.
>
> This patch takes the TCG code as template and duplicates it in HVF.
>
> To tel
On Thu, 3 Jun 2021 at 14:43, Peter Maydell wrote:
> I haven't had time to review the tail-end of this series yet,
> I'm afraid, but these first 12 patches are clearly all OK, so
> I'm going to put them into target-arm.next so that at least
> that refactoring part is in master and won't go stale.
>
> > > A Python script could parse compile_commands.json, add -E -DQEMU_MODINFO
> > > to
> > > the command-line option, and look in the output for the metadata.
> >
> > Hmm, worth trying, although I guess it would be easier to code this up
> > straight in meson.build and pull the information you n
On Tue, Jun 15, 2021 at 11:54 AM Vladimir Sementsov-Ogievskiy
wrote:
>
> 11.06.2021 22:03, Eric Blake wrote:
> > To save the user from having to check 'qemu-img info --backing-chain'
> > or other followup command to determine which "depth":n goes beyond the
> > chain, add a boolean field "backing"
Lets make the compiler happy.
Found on gcc version 10.3.0 (Ubuntu 10.3.0-1ubuntu1)
Signed-off-by: Janosch Frank
Reviewed-by: Philippe Mathieu-Daudé
---
qobject/block-qdict.c | 7 ---
1 file changed, 4 insertions(+), 3 deletions(-)
diff --git a/qobject/block-qdict.c b/qobject/block-qdict.c
On 15/06/21 15:07, Gerd Hoffmann wrote:
Hmm, looks like I actually need both. Seems there is no easy way to get
the cflags out of a source_set to construct a cpp command line. Pulling
this out of compile_commands.json with jq works though.
Well, easy until I look at target-specific modules whe
From: Mark Cave-Ayland
The initial implementation of non-DMA transfers was based upon analysis of
traces
from the MacOS toolbox ROM for handling unaligned reads but missed one key
aspect - during a non-DMA transfer from the target, the bus service interrupt
should be raised for every single byte
The following changes since commit 894fc4fd670aaf04a67dc7507739f914ff4bacf2:
Merge remote-tracking branch 'remotes/jasowang/tags/net-pull-request' into
staging (2021-06-11 09:21:48 +0100)
are available in the Git repository at:
https://gitlab.com/bonzini/qemu.git tags/for-upstream
for you
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