On Tue, Jun 15, 2021 at 5:50 PM Alexandre IOOSS <erdn...@crans.org> wrote: > > On 6/15/21 9:41 AM, Alistair Francis wrote: > > Aren't you missing some timers, like timer[5] 0x4000_0C00? > > > > Alistair > > I double-checked using the reference manual and the datasheet and there > is not timer[5]: > - page 36 of > https://www.st.com/resource/en/reference_manual/cd00246267-stm32f100xx-advanced-arm-based-32-bit-mcus-stmicroelectronics.pdf
Strange, https://www.st.com/resource/en/datasheet/stm32f100rc.pdf describes Timer 5 and page 282 of the document you linked talks about timer 5 as well. Alistair > - page 30 of https://www.st.com/resource/en/datasheet/stm32f100cb.pdf > > I believe ST is skipping numbers to guarantee that timer[n] will have a > consistent address on different STM32 SoC. > > Thanks, > -- Alexandre >
