On Wed, 31 Mar 2021 13:51:23 +1100
Alexey Kardashevskiy wrote:
> SLOF instantiates RTAS since
> 744a928ccee9 ("spapr: Stop providing RTAS blob")
> so the max address applies to the FDT only.
>
> This renames the macro and fixes up the comment.
>
> This should not cause any behavioral change.
>
On 31.03.2021 01:05, Stafford Horne wrote:
Hi Pavel,
Thanks for the patch.
On Mon, Mar 29, 2021 at 10:42:41AM +0300, Pavel Dovgalyuk wrote:
This patch adds icount handling to mfspr/mtspr instructions
that may deal with hardware timers.
Signed-off-by: Pavel Dovgalyuk
---
target/openrisc/tra
On Wed, 31 Mar 2021 15:47:26 +1100
David Gibson wrote:
> On Wed, Mar 31, 2021 at 06:04:27AM +0200, Greg Kurz wrote:
> > On Wed, 31 Mar 2021 11:09:06 +1100
> > David Gibson wrote:
> >
> > > On Tue, Mar 30, 2021 at 08:01:13AM -0700, Richard Henderson wrote:
> > > > On 3/29/21 10:54 PM, David Gibs
Commit 7d7dbf9dc15be6e introduced a new line starting with
"GIT_SUBMODULES_ACTION=" in the config-host.mak file. The grep that
tries to determine the submodules in the gitlab-ci.yml file matches
this new line, too, causing a warning message when updating the modules:
warn: ignoring non-existent s
On 30.03.21 12:30, Catalin Marinas wrote:
On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote:
On 28/03/2021 13:21, Catalin Marinas wrote:
On Sat, Mar 27, 2021 at 03:23:24PM +, Catalin Marinas wrote:
On Fri, Mar 12, 2021 at 03:18:58PM +, Steven Price wrote:
diff --git a/arch/
This is to add support for Device Self Test Command (DST) and
DST Log Page. Refer NVM Express specification 1.4b section 5.8
("Device Self-test command")
Signed-off-by: Gollu Appalanaidu
---
hw/block/nvme.c | 118 +-
hw/block/nvme.h | 13 +
Patchew URL:
https://patchew.org/QEMU/20210331073233.11198-1-anaidu.go...@samsung.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210331073233.11198-1-anaidu.go...@samsung.com
Subject: [PATCH] hw/block/nvme: add
On 30/03/2021 15.19, Daniel P. Berrangé wrote:
On Tue, Mar 30, 2021 at 01:55:48PM +0200, Thomas Huth wrote:
On 30/03/2021 13.19, Daniel P. Berrangé wrote:
[...]
ccache is a no-brainer and assuming it isn't already working with
our gitlab jobs, we must fix that asap.
I've found some nice inst
From: Miroslav Rezanina
Commit "c87ea11631 configure: add --without-default-features" use
default_feature to set default values for configure option. This value
is used for EXESUF too.
However, EXESUF is not option to be tested, it is just append to any
binary name so using --without-default-fea
On Tue, Mar 30, 2021 at 04:07:06PM +0200, Paolo Bonzini wrote:
> On 30/03/21 15:02, Daniel P. Berrangé wrote:
> > Consider someone is kicked out from another project for violation
> > of that project's CoC, that would also be considered a violation
> > under QEMU's CoC. This qualifier is explicitly
This is to add support for Device Self Test Command (DST) and
DST Log Page. Refer NVM Express specification 1.4b section 5.8
("Device Self-test command")
Signed-off-by: Gollu Appalanaidu
---
changes:
-v2: addressed style fixes in hw/block/nvme.h
hw/block/nvme.c |
Patchew URL:
https://patchew.org/QEMU/20210331083306.12461-1-anaidu.go...@samsung.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210331083306.12461-1-anaidu.go...@samsung.com
Subject: [PATCH v2] hw/block/nvme: a
[+kvmarm, Marc]
On 2021/3/12 0:59, Peter Maydell wrote:
Currently we give all the v7-and-up CPUs a PMU with 4 counters. This
means that we don't provide the 6 counters that are required by the
Arm BSA (Base System Architecture) specification if the CPU supports
the Virtualization extensions.
I
Hi, everyone!
Do you have any suggestions about this iommu configuration feature?
Please help review these patches, thanks very much.
On 2021/3/25 15:22, Wang Xingang wrote:
From: Xingang Wang
These patches add support for configure iommu on/off for pci root bus,
including primary bus and pxb
On Tue, Feb 23, 2021 at 04:55:41PM +0100, Greg Kurz wrote:
> > diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c
> > index 6e17d631f7..78e58d2148 100644
> > --- a/hw/virtio/vhost.c
> > +++ b/hw/virtio/vhost.c
> > @@ -1293,7 +1293,6 @@ int vhost_dev_init(struct vhost_dev *hdev, void
> > *opaque,
>
On Wed, Feb 17, 2021 at 04:55:12PM -0300, lagar...@linux.ibm.com wrote:
> diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c
> index 2fdd5daf74..6ab760364b 100644
> --- a/hw/virtio/vhost-user.c
> +++ b/hw/virtio/vhost-user.c
> @@ -1849,6 +1849,13 @@ static int vhost_user_backend_init(stru
Got you Stefano,
Appreciate for your reply.
On Tue, Mar 30, 2021 at 8:46 AM Stefano Garzarella
wrote:
> Hi John,
>
> On Mon, Mar 29, 2021 at 09:46:49PM +0300, John Simpson wrote:
> >Hello,
> >
> >Kindly ask you to have a look at this bug.
> >Thank you for your replies.
>
> It's already fixed in
On Tue, 30 Mar 2021 22:37:06 +0530
Vaibhav Jain wrote:
>
> Thanks for looking into this patch Greg. My responses below inline.
>
>
> Greg Kurz writes:
>
> > Hi Vaibhav,
> >
> > Great to see you around :-)
>
> :-)
>
> >
> > On Mon, 29 Mar 2021 21:52:59 +0530
> > Vaibhav Jain wrote:
> >
> >
On Tue, 30 Mar 2021 12:37:11 +0300
Valeriy Vdovin wrote:
> On Tue, Mar 30, 2021 at 02:15:10AM +0200, Igor Mammedov wrote:
> > On Thu, 25 Mar 2021 19:57:05 +0300
> > Valeriy Vdovin wrote:
> >
> > > Introducing new qapi method 'query-cpu-model-cpuid'. This method can be
> > > used to
> > > get
On Wed, Mar 31, 2021 at 09:34:44AM +0200, David Hildenbrand wrote:
> On 30.03.21 12:30, Catalin Marinas wrote:
> > On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote:
> > > On 28/03/2021 13:21, Catalin Marinas wrote:
> > > > On Sat, Mar 27, 2021 at 03:23:24PM +, Catalin Marinas wrote:
This is to add support for Device Self Test Command (DST) and
DST Log Page. Refer NVM Express specification 1.4b section 5.8
("Device Self-test command")
Signed-off-by: Gollu Appalanaidu
---
changes:
-v3: removed unwanted patch file added
-v2: addressed style fixes in hw/block/nvme.h
hw/bloc
On Wed, 2021-03-31 at 09:54 +0200, Thomas Huth wrote:
> On 30/03/2021 15.19, Daniel P. Berrangé wrote:
> > Yep, that looks similar to what we do in libvirt, though we don't override
> > the compiler at the job level. Instead we just ensure the dir containing
> > ccache symlinks appears first in $PA
On 31.03.21 11:21, Catalin Marinas wrote:
On Wed, Mar 31, 2021 at 09:34:44AM +0200, David Hildenbrand wrote:
On 30.03.21 12:30, Catalin Marinas wrote:
On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote:
On 28/03/2021 13:21, Catalin Marinas wrote:
On Sat, Mar 27, 2021 at 03:23:24PM +
On Wed, 31 Mar 2021 at 09:59, Zenghui Yu wrote:
>
> [+kvmarm, Marc]
>
> On 2021/3/12 0:59, Peter Maydell wrote:
> > Currently we give all the v7-and-up CPUs a PMU with 4 counters. This
> > means that we don't provide the 6 counters that are required by the
> > Arm BSA (Base System Architecture) s
On Wed, 31 Mar 2021 10:46:49 +1100
David Gibson wrote:
> On Tue, Mar 30, 2021 at 01:28:31AM +0200, Igor Mammedov wrote:
> > On Wed, 24 Mar 2021 16:09:59 -0300
> > Daniel Henrique Barboza wrote:
> >
> > > On 3/23/21 10:40 PM, David Gibson wrote:
> > > > On Tue, Mar 23, 2021 at 02:10:22PM -03
The following changes since commit 6d40ce00c1166c317e298ad82ecf10e650c4f87d:
Update version for v6.0.0-rc1 release (2021-03-30 18:19:07 +0100)
are available in the Git repository at:
https://gitlab.com/stefanha/qemu.git tags/block-pull-request
for you to fetch changes up to b6489ac06695e257
From: David Edmondson
If a new bitmap entry is allocated, requiring the entire block to be
written, avoiding leaking the buffer allocated for the block should
the write fail.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: David Edmondson
Signed-off-by: Paolo Bonzini
Acked-by: Max Reitz
M
From: Paolo Bonzini
An invariant of the current rwlock is that if multiple coroutines hold a
reader lock, all must be runnable. The unlock implementation relies on
this, choosing to wake a single coroutine when the final read lock
holder exits the critical section, assuming that it will wake a
co
From: David Edmondson
Given that the block size is read from the header of the VDI file, a
wide variety of sizes might be seen. Rather than re-using a block
sized memory region when writing the VDI header, allocate an
appropriately sized buffer.
Signed-off-by: David Edmondson
Signed-off-by: Pao
Hi,
This series introduces the cluster cpu topology support, besides now
existing sockets, cores, and threads.
A cluster means a group of cores that share some resources (e.g. cache)
among them under the LLC. For example, ARM64 server chip Kunpeng 920 has
6 or 8 clusters in each NUMA, and each clu
From: Paolo Bonzini
Test that rwlock upgrade is fair, and that readers go back to sleep if
a writer is in line.
Signed-off-by: Paolo Bonzini
Message-id: 20210325112941.365238-6-pbonz...@redhat.com
Signed-off-by: Stefan Hajnoczi
---
tests/unit/test-coroutine.c | 62
There is a separate function pc_smp_parse() in hw/i386/pc.c used
to parse cpu topology for the PC machines. And there are some x86
implementations that have a similar concept of cluster, for example,
on Jacobsville there are 6 clusters of 4 Atom cores, each cluster
sharing a separate L2 cache, and
From: David Edmondson
When taking the slow path for mutex acquisition, set the coroutine
value in the CoWaitRecord in push_waiter(), rather than both there and
in the caller.
Reviewed-by: Paolo Bonzini
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: David Edmondson
Signed-off-by: Paolo Bon
From: David Edmondson
Test that downgrading an rwlock does not result in a failure to
schedule coroutines queued on the rwlock.
The diagram associated with test_co_rwlock_downgrade() describes the
intended behaviour, but what was observed previously corresponds to:
| c1 | c2 | c3
There is a separate function virt_smp_parse() in hw/virt/arm.c used
to parse cpu topology for the ARM machines. And there are some ARM
implementations that have the concept of cluster, for example, ARM64
server chip Kunpeng 920 has 6 or 8 clusters in each NUMA node and each
cluster has 4 cores. All
Function smp_parse() in hw/core/machine.c is a generic/default function
used for parsing the -smp command line. Since the new cluster parameter
has been added in struct CpuTopology, we should parse this new parameter
in the default function.
In smp_parse(), the computing logic of missing values pr
On 31/03/21 11:53, Yanan Wang wrote:
A cluster means a group of cores that share some resources (e.g. cache)
among them under the LLC. For example, ARM64 server chip Kunpeng 920 has
6 or 8 clusters in each NUMA, and each cluster has 4 cores. All clusters
share L3 cache data while cores within eac
A cluster means a group of cores that share some resources (e.g. cache)
among them under the LLC. For example, ARM64 server chip Kunpeng 920 has
6 or 8 clusters in each NUMA, and each cluster has 4 cores. All clusters
share L3 cache data while cores within each cluster share the L2 cache.
Also, th
Add a Processor Hierarchy Node of cluster level between core level
and package level for ARM PPTT table.
Signed-off-by: Yanan Wang
---
hw/acpi/aml-build.c | 11 ++
hw/arm/virt-acpi-build.c| 43 +
include/hw/acpi/aml-build.h | 2 ++
3 files
Add a cluster level between core level and package level for
ARM device tree.
Signed-off-by: Yanan Wang
---
hw/arm/virt.c | 14 ++
1 file changed, 10 insertions(+), 4 deletions(-)
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index c9ad76ff64..d78db3387e 100644
--- a/hw/arm/virt.c
+++
On Tue, Mar 16, 2021 at 08:35:14AM -0500, Eric Blake wrote:
> On 3/16/21 4:10 AM, Stefan Hajnoczi wrote:
> > On Wed, Mar 10, 2021 at 05:30:04PM +, Stefan Hajnoczi wrote:
> >> socket_get_fd() fails with the error "socket_get_fd: too many
> >> connections" if the given listen backlog value is not
On 30/03/2021 11:13, Catalin Marinas wrote:
On Mon, Mar 29, 2021 at 04:55:29PM +0100, Steven Price wrote:
On 26/03/2021 18:56, Catalin Marinas wrote:
On Fri, Mar 12, 2021 at 03:18:57PM +, Steven Price wrote:
A KVM guest could store tags in a page even if the VMM hasn't mapped
the page with
On Tue, Mar 16, 2021 at 07:59:59PM +, Dr. David Alan Gilbert wrote:
> * Stefan Hajnoczi (stefa...@redhat.com) wrote:
> > On Tue, Feb 09, 2021 at 07:02:16PM +, Dr. David Alan Gilbert (git)
> > wrote:
> > > +if (!mrs_size) {
> > > +error_report("No guest region fo
Extract part of the code from vfio_sync_dirty_bitmap to form a
new helper, which allows to mark dirty pages of a RAM section.
This helper will be called for nested stage.
Signed-off-by: Kunkun Jiang
---
hw/vfio/common.c | 22 ++
1 file changed, 14 insertions(+), 8 deletions(-
In nested mode, we call the set_pasid_table() callback on each STE
update to pass the guest stage 1 configuration to the host and
apply it at physical level.
In the case of live migration, we need to manual call the
set_pasid_table() to load the guest stage 1 configurations to the
host. If this op
Hi all,
Since the SMMUv3's nested translation stages[1] has been introduced by Eric, we
need to pay attention to the migration of VFIO PCI devices in SMMUv3 nested
stage
mode. At present, it is not yet supported in QEMU. There are two problems in the
existing framework.
First, the current way to
In nested mode, we set up the stage 2 and stage 1 separately. In my
opinion, vfio_memory_prereg_listener is used for stage 2 and
vfio_memory_listener is used for stage 1. So it feels weird to call
the global_log_start/stop interface in vfio_memory_listener to switch
dirty tracking, although this wo
On Intel, the DMA mapped through the host single stage. Instead
we set up the stage 2 and stage 1 separately in nested mode as there
is no "Caching Mode".
Legacy vfio_listener_log_sync cannot be used in nested stage as we
don't need to pay close attention to stage 1 mapping. This patch adds
vfio_p
On Thu, Feb 25, 2021 at 10:19:31AM +, Dr. David Alan Gilbert wrote:
> * Stefan Hajnoczi (stefa...@redhat.com) wrote:
> > On Tue, Feb 09, 2021 at 07:02:18PM +, Dr. David Alan Gilbert (git)
> > wrote:
> > > diff --git a/tools/virtiofsd/fuse_common.h b/tools/virtiofsd/fuse_common.h
> > > inde
On 3/31/21 5:06 AM, David Gibson wrote:
On Tue, Mar 30, 2021 at 06:48:38PM +0200, Greg Kurz wrote:
On Tue, 30 Mar 2021 15:23:50 +0530
Ravi Bangoria wrote:
As per the PAPR, bit 0 of byte 64 in pa-features property indicates
availability of 2nd DAWR registers. i.e. If this bit is set, 2nd
DA
This was accidentally dropped before. Add it back.
Reported-by: Emmanuel Blot
Signed-off-by: Bin Meng
---
hw/riscv/sifive_e.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/riscv/sifive_e.c b/hw/riscv/sifive_e.c
index f939bcf9ea..82096b3e5a 100644
--- a/hw/riscv/sifive_
On 31/03/2021 10:32, David Hildenbrand wrote:
On 31.03.21 11:21, Catalin Marinas wrote:
On Wed, Mar 31, 2021 at 09:34:44AM +0200, David Hildenbrand wrote:
On 30.03.21 12:30, Catalin Marinas wrote:
On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wrote:
On 28/03/2021 13:21, Catalin Marin
Hi,
> > Well, "make install" with --prefix=$HOME/qemu-install fixed that for the
> > time
> > being.
> >
> > Now I have this:
> >
> > kraxel@sirius ~/qemu-install/bin# sudo ./qemu-trace-stap -v run
> > ./qemu-system-x86_64 "qxl_soft_reset"
> > Using tapset dir '/home/kraxel/qemu-install/shar
On Mon, 22 Mar 2021 20:15:47 +0100
Claudio Fontana wrote:
> this allows to remove unneeded stubs for target/s390x.
This patch doesn't seem to remove any, though?
>
> Signed-off-by: Claudio Fontana
> ---
> hw/s390x/tod.c | 9 -
> hw/s390x/meson.build | 5 -
> 2 files changed
Add 6.1 machine types for arm/i440fx/q35/s390x/spapr.
Signed-off-by: Cornelia Huck
---
hw/arm/virt.c | 7 ++-
hw/core/machine.c | 3 +++
hw/i386/pc.c | 3 +++
hw/i386/pc_piix.c | 14 +-
hw/i386/pc_q35.c | 13 -
Peter Maydell writes:
> The way gdb and our gdbstub handle multicore and multicluster
> machines is not very obvious. This patchset adds some documentation
> of how to do it. In particular it gives the necessary runes
> for how to get gdb to work with machines which have multiple
> clusters of
Commit 561dbb41b1d7 "i386: Make migration fail when Hyper-V reenlightenment
was enabled but 'user_tsc_khz' is unset" forbade migrations with when guest
has opted for reenlightenment notifications but 'tsc-frequency' wasn't set
explicitly on the command line. This works but the migration fails late
On Thu, 25 Mar 2021, Alexey Kardashevskiy wrote:
On 25/03/2021 13:52, David Gibson wrote:
On Tue, Mar 23, 2021 at 01:58:30PM +1100, Alexey Kardashevskiy wrote:
The PAPR platform which describes an OS environment that's presented by
a combination of a hypervisor and firmware. The features it spe
On Tue, 30 Mar 2021 at 15:49, Laurent Vivier wrote:
>
> The following changes since commit ec2e6e016d24bd429792d08cf607e4c5350dcdaa:
>
> Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.0-pull-=
> request' into staging (2021-03-28 19:49:57 +0100)
>
> are available in the Git r
On Wed, Mar 31, 2021 at 4:33 AM Thomas Huth wrote:
>
> Commit 7d7dbf9dc15be6e introduced a new line starting with
> "GIT_SUBMODULES_ACTION=" in the config-host.mak file. The grep that
> tries to determine the submodules in the gitlab-ci.yml file matches
> this new line, too, causing a warning mess
Add a test accompanying commit 53431b9086b2832ca1aeff0c55e186e9ed79bd11
("block/mirror: Fix mirror_top's permissions").
Signed-off-by: Max Reitz
---
tests/qemu-iotests/tests/mirror-top-perms | 121 ++
tests/qemu-iotests/tests/mirror-top-perms.out | 5 +
2 files changed, 126
On Wed, Mar 31, 2021 at 10:27:21AM +0300, Pavel Dovgalyuk wrote:
> On 31.03.2021 01:05, Stafford Horne wrote:
> > Hi Pavel,
> >
> > Thanks for the patch.
> >
> > On Mon, Mar 29, 2021 at 10:42:41AM +0300, Pavel Dovgalyuk wrote:
> > > This patch adds icount handling to mfspr/mtspr instructions
> >
Hi Alex, Willian,
On 3/29/21 1:02 PM, Alex Bennée wrote:
> Currently our gitlab registry is x86_64 only so attempting to pull an
> image from it on something else will end in tears.
>
> Signed-off-by: Alex Bennée
> ---
> tests/docker/Makefile.include | 5 -
> 1 file changed, 4 insertions(+)
CC'ed Paolo.
On 31.03.2021 15:33, Stafford Horne wrote:
On Wed, Mar 31, 2021 at 10:27:21AM +0300, Pavel Dovgalyuk wrote:
On 31.03.2021 01:05, Stafford Horne wrote:
Hi Pavel,
Thanks for the patch.
On Mon, Mar 29, 2021 at 10:42:41AM +0300, Pavel Dovgalyuk wrote:
This patch adds icount handli
On 3/31/21 12:36 PM, Bin Meng wrote:
> This was accidentally dropped before. Add it back.
>
Fixes: 732612856a8 ("hw/riscv: Drop 'struct MemmapEntry'")
> Reported-by: Emmanuel Blot
> Signed-off-by: Bin Meng
Reviewed-by: Philippe Mathieu-Daudé
> ---
>
> hw/riscv/sifive_e.c | 2 +-
> 1 file
[Dropping some irrelevant cc’s]
> On Mar 30, 2021, at 1:46 PM, Stefano Garzarella wrote:
>
> Hi John,
>
> On Mon, Mar 29, 2021 at 09:46:49PM +0300, John Simpson wrote:
>> Hello,
>>
>> Kindly ask you to have a look at this bug.
>> Thank you for your replies.
>
> It's already fixed in QEMU upst
On 31.03.21 12:41, Steven Price wrote:
On 31/03/2021 10:32, David Hildenbrand wrote:
On 31.03.21 11:21, Catalin Marinas wrote:
On Wed, Mar 31, 2021 at 09:34:44AM +0200, David Hildenbrand wrote:
On 30.03.21 12:30, Catalin Marinas wrote:
On Mon, Mar 29, 2021 at 05:06:51PM +0100, Steven Price wr
The checks in vu_blk_sect_range_ok() assume VIRTIO_BLK_SECTOR_SIZE is
equal to BDRV_SECTOR_SIZE. This is true, but let's add a
QEMU_BUILD_BUG_ON() to make it explicit.
We might as well check that the request buffer size is a multiple of
VIRTIO_BLK_SECTOR_SIZE while we're at it.
Suggested-by: Max
On Wed, Mar 24, 2021 at 08:49:43AM +0200, Mahmoud Mandour wrote:
> Replaced the allocation and deallocation of fuse_session structs
> from calloc() and free() calls to g_try_new0() and g_free().
>
> Signed-off-by: Mahmoud Mandour
> ---
> tools/virtiofsd/fuse_lowlevel.c | 6 +++---
> 1 file chang
On 31/03/21 14:48, Pavel Dovgalyuk wrote:
Acked-by: Stafford Horne
I am not currently maintaining an openrisc queue, but I could start
one. Do you
have another way to submit this upstream?
Paolo, can you queue this one?
Sure, done.
Paolo
On Wed, 31 Mar 2021 13:19:00 +0200
Cornelia Huck wrote:
> Add 6.1 machine types for arm/i440fx/q35/s390x/spapr.
>
> Signed-off-by: Cornelia Huck
> ---
> hw/arm/virt.c | 7 ++-
> hw/core/machine.c | 3 +++
> hw/i386/pc.c | 3 +++
> hw/i386/pc_piix.c
On Tue, Mar 30, 2021 at 04:17:32PM +0200, Greg Kurz wrote:
> On Tue, 30 Mar 2021 14:55:42 +0100
> Stefan Hajnoczi wrote:
>
> > On Tue, Mar 30, 2021 at 12:17:40PM +0200, Greg Kurz wrote:
> > > On Mon, 29 Mar 2021 18:10:57 +0100
> > > Stefan Hajnoczi wrote:
> > > > On Thu, Mar 25, 2021 at 04:07:30
Thomas Huth writes:
> Commit 7d7dbf9dc15be6e introduced a new line starting with
> "GIT_SUBMODULES_ACTION=" in the config-host.mak file. The grep that
> tries to determine the submodules in the gitlab-ci.yml file matches
> this new line, too, causing a warning message when updating the modules:
Philippe Mathieu-Daudé writes:
> Hi Alex, Willian,
>
> On 3/29/21 1:02 PM, Alex Bennée wrote:
>> Currently our gitlab registry is x86_64 only so attempting to pull an
>> image from it on something else will end in tears.
>>
>> Signed-off-by: Alex Bennée
>> ---
>> tests/docker/Makefile.includ
Update the OpenTitan interrupt layout to match the latest OpenTitan
bitstreams. This involves changing the Ibex PLIC memory layout and the
UART interrupts.
Signed-off-by: Alistair Francis
---
include/hw/riscv/opentitan.h | 16
hw/intc/ibex_plic.c | 20 ++
On Wed, Mar 31, 2021 at 6:36 AM Bin Meng wrote:
>
> This was accidentally dropped before. Add it back.
>
> Reported-by: Emmanuel Blot
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> hw/riscv/sifive_e.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> di
In an ideal world, we would all get along together very well, always be
polite and never end up in huge conflicts. And even if there are conflicts,
we would always handle each other fair and respectfully. Unfortunately,
this is not an ideal world and sometimes people forget how to interact with
eac
On 31/03/21 10:18, mreza...@redhat.com wrote:
From: Miroslav Rezanina
Commit "c87ea11631 configure: add --without-default-features" use
default_feature to set default values for configure option. This value
is used for EXESUF too.
However, EXESUF is not option to be tested, it is just append t
On Tue, Mar 30, 2021 at 10:18 PM Bin Meng wrote:
>
> hmode32() should return -RISCV_EXCP_ILLEGAL_INST for RV64.
>
> Signed-off-by: Bin Meng
Thanks for the patch.
There is already a patch on list to fix this: "target/riscv: Fix
32-bit HS mode access permissions"
Alistair
> ---
>
> target/risc
Public bug reported:
Building QEMU with GLib newer than 2.58.3 corrupts tap networking on macOS
hosts.
Tap device was provided by Tun/Tap kernel extension installed from brew:
brew install tuntap
Checked revisions:
553032d (v5.2.0)
6d40ce0 (v6.0.0-rc1)
Host:
MacBook Pro (Retina, 15-inch,
On 3/31/21 2:57 AM, David Gibson wrote:
> On Mon, Mar 29, 2021 at 03:32:37PM -0300, Daniel Henrique Barboza wrote:
>>
>>
>> On 3/29/21 12:32 PM, Cédric Le Goater wrote:
>>> On 3/29/21 6:20 AM, David Gibson wrote:
On Thu, Mar 25, 2021 at 09:56:04AM +0100, Cédric Le Goater wrote:
> On 3/25/2
On 3/31/21 6:58 AM, Michael Ellerman wrote:
> David Gibson writes:
>> On Mon, Mar 29, 2021 at 03:32:37PM -0300, Daniel Henrique Barboza wrote:
> ...
>>
>>> We assign ibm,chip-id=0x0 to CPUs 0-3, but CPUs 2-3 are located in a
>>> different NUMA node than 0-1. This would mean that the same socket
>>
On Wed, Mar 31, 2021 at 6:36 AM Bin Meng wrote:
>
> This was accidentally dropped before. Add it back.
>
> Reported-by: Emmanuel Blot
> Signed-off-by: Bin Meng
Thanks!
Applied to riscv-to-apply.next
Alistair
> ---
>
> hw/riscv/sifive_e.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(
On Fri, Mar 19, 2021 at 3:46 PM Atish Patra wrote:
>
> As per the privilege specification v1.11, mcountinhibit allows to start/stop
> a pmu counter selectively.
>
> Signed-off-by: Atish Patra
> ---
> target/riscv/cpu.h | 2 ++
> target/riscv/cpu_bits.h | 4
> target/riscv/csr.c
On Sun, Mar 21, 2021 at 1:09 AM Vijai Kumar K wrote:
>
> Add support for emulating Shakti reference platform based on C-class
> running on arty-100T board.
>
> https://gitlab.com/shaktiproject/cores/shakti-soc/-/blob/master/README.rst
>
> Signed-off-by: Vijai Kumar K
> ---
> MAINTAINERS
gibson/qemu.git tags/ppc-for-6.0-20210331
>
> for you to fetch changes up to 611ac0a60fdcc7422bf42ef9b467abf4fdbea1a2:
>
> hw/net: fsl_etsec: Tx padding length should exclude CRC (2021-03-31
> 11:10:50 +1100)
>
> ---
On Sun, Mar 21, 2021 at 1:09 AM Vijai Kumar K wrote:
>
> This is the initial implementation of Shakti UART.
>
> Signed-off-by: Vijai Kumar K
Reviewed-by: Alistair Francis
Alistair
> ---
> MAINTAINERS | 2 +
> hw/char/meson.build | 1 +
> hw/char/shakti_uart.c
On Mon, Mar 29, 2021 at 1:08 PM Bin Meng wrote:
>
> From: Bin Meng
>
> Since commit 78da6a1bca22 ("device_tree: add qemu_fdt_setprop_string_array
> helper"),
> we can use the new helper to set the clock name for the ethernet
> controller node.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair
On Sun, Mar 21, 2021 at 1:09 AM Vijai Kumar K wrote:
>
> Connect one shakti uart to the shakti_c machine.
>
> Signed-off-by: Vijai Kumar K
Reviewed-by: Alistair Francis
Alistair
> ---
> hw/riscv/shakti_c.c | 8
> include/hw/riscv/shakti_c.h | 2 ++
> 2 files changed, 10 inse
On Mon, Mar 29, 2021 at 1:15 PM Bin Meng wrote:
>
> From: Bin Meng
>
> Linux kernel commit a2770b57d083 ("dt-bindings: timer: Add CLINT bindings")
> adds the official DT bindings for CLINT, which uses "sifive,clint0"
> as the compatible string. "riscv,clint0" is now legacy and has to
> be kept fo
On Mon, Mar 29, 2021 at 1:17 PM Bin Meng wrote:
>
> From: Bin Meng
>
> Since commit 78da6a1bca22 ("device_tree: add qemu_fdt_setprop_string_array
> helper"),
> we can use the new helper to set the compatible strings for the
> SiFive test device node.
>
> Signed-off-by: Bin Meng
Reviewed-by: Al
On Mon, Mar 29, 2021 at 1:12 PM Bin Meng wrote:
>
> From: Bin Meng
>
> The official DT bindings of PLIC uses "sifive,plic-1.0.0" as the
> compatible string in the upstream Linux kernel. "riscv,plic0" is
> now legacy and has to be kept for backward compatibility of legacy
> systems.
>
> Signed-off
The same thing as for incoming postcopy - we cannot deal with concurrent
RAM discards when using background snapshot feature in outgoing migration.
Signed-off-by: Andrey Gruzdev
Reviewed-by: David Hildenbrand
---
hw/virtio/virtio-balloon.c | 8 ++--
include/migration/misc.h | 2 ++
migrat
On Mon, Mar 29, 2021 at 1:19 PM Bin Meng wrote:
>
> From: Bin Meng
>
> The supported device bullet list has an additional space before each
> entry, which makes a wrong indentation level. Correct it.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> docs/system/ri
On Mon, Mar 29, 2021 at 1:20 PM Bin Meng wrote:
>
> From: Bin Meng
>
> The OpenSBI BIOS image names are used by many RISC-V machines.
> Let's define macros for them.
>
> Signed-off-by: Bin Meng
Reviewed-by: Alistair Francis
Alistair
> ---
>
> include/hw/riscv/boot.h | 5 +
> hw/riscv/si
Added missing qemu_fflush() on buffer file holding precopy device state.
Increased initial QIOChannelBuffer allocation to 512KB to avoid reallocs.
Typical configurations often require >200KB for device state and VMDESC.
Signed-off-by: Andrey Gruzdev
---
migration/migration.c | 8 +++-
1 file
Philippe Mathieu-Daudé writes:
> The current 'virt_kvm' test is restricted to GICv2, but can also
> work with a GICv3. Duplicate it but add a GICv3 test which can be
> tested on some hardware.
>
> Noticed while running:
>
> $ avocado --show=app run -t machine:virt tests/acceptance/
> ...
> (
Changes v1->v2:
* Added comment over the overlooked qemu_flush() in bg_migration_thread
Changes v0->v1:
* Using qemu_real_host_page_size instead of TARGET_PAGE_SIZE for host
page size in ram_block_populate_pages()
* More elegant implementation of ram_block_populate_pages()
This patch series
On Mon, Mar 29, 2021 at 1:16 PM Bin Meng wrote:
>
> From: Bin Meng
>
> At present the Microchip Icicle Kit machine only supports using
> '-bios' to load the HSS, and does not support '-kernel' for direct
> kernel booting just like other RISC-V machines do. One has to use
> U-Boot which is chain-l
On 31/03/2021 17.05, Paolo Bonzini wrote:
In an ideal world, we would all get along together very well, always be
polite and never end up in huge conflicts. And even if there are conflicts,
we would always handle each other fair and respectfully. Unfortunately,
this is not an ideal world and some
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