Hi, everyone! Do you have any suggestions about this iommu configuration feature? Please help review these patches, thanks very much.
On 2021/3/25 15:22, Wang Xingang wrote:
From: Xingang Wang <wangxinga...@huawei.com> These patches add support for configure iommu on/off for pci root bus, including primary bus and pxb root bus. At present, All root bus will go through iommu when iommu is configured, which is not flexible. So this add option to enable/disable iommu for primary bus and pxb root bus. When iommu is enabled for the root bus, devices attached to it will go through iommu. When iommu is disabled for the root bus, devices will not go through iommu accordingly. The option example for iommu configuration is like the following: primary root bus option: arm: -machine virt iommu=smmuv3,primary_bus_iommu=false(or true) x86: -machine q35,primary_bus_iommu=false(or true) pxb root bus: -device pxb-pcie,bus_nr=0x10,id=pci.10,bus=pcie.0,addr=0x3.0x1,iommu=false History: v1 -> v2: - rebase on top of v6.0.0-rc0 - Fix some issues - Took into account Eric's comments, and remove the PCI_BUS_IOMMU flag, replace it with a property in PCIHostState. - Add support for x86 iommu option Xingang Wang (6): hw/pci/pci_host: Add iommu property for pci host hw/pci: Add iommu option for pci root bus hw/pci: Add pci_root_bus_max_bus hw/arm/virt-acpi-build: Add explicit idmap info in IORT table hw/i386/acpi-build: Add explicit scope in DMAR table hw/i386/acpi-build: Add iommu filter in IVRS table hw/arm/virt-acpi-build.c | 103 ++++++++++++++++++++++------ hw/arm/virt.c | 25 +++++++ hw/i386/acpi-build.c | 70 ++++++++++++++++++- hw/i386/pc.c | 19 +++++ hw/pci-bridge/pci_expander_bridge.c | 3 + hw/pci-host/q35.c | 1 + hw/pci/pci.c | 52 +++++++++++++- hw/pci/pci_host.c | 2 + include/hw/arm/virt.h | 1 + include/hw/i386/pc.h | 1 + include/hw/pci/pci.h | 2 + include/hw/pci/pci_host.h | 1 + 12 files changed, 254 insertions(+), 26 deletions(-)
