Memory devices implement extra capabilities on top of CXL devices. This
adds support for that.
A large part of memory devices is the mailbox/command interface. All of
the mailbox handling is done in the mailbox-utils library. Longer term,
new CXL devices that are being emulated may want to handle
This cleanup will make it easier to add support for CXL to the mix.
Signed-off-by: Ben Widawsky
---
hw/i386/acpi-build.c | 31 +--
1 file changed, 17 insertions(+), 14 deletions(-)
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index f18b71dea9..3c214bba67
CXL specification provides for the ability to obtain logs from the
device. Logs are either spec defined, like the "Command Effects Log"
(CEL), or vendor specific. UUIDs are defined for all log types.
The CEL is a mechanism to provide information to the host about which
commands are supported. It i
This implements the CXL device status registers from 8.2.8.3.1 in the
CXL 2.0 specification. It is capability ID 0001h.
v2: Use the reg alignment helper (Jonathan)
Add stubbed device_reg_init_common() (Ben)
Signed-off-by: Ben Widawsky
---
hw/cxl/cxl-device-utils.c | 38 +++
CXL host bridges themselves may have MMIO. Since host bridges don't have
a BAR they are treated as special for MMIO.
Signed-off-by: Ben Widawsky
--
It's arbitrarily chosen here to pick 0xD000 as the base for the host
bridge MMIO. I'm not sure what the right way to find free space for
platfo
This opens up the possibility for more types of expanders (other than
PCI and PCIe). We'll need this to create a CXL expander.
Signed-off-by: Ben Widawsky
---
hw/pci-bridge/pci_expander_bridge.c | 11 +++
1 file changed, 7 insertions(+), 4 deletions(-)
diff --git a/hw/pci-bridge/pci_exp
This is the beginning of implementing mailbox support for CXL 2.0
devices.
v2: Use register alignment helper (Ben)
Minor cleanups (Jonathan)
Rename error codes to match spec (Jonathan)
Update cap count from 1 to 2 (Jonathan)
Add infra to support CEL (Ben)
Add more of the actual
Signed-off-by: Ben Widawsky
---
tests/data/acpi/pc/CEDT | Bin 0 -> 36 bytes
tests/data/acpi/q35/CEDT| Bin 0 -> 36 bytes
tests/qtest/bios-tables-test-allowed-diff.h | 2 --
3 files changed, 2 deletions(-)
diff --git a/tests/data/acpi/pc/CEDT b/tests/dat
A device's volatile and persistent memory are known Host Defined Memory
(HDM) regions. The mechanism by which the device is programmed to claim
the addresses associated with those regions is through dedicated logic
known as the HDM decoder. In order to allow the OS to properly program
the HDMs, the
This represents Intel's proposal for how the system firmware can notify
Linux that the CEDT exists and provides a driver attach point. It is not
in the CXL 2.0 specification as of now.
CXL 2.0 specification adds an _HID, ACPI0016, for CXL capable host
bridges, with a _CID of PNP0A08 (PCIe host bri
Using the previously implemented stubbed helpers, it is now possible to
easily add the missing, required commands to the implementation.
Signed-off-by: Ben Widawsky
---
hw/cxl/cxl-mailbox-utils.c | 23 ++-
1 file changed, 22 insertions(+), 1 deletion(-)
diff --git a/hw/cxl/c
This works like adding a typical pxb device, except the name is
'pxb-cxl' instead of 'pxb-pcie'. An example command line would be as
follows:
-device pxb-cxl,id=cxl.0,bus="pcie.0",bus_nr=1
A CXL PXB is backward compatible with PCIe. What this means in practice
is that an operating system that is
CXL 2.0 specification adds 2 new dwords to the existing _OSC definition
from PCIe. The new dwords are accessed with a new uuid. This
implementation supports what is in the specification.
We are currently in the process of trying to define a new definition for
_OSC. See later work for an explanatio
This patch allows initializing the primary host bridge as a CXL capable
hostbridge.
Signed-off-by: Ben Widawsky
--
This patch is WIP.
---
hw/arm/virt.c| 1 +
hw/core/machine.c| 26 ++
hw/i386/acpi-build.c | 8 +++-
hw/i386/microvm.c| 1 +
hw/i386/p
Per spec, timestamp appears to be a free-running counter from a value
set by the host via the Set Timestamp command (0301h). There are
references to the epoch, which seem like a red herring. Therefore, the
implementation implements the timestamp as freerunning counter from the
last value that was i
Scope (_SB)
{
Device (PCI0)
{
Name (_HID, EisaId ("PNP0A03") /* PCI Bus */) // _HID: Hardware ID
-Name (_ADR, Zero) // _ADR: Address
Name (_UID, Zero) // _UID: Unique ID
+Name (_ADR, Zero) // _ADR: Address
Signed-off
The easiest way to differentiate a CXL bus, and a PCIE bus is using a
flag. A CXL bus, in hardware, is backward compatible with PCIE, and
therefore the code tries pretty hard to keep them in sync as much as
possible.
The other way to implement this would be to try to cast the bus to the
correct ty
Signed-off-by: Ben Widawsky
---
tests/qtest/cxl-test.c | 93 +
tests/qtest/meson.build | 4 ++
2 files changed, 97 insertions(+)
create mode 100644 tests/qtest/cxl-test.c
diff --git a/tests/qtest/cxl-test.c b/tests/qtest/cxl-test.c
new file mode 100644
In a bare metal CXL capable system, system firmware will program
physical address ranges on the host. This is done by programming
internal registers that aren't typically known to OS. These address
ranges might be contiguous or interleaved across host bridges.
For a QEMU guest a new construct is i
Signed-off-by: Ben Widawsky
---
tests/qtest/bios-tables-test-allowed-diff.h | 21 +
1 file changed, 21 insertions(+)
diff --git a/tests/qtest/bios-tables-test-allowed-diff.h
b/tests/qtest/bios-tables-test-allowed-diff.h
index dfb8523c8b..5c695cdf37 100644
--- a/tests/qtest/b
Currently, QEMU makes _UID equivalent to the bus number (_BBN). While
there is nothing wrong with doing it this way, CXL spec has a heavy
reliance on _UID to identify host bridges and there is no link to the
bus number. Having a distinct UID solves two problems. The first is it
gets us around the l
This adds just enough of a root port implementation to be able to
enumerate root ports (creating the required DVSEC entries). What's not
here yet is the MMIO nor the ability to write some of the DVSEC entries.
This can be added with the qemu commandline by adding a rootport to a
specific CXL host
A CXL memory device (AKA Type 3) is a CXL component that contains some
combination of volatile and persistent memory. It also implements the
previously defined mailbox interface as well as the memory device
firmware interface.
The following example will create a 256M device in a 512M window:
-obj
On 21-01-05 08:53:02, Ben Widawsky wrote:
> Per spec, timestamp appears to be a free-running counter from a value
> set by the host via the Set Timestamp command (0301h). There are
> references to the epoch, which seem like a red herring. Therefore, the
> implementation implements the timestamp as
For all host bridges, reserve MMIO space with _CRS. The MMIO for the
host bridge lives in a magically hard coded space in the system's
physical address space. The standard mechanism to tell the OS about
regions which can't be used for host bridges is _CRS.
Signed-off-by: Ben Widawsky
---
hw/i386
The SEV FW >= 0.23 added a new command that can be used to query the
attestation report containing the SHA-256 digest of the guest memory
and VMSA encrypted with the LAUNCH_UPDATE and sign it with the PEK.
Note, we already have a command (LAUNCH_MEASURE) that can be used to
query the SHA-256 diges
Signed-off-by: Ben Widawsky
---
tests/data/acpi/pc/CEDT | 0
tests/data/acpi/q35/CEDT| 0
tests/qtest/bios-tables-test-allowed-diff.h | 2 ++
3 files changed, 2 insertions(+)
create mode 100644 tests/data/acpi/pc/CEDT
create mode 100644 tests/data/acpi/q3
On 1/4/21 8:02 PM, Joelle van Dyne wrote:
> Guarding MAP_JIT with
>
> if (!splitwx) {
> flags |= MAP_JIT;
> }
>
> is better because MAP_JIT tells the kernel that we want a RWX mapping
> which is not the case. On iOS, special entitlements are needed for
> MAP_JIT.
Thanks, fixed.
r~
We are shortly going to have a split rw/rx jit buffer. Depending
on the host, we need to flush the dcache at the rw data pointer and
flush the icache at the rx code pointer.
For now, the two passed pointers are identical, so there is no
effective change in behaviour.
Reviewed-by: Joelle van Dyne
The CXL Early Discovery Table is defined in the CXL 2.0 specification as
a way for the OS to get CXL specific information from the system
firmware.
As of CXL 2.0 spec, only 1 sub structure is defined, the CXL Host Bridge
Structure (CHBS) which is primarily useful for telling the OS exactly
where t
Plumb the value through to alloc_code_gen_buffer. This is not
supported by any os or tcg backend, so for now enabling it will
result in an error.
Signed-off-by: Richard Henderson
---
include/sysemu/tcg.h | 3 ++-
tcg/aarch64/tcg-target.h | 1 +
tcg/arm/tcg-target.h | 1 +
tcg/i386
Igor Mammedov writes:
...
>
> i was talking about user interface here, i.e.:
> (QMP) create_machine(hyperv=on)
> (QMP) device_add(cpu, hv_foo=x)
> vs:
> (QMP) device_add(cpu, hyperv_defaults=on,=onhv_foo=x)
>
> i.e. in the later case cpu specific options are consolidate within device
> stanza
This has been a tcg-specific function, but is also in use
by hardware accelerators via physmem.c. This can cause
link errors when tcg is disabled.
Reviewed-by: Joelle van Dyne
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/qemu/cacheflush.h | 24 +
We cannot use a real temp file, because we would need to find
a filesystem that does not have noexec enabled. However, a
memfd is not associated with any filesystem.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
accel/tcg/translate-all.c | 84 +++
Create a function to determine if a pointer is within the buffer.
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 11 +++
accel/tcg/translate-all.c | 26 --
2 files changed, 19 insertions(+), 18 deletions(-)
d
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/i386/tcg-target.h | 2 +-
tcg/i386/tcg-target.c.inc | 20 +++-
2 files changed, 12 insertions(+), 10 deletions(-)
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 73aa45a665..cb1b138b66 10
Simplify the arguments to always use s->code_ptr instead of
take it as an argument. That makes it easy to ensure that
the value_ptr is always the rx version.
Reviewed-by: Joelle van Dyne
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 6 ++
This value is constant across all thread-local copies of TCGContext,
so we might as well move it out of thread-local storage.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h| 2 +-
accel/tcg/tcg-runtime.c | 2 +-
tcg/tcg.c
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.
This does not actually use the read-only copy of the
data structure that exists within the rx region.
Reviewed-by: Joelle van Dyne
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Ri
We must change all targets at once, since all must match
the declaration in tcg.c.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h| 2 +-
tcg/tcg.c| 10 +-
tcg/aarch64/tcg-target.c.inc | 2 +-
tcg/arm/tcg-target.c.inc
Reviewed-by: Joelle van Dyne
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
include/disas/dis-asm.h | 4 ++--
disas.c | 4 +---
disas/capstone.c| 2 +-
3 files changed, 4 insertions(+), 6 deletions(-)
diff --git a/include/disas/dis-asm.h b/incl
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/aarch64/tcg-target.c.inc | 57
2 files changed, 33 insertions(+), 26 deletions(-)
diff --git a/tcg/aarch64/tcg-target.h b/tcg/aarch64/tcg-target.h
ind
Changes for v5:
* Protect MAP_JIT with !splitwx.
* Improve comments for in_code_gen_buffer.
* Update qemu-options.hx.
Thanks to Joelle for all of the reviews on v4.
The patches still without review are:
17-tcg-Add-accel-tcg-split-wx-property.patch
27-tcg-ppc-Use-tcg_tbrel_diff.patch
28-tcg-
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/tci.c | 60 +++
1 file changed, 34 insertions(+), 26 deletions(-)
diff --git a/tcg/tci.c b/tcg/tci.c
index 262a2b39ce..388c1dbee8 100644
--- a/tcg/tci.c
+++ b/tcg/tci.c
@@ -
This produces a small pc-relative displacement within the
generated code to the TB structure that preceeds it.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
accel/tcg/cpu-exec.c | 35 ++-
tcg/tcg-op.c | 13 -
2 files change
Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.c.inc | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tcg/ppc/tcg-target.c.inc b/tcg/ppc/tcg-
This is currently a no-op within tci/tcg-target.h, but
is about to be moved to a more generic location.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/tcg.c | 4
1 file changed, 4 insertions(+)
diff --git a/tcg/tcg.c b/tcg/tcg.c
index 829d4296e0..df2857dc88 100644
-
Cribbed from code posted by Joelle van Dyne ,
and rearranged to a cleaner structure.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
accel/tcg/translate-all.c | 67 +++
1 file changed, 67 insertions(+)
diff --git a/accel/tcg/translate-all.c
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h | 13 +
1 file changed, 13 insertions(+)
diff --git a/include/tcg/tcg.h b/include/tcg/tcg.h
index e744a1ce02..e6fce9a049 100644
--- a/include/tcg/tcg.h
+++ b/include/tcg/tcg.h
@@ -1146,6 +1146,19 @@
This value is constant across all thread-local copies of TCGContext,
so we might as well move it out of thread-local storage.
Use the correct function pointer type, and name the variable
tcg_qemu_tb_exec, which means that we are able to remove the
macro that does the casting.
Replace HAVE_TCG_QEM
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.c.inc | 15 +++
1 file changed, 7 insertions(+), 8 deletions(-)
diff --git a/tcg/sparc/tcg-target.c.inc b/tcg/sparc/tcg-target.c.inc
index d599ae27b5..8f04fdf981 100644
--- a/tcg/sparc/tcg-target.c.inc
+++ b/tcg/sparc/tcg-targ
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.h | 2 +-
tcg/ppc/tcg-target.c.inc | 53 +++-
2 files changed, 31 insertions(+), 24 deletions(-)
diff --git a/tcg/ppc/tcg-target.h b/tcg/ppc/tcg-target.h
index ba61a31b3e..ec51f474a7 100644
--- a/tcg
Use tcg_tbrel_diff when we need a displacement to a label,
and with a NULL argument when we need the normalizing addend.
Signed-off-by: Richard Henderson
---
tcg/s390/tcg-target.c.inc | 16
1 file changed, 8 insertions(+), 8 deletions(-)
diff --git a/tcg/s390/tcg-target.c.inc b
For darwin, the CTR_EL0 register is not accessible, but there
are system routines that we can use.
For other hosts, copy the single pointer implementation from
libgcc and modify it to support the double pointer interface
we require. This halves the number of cache operations required
when split-r
Signed-off-by: Richard Henderson
---
tcg/sparc/tcg-target.h | 2 +-
tcg/sparc/tcg-target.c.inc | 24 +---
2 files changed, 14 insertions(+), 12 deletions(-)
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 6f6cefaa15..6426e24f17 100644
--- a/tcg/sparc/t
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.h | 2 +-
tcg/riscv/tcg-target.c.inc | 41 +-
2 files changed, 24 insertions(+), 19 deletions(-)
diff --git a/tcg/riscv/tcg-target.h b/tcg/riscv/tcg-target.h
index 62
Add two helper functions, using a global variable to hold
the displacement. The displacement is currently always 0,
so no change in behaviour.
Begin using the functions in tcg common code only.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
accel/tcg/tcg-runtime.h | 2 +-
Now that all native tcg hosts support splitwx,
make this pointer const.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h| 2 +-
tcg/tcg.c| 2 +-
tcg/aarch64/tcg-target.c.inc | 3 +--
tcg/arm/tcg-target.c.inc | 3 +--
tcg/i38
Re-use the 256MiB region handling from alloc_code_gen_buffer_anon,
and replace that with the shared file mapping.
Signed-off-by: Richard Henderson
---
accel/tcg/translate-all.c | 46 ---
1 file changed, 38 insertions(+), 8 deletions(-)
diff --git a/accel/tcg/
Signed-off-by: Richard Henderson
---
tcg/s390/tcg-target.h | 2 +-
tcg/s390/tcg-target.c.inc | 69 +--
2 files changed, 31 insertions(+), 40 deletions(-)
diff --git a/tcg/s390/tcg-target.h b/tcg/s390/tcg-target.h
index b8f4296e4b..4edcb06044 100644
--- a/
This target was not updated with 7ecd02a06f8, and so did
not allow re-compilation with relocation overflow.
Remove reloc_26 and reloc_26_val as unused.
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.c.inc | 53 ++-
1 file changed, 19 insertions(+),
We must change all targets at once, since all must match
the declaration in tcg.c.
Reviewed-by: Joelle van Dyne
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Richard Henderson
---
tcg/tcg.c| 2 +-
tcg/aarch64/tcg-target.c.inc | 2 +-
tcg/arm/tcg-target.c.inc | 2 +-
Signed-off-by: Richard Henderson
---
tcg/mips/tcg-target.h | 2 +-
tcg/mips/tcg-target.c.inc | 43 ++-
2 files changed, 25 insertions(+), 20 deletions(-)
diff --git a/tcg/mips/tcg-target.h b/tcg/mips/tcg-target.h
index fbfe775fb4..ed5c347374 100644
--- a/
Change TCGLabel.u.value_ptr to const, and initialize it with
tcg_splitwx_to_rx. Propagate const through tcg/host/ only
as far as needed to avoid errors from the value_ptr change.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
include/tcg/tcg.h| 2 +-
tcg/tcg.c
Signed-off-by: Richard Henderson
---
tcg/arm/tcg-target.h | 2 +-
tcg/arm/tcg-target.c.inc | 37 +
2 files changed, 22 insertions(+), 17 deletions(-)
diff --git a/tcg/arm/tcg-target.h b/tcg/arm/tcg-target.h
index 494837d128..fdf75ba93f 100644
--- a/tcg/ar
There is nothing within the translators that ought to be
changing the TranslationBlock data, so make it const.
This does not actually use the read-only copy of the
data structure that exists within the rx region.
Reviewed-by: Joelle van Dyne
Reviewed-by: Philippe Mathieu-Daudé
Signed-off-by: Ri
Now that all native tcg hosts support splitwx,
make this pointer const.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.c.inc | 3 +--
tcg/arm/tcg-target.c.inc | 3 +--
tcg/i386/tcg-target.c.inc| 3 +--
tcg/mips/tcg-target.c.inc| 3 +--
tcg/p
On Mon, Jan 04, 2021 at 09:31:19PM +0100, Laurent Vivier wrote:
> On 11/11/2020 16:56, Stefan Hajnoczi wrote:
> > SystemTap's dtrace(1) prints the following warning when it encounters
> > long long arguments:
> >
> > Warning: /usr/bin/dtrace:trace/trace-dtrace-hw_virtio.dtrace:76: syntax
> > er
Report better error messages than just "could not allocate".
Let alloc_code_gen_buffer set ctx->code_gen_buffer_size
and ctx->code_gen_buffer, and simply return bool.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
accel/tcg/translate-all.c | 60 ++-
On Mon, Dec 14, 2020 at 11:31 PM Jiangyifei wrote:
>
>
> > -Original Message-
> > From: Alistair Francis [mailto:alistai...@gmail.com]
> > Sent: Wednesday, December 9, 2020 6:26 AM
> > To: Jiangyifei
> > Cc: qemu-devel@nongnu.org Developers ; open
> > list:RISC-V ; Zhangxiaofeng (F)
> > ;
Pass both rx and rw addresses to tb_target_set_jmp_target.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 2 +-
tcg/arm/tcg-target.h | 2 +-
tcg/i386/tcg-target.h| 6 +++---
tcg/mips/tcg-target.h| 2 +-
tcg/ppc/tcg-ta
A typo generated a branch-and-link insn instead of plain branch.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.c.inc | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/aarch64/tcg-target.c.inc b/tcg/aarch64/tcg-target.c.inc
index f
The maximum TB code gen size is UINT16_MAX, which the current
code does not support. Use our utility function to optimally
add an arbitrary constant.
Signed-off-by: Richard Henderson
---
tcg/ppc/tcg-target.c.inc | 5 ++---
1 file changed, 2 insertions(+), 3 deletions(-)
diff --git a/tcg/ppc/tc
The offset even checks were folded into the range check incorrectly.
By offsetting by 1, and not decrementing the width, we silently
allowed out of range branches.
Assert that the offset is always even instead. Move tcg_out_goto
down into the CONFIG_SOFTMMU block so that it is not unused.
Review
Since 7ecd02a06f8, we are prepared to re-start code generation
with a smaller TB if a relocation is out of range. We no longer
need to leave a nop in the stream Just In Case.
Reviewed-by: Alistair Francis
Signed-off-by: Richard Henderson
---
tcg/riscv/tcg-target.c.inc | 56
Now that all native tcg hosts support splitwx, remove the define.
Replace the one use with a test for CONFIG_TCG_INTERPRETER.
Reviewed-by: Joelle van Dyne
Signed-off-by: Richard Henderson
---
tcg/aarch64/tcg-target.h | 1 -
tcg/arm/tcg-target.h | 1 -
tcg/i386/tcg-target.h | 1 -
t
On 05/01/21 19:03, Daniel Henrique Barboza wrote:
+/*
+ * The trace backend must be initialized before daemonizing.
after, not before. :)
With this fixed,
Reviewed-by: Paolo Bonzini
+ * trace_init_backends() will call st_init(), which will create the
+ * trace thread in the
On 05.01.21 11:04, Alex Bennée wrote:
The "auto" documentation states:
That means they should run with every QEMU binary (also non-x86)
which is not the case as the check-system-fedora build which only
includes a rag tag group of rare and deprecated targets doesn't
support the virtio device
On 05/01/21 15:37, Roman Bolshakov wrote:
Does it work if you do:
crypto_ss.add(authz, qom)
libcrypto = static_library('crypto', crypto_ss.sources() + genh,
dependencies: crypto_ss.dependencies(),
...)
crypto = declare_dependency(link_whole
Commit v5.2.0-190-g0546c0609c ("vl: split various early command line
options to a separate function") moved the trace backend init code to
the qemu_process_early_options(). Which is now being called before
os_daemonize() via qemu_maybe_daemonize().
Turns out that this change of order causes a prob
Patchew URL:
https://patchew.org/QEMU/20210105171950.415486-1-richard.hender...@linaro.org/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 20210105171950.415486-1-richard.hender...@linaro.org
Subject: [PATCH v5 00/43]
changes from v2:
- fixed a typo in the comment block
- added Paolo's R-b
Daniel Henrique Barboza (1):
vl.c: do not execute trace_init_backends() before daemonizing
softmmu/vl.c | 18 +-
1 file changed, 13 insertions(+), 5 deletions(-)
--
2.26.2
Commit v5.2.0-190-g0546c0609c ("vl: split various early command line
options to a separate function") moved the trace backend init code to
the qemu_process_early_options(). Which is now being called before
os_daemonize() via qemu_maybe_daemonize().
Turns out that this change of order causes a prob
On 1/5/21 3:09 PM, Paolo Bonzini wrote:
On 05/01/21 19:03, Daniel Henrique Barboza wrote:
+ /*
+ * The trace backend must be initialized before daemonizing.
after, not before. :)
hahaha messed up in the comment block. Typical.
With this fixed,
Reviewed-by: Paolo Bonzini
Th
On Tue, Jan 05, 2021 at 05:31:41PM +0100, Igor Mammedov wrote:
> On Tue, 5 Jan 2021 09:34:31 -0500
> Eduardo Habkost wrote:
>
> > On Tue, Jan 05, 2021 at 12:36:50AM +0100, Igor Mammedov wrote:
> > > On Mon, 4 Jan 2021 13:29:06 -0500
> > > Eduardo Habkost wrote:
> > >
> > > > On Mon, Jan 04, 2
On 1/5/21 6:19 PM, Richard Henderson wrote:
> Now that all native tcg hosts support splitwx,
> make this pointer const.
>
> Reviewed-by: Joelle van Dyne
> Signed-off-by: Richard Henderson
> ---
> include/tcg/tcg.h| 2 +-
> tcg/tcg.c| 2 +-
> tcg/aarch64/tcg-targe
On 1/5/21 6:19 PM, Richard Henderson wrote:
> Now that all native tcg hosts support splitwx,
> make this pointer const.
>
> Reviewed-by: Joelle van Dyne
> Signed-off-by: Richard Henderson
> ---
> tcg/aarch64/tcg-target.c.inc | 3 +--
> tcg/arm/tcg-target.c.inc | 3 +--
> tcg/i386/tcg-target
On 1/5/21 6:19 PM, Richard Henderson wrote:
> Reviewed-by: Joelle van Dyne
> Signed-off-by: Richard Henderson
> ---
> tcg/tci.c | 60 +++
> 1 file changed, 34 insertions(+), 26 deletions(-)
Reviewed-by: Philippe Mathieu-Daudé
On 1/5/21 6:19 PM, Richard Henderson wrote:
> Report better error messages than just "could not allocate".
> Let alloc_code_gen_buffer set ctx->code_gen_buffer_size
> and ctx->code_gen_buffer, and simply return bool.
>
> Reviewed-by: Joelle van Dyne
> Signed-off-by: Richard Henderson
> ---
> ac
On Tue, 2021-01-05 at 10:39 -0600, Brijesh Singh wrote:
> The SEV FW >= 0.23 added a new command that can be used to query the
> attestation report containing the SHA-256 digest of the guest memory
> and VMSA encrypted with the LAUNCH_UPDATE and sign it with the PEK.
>
> Note, we already have a co
Hi Stefan
Thank you for your email.
1. We do not offer MacOS hosting
2. We can provide virtual machines with full KVM virt on x86 architecture
and soon arm64 v8
3. We do not provide dedicated servers.
If you would like to apply, you can do so at https://fosshost.org/apply
Feel free t
The first patch fixes a problem I have introduced in vhost-vdpa
traces by adding an unsupported format ("%llu").
The second patch fixes a problem I've seen while I was checking
the result of the first patch: %PRI formats are not decoded
correctly and we can end with things like "0x%u" because
the
The "%llu" format type is not understood by stap:
$ sudo stap -e 'probe begin{printf ("BEGIN")}' -I .
parse error: invalid or missing conversion specifier
saw: operator ',' at ./qemu-system-x86_64-log.stp:15118:101
source: printf("%d@%d vhost_vdpa_set_log_base dev: %p base:
macro is not reset after use, so the format decoded is always the
one of the first "PRI" in the format string.
For instance:
vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, \
uint32_t flags) "dev: %p offset: %"PRIu32" \
size: %"PR
Handling of ETHTOOL ioctl was not implemented.
Signed-off-by: Matevz Langus
---
linux-user/ioctls.h | 1 +
linux-user/syscall_defs.h | 1 +
2 files changed, 2 insertions(+)
diff --git a/linux-user/ioctls.h b/linux-user/ioctls.h
index 661b5daa9f..3e5c220199 100644
--- a/linux-user/ioctls.
On 01/05/21 01:35, Igor Mammedov wrote:
> On Wed, 30 Dec 2020 16:22:08 -0500
> "Michael S. Tsirkin" wrote:
>
>> On Tue, Dec 29, 2020 at 02:41:42PM +0100, Igor Mammedov wrote:
>>> On Wed, 23 Dec 2020 17:08:31 +0800
>>> Jiahui Cen wrote:
>>>
There may be some differences in pci resource as
On Thu, Dec 17, 2020 at 07:57:07PM +0300, Andrey Gruzdev wrote:
> This patch series is a kind of 'rethinking' of Denis Plotnikov's ideas he's
> implemented in his series '[PATCH v0 0/4] migration: add background snapshot'.
>
> Currently the only way to make (external) live VM snapshot is using exi
Hi Matevz,
Le 05/01/2021 à 20:24, Matevz Langus a écrit :
> Handling of ETHTOOL ioctl was not implemented.
>
> Signed-off-by: Matevz Langus
> ---
> linux-user/ioctls.h | 1 +
> linux-user/syscall_defs.h | 1 +
> 2 files changed, 2 insertions(+)
>
> diff --git a/linux-user/ioctls.h b/linu
On 1/5/21 8:17 PM, Laurent Vivier wrote:
> macro is not reset after use, so the format decoded is always the
> one of the first "PRI" in the format string.
>
> For instance:
>
> vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, \
> uint32_t flags) "dev: %p
101 - 200 of 268 matches
Mail list logo
