Re: [PATCH 0/4] clock: Get rid of clock_get_ns()

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 13:50, Philippe Mathieu-Daudé wrote: > (I also started to get rid of clock_get_hz() but, as you figured, > this is not a trivial task). Yeah; I haven't really looked at the users of clock_get_hz() in detail to know whether it's really possible to remove it. For the serial

Re: [PATCH v2 0/3] target/nios2: Roll cpu_pic/nios2_iic code into CPU itself

2020-12-11 Thread Peter Maydell
On Sun, 29 Nov 2020 at 17:40, Peter Maydell wrote: > > The Nios2 architecture supports two different interrupt controller > options: > > * The IIC (Internal Interrupt Controller) is part of the CPU itself; >it has 32 IRQ input lines and no NMI support. Interrupt status is >queried and co

Re: [PATCH 1/2] target/arm: add support for FEAT_DIT, Data Independent Timing

2020-12-11 Thread Richard Henderson
On 12/10/20 11:13 PM, Rebecca Cran wrote: > Add support for FEAT_DIT. DIT (Data Independent Timing) is a required > feature for ARMv8.4. Since virtual machine execution is largely > nondeterministic, it's implemented as a NOP. Alternately, or additionally, TCG is outside of the security domain (on

Re: [PATCH 0/4] Improve reporting of ROM blob overlap errors

2020-12-11 Thread Peter Maydell
On Sun, 29 Nov 2020 at 20:39, Peter Maydell wrote: > > (This was inspired by a conversation on IRC with a user.) > > We report an error if we detect that there's an overlap in guest > memory between two ROM blobs, but the warning is pretty opaque. > Currently it looks like this: > > rom: requested

Re: [PATCH 2/2] target/arm: Set ID_AA64PFR0.DIT and ID_PFR0.DIT to 1 for "max" AA64 CPU

2020-12-11 Thread Richard Henderson
On 12/10/20 11:13 PM, Rebecca Cran wrote: > Enable FEAT_DIT for the "max" AARCH64 CPU. > > Signed-off-by: Rebecca Cran > --- > target/arm/cpu64.c | 5 + > 1 file changed, 5 insertions(+) Reviewed-by: Richard Henderson r~

Re: [PATCH 0/2] m68k/q800: make the GLUE chip a QOM device

2020-12-11 Thread Peter Maydell
On Fri, 6 Nov 2020 at 23:51, Peter Maydell wrote: > > This series is 6.0 material really I think. It's a bit of cleanup > prompted by a Coverity issue, CID 1421883. There are another half > dozen or so similar issues, where Coverity is complaining that we > allocate an array of qemu_irqs with qe

Re: [PATCH] gdbstub: Correct misparsing of vCont C/S requests

2020-12-11 Thread Peter Maydell
On Mon, 23 Nov 2020 at 13:41, Alex Bennée wrote: > > > Peter Maydell writes: > > > In the vCont packet, two of the command actions (C and S) take an > > argument specifying the signal to be sent to the process/thread, which is > > sent as an ASCII string of two hex digits which immediately follow

Re: [PATCH] ide:atapi: check io_buffer_index in ide_atapi_cmd_reply_end

2020-12-11 Thread P J P
+-- On Fri, 11 Dec 2020, Paolo Bonzini wrote --+ | This is not the root cause. These are the last steps before bad things | happen; the root cause is what _led_ to those last steps. In this case, the | root cause is that a read request with s->lba == -1 is mistaken for a | non-read. Read requ

Re: [PATCH 3/3] virtiofsd: Check file type in lo_flush()

2020-12-11 Thread Vivek Goyal
On Thu, Dec 10, 2020 at 08:14:31PM +, Dr. David Alan Gilbert wrote: > * Vivek Goyal (vgo...@redhat.com) wrote: > > On Thu, Dec 10, 2020 at 08:03:03PM +, Dr. David Alan Gilbert wrote: > > > * Vivek Goyal (vgo...@redhat.com) wrote: > > > > Currently lo_flush() is written in such a way that it

Re: [PATCH v14 08/13] copy-on-read: skip non-guest reads if no copy needed

2020-12-11 Thread Max Reitz
On 04.12.20 23:07, Vladimir Sementsov-Ogievskiy wrote: From: Andrey Shinkevich If the flag BDRV_REQ_PREFETCH was set, skip idling read/write operations in COR-driver. It can be taken into account for the COR-algorithms optimization. That check is being made during the block stream job by the mo

Re: [PATCH 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h

2020-12-11 Thread Peter Maydell
On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > Signed-off-by: Leif Lindholm > --- > target/arm/cpu.h | 24 > 1 file changed, 24 insertions(+) > > diff --git a/target/arm/cpu.h b/target/arm/cpu.h > index b54d1dc092..5e9e8061f7 100644 > --- a/target/arm/cpu.h > +++

Re: [PATCH 4/5] target/arm: add aarch64 ID register fields to cpu.h

2020-12-11 Thread Peter Maydell
On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > Add entries present in ARM DDI 0487F.c (August 2020). > > Signed-off-by: Leif Lindholm Reviewed-by: Peter Maydell thanks -- PMM

[Question] How we make fields of a structure fit in a cache line?

2020-12-11 Thread liqiuhao
Hi, While learning QEMU, I notice that some fields of structures are comment with "should fit in a cache line." For instance, the MemoryRegion is defined as: struct MemoryRegion { Object parent_obj; /* private: */ /* The following fields should fit in a cache line */ bool romd_m

Re: [PATCH 5/5] target/arm: add aarch32 ID register fields to cpu.h

2020-12-11 Thread Peter Maydell
On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > Add entries present in ARM DDI 0487F.c (August 2020). > > Signed-off-by: Leif Lindholm > --- > target/arm/cpu.h | 37 + > 1 file changed, 37 insertions(+) > FIELD(ID_MMFR4, CCIDX, 24, 4) > FIELD(ID_MMFR4

Re: [PATCH 1/5] target/arm: fix typo in cpu.h ID_AA64PFR1 field name

2020-12-11 Thread Peter Maydell
On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > SBSS -> SSBS > > Signed-off-by: Leif Lindholm Reviewed-by: Peter Maydell thanks -- PMM

Re: [PATCH 2/5] target/arm: make ARMCPU.clidr 64-bit

2020-12-11 Thread Peter Maydell
On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > The AArch64 view of CLIDR_EL1 extends the ICB field to include also bit > 32, as well as adding a Ttype field when FEAT_MTE is implemented. > Extend the clidr field to be able to hold this context. > > Signed-off-by: Leif Lindholm Reviewed-by

Re: [PATCH 1/3] trace: fix simpletrace doc mismerge

2020-12-11 Thread Peter Maydell
On Wed, 9 Dec 2020 at 17:42, Stefan Hajnoczi wrote: > > The simpletrace documentation section was accidentally split when the > ftrace section was introduced. Move the simpletrace-specific > documentation back into the simpletrace section. > > Fixes: e64dd5efb2c6d522a3bc9d096cd49a4e53f0ae10 ("trac

Re: [PATCH 2/3] tracing: convert documentation to rST

2020-12-11 Thread Peter Maydell
On Wed, 9 Dec 2020 at 17:42, Stefan Hajnoczi wrote: > > This is a simple rST conversion of the documentation. > > Signed-off-by: Stefan Hajnoczi > --- > docs/devel/index.rst| 1 + > docs/devel/{tracing.txt => tracing.rst} | 134 ++-- > 2 files changed, 8

Re: [PULL v2 000/113] First batch of misc (i386, kernel-doc, memory, vl.c) changes for QEMU 6.0

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 12:34, Paolo Bonzini wrote: > > The following changes since commit 379e9eaed497a2e09b5985e1e15967d7bfea8296: > > Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20201210' > into staging (2020-12-10 14:26:35 +) > > are available in the Git repository at

Re: [PATCH 3/3] trace: recommend "log" backend for getting started with tracing

2020-12-11 Thread Peter Maydell
On Wed, 9 Dec 2020 at 17:42, Stefan Hajnoczi wrote: > > The "simple" backend is actually more complicated to use than the "log" > backend. Update the quickstart documentation to feature the "log" > backend instead of the "simple" backend. > > Suggested-by: Peter Maydell > Signed-off-by: Stefan Ha

Re: ceph + freeipa ubuntu/fedora common small bug

2020-12-11 Thread Vivek Goyal
On Fri, Dec 11, 2020 at 11:05:22AM +, Dr. David Alan Gilbert wrote: > * Harry G. Coin (hgc...@gmail.com) wrote: > > FYI.  Same thing we saw on Fedora installing freeipa, this on ubuntu > > with ceph.  Identical bitmask report. > > > > ... > > > > Fixing /var/run/ceph ownershipdone > >

Re: [PATCH v6 0/4] migration: UFFD write-tracking migration/snapshots

2020-12-11 Thread Peter Xu
On Fri, Dec 11, 2020 at 04:13:02PM +0300, Andrey Gruzdev wrote: > I've also made wr-fault resolution latency measurements, for the case when > migration > stream is dumped to a file in cached mode.. Should approximately match saving > to the > file fd directly though I used 'migrate exec:<>' usin

[PATCH v5 01/11] hvf: Add hypervisor entitlement to output binaries

2020-12-11 Thread Alexander Graf
In macOS 11, QEMU only gets access to Hypervisor.framework if it has the respective entitlement. Add an entitlement template and automatically self sign and apply the entitlement in the build. Signed-off-by: Alexander Graf Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov --- v1 -> v2:

[PATCH v5 03/11] hvf: Move common code out

2020-12-11 Thread Alexander Graf
Until now, Hypervisor.framework has only been available on x86_64 systems. With Apple Silicon shipping now, it extends its reach to aarch64. To prepare for support for multiple architectures, let's move common code out into its own accel directory. Signed-off-by: Alexander Graf Reviewed-by: Roman

[PATCH v5 06/11] hvf: Simplify post reset/init/loadvm hooks

2020-12-11 Thread Alexander Graf
The hooks we have that call us after reset, init and loadvm really all just want to say "The reference of all register state is in the QEMU vcpu struct, please push it". We already have a working pushing mechanism though called cpu->vcpu_dirty, so we can just reuse that for all of the above, synci

[PATCH v5 02/11] hvf: x86: Remove unused definitions

2020-12-11 Thread Alexander Graf
The hvf i386 has a few struct and cpp definitions that are never used. Remove them. Suggested-by: Roman Bolshakov Signed-off-by: Alexander Graf Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov --- target/i386/hvf/hvf-i386.h | 16 1 file changed, 16 deletions(-) diff -

[PATCH v5 04/11] hvf: Introduce hvf vcpu struct

2020-12-11 Thread Alexander Graf
We will need more than a single field for hvf going forward. To keep the global vcpu struct uncluttered, let's allocate a special hvf vcpu struct, similar to how hax does it. Signed-off-by: Alexander Graf Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov Reviewed-by: Alex Bennée --- v4

[PATCH v5 05/11] arm: Set PSCI to 0.2 for HVF

2020-12-11 Thread Alexander Graf
In Hypervisor.framework, we just pass PSCI calls straight on to the QEMU emulation of it. That means, if TCG is compatible with PSCI 0.2, so are we. Let's transpose that fact in code too. Signed-off-by: Alexander Graf Reviewed-by: Roman Bolshakov --- v3 -> v4: - Combine both if statements

[PATCH v5 08/11] arm: Add Hypervisor.framework build target

2020-12-11 Thread Alexander Graf
Now that we have all logic in place that we need to handle Hypervisor.framework on Apple Silicon systems, let's add CONFIG_HVF for aarch64 as well so that we can build it. Signed-off-by: Alexander Graf Reviewed-by: Roman Bolshakov Tested-by: Roman Bolshakov (x86 only) --- v1 -> v2: - Fix b

Re: [PATCH v14 09/13] stream: skip filters when writing backing file name to QCOW2 header

2020-12-11 Thread Max Reitz
On 04.12.20 23:07, Vladimir Sementsov-Ogievskiy wrote: From: Andrey Shinkevich Avoid writing a filter JSON file name and a filter format name to QCOW2 image when the backing file is being changed after the block stream job. It can occur due to a concurrent commit job on the same backing chain.

[PATCH v5 09/11] arm/hvf: Add a WFI handler

2020-12-11 Thread Alexander Graf
From: Peter Collingbourne Sleep on WFI until the VTIMER is due but allow ourselves to be woken up on IPI. In this implementation IPI is blocked on the CPU thread at startup and pselect() is used to atomically unblock the signal and begin sleeping. The signal is sent unconditionally so there's no

[PATCH v5 00/11] hvf: Implement Apple Silicon Support

2020-12-11 Thread Alexander Graf
Now that Apple Silicon is widely available, people are obviously excited to try and run virtualized workloads on them, such as Linux and Windows. This patch set implements a fully functional version to get the ball going on that. With this applied, I can successfully run both Linux and Windows as

[PATCH v5 07/11] hvf: Add Apple Silicon support

2020-12-11 Thread Alexander Graf
With Apple Silicon available to the masses, it's a good time to add support for driving its virtualization extensions from QEMU. This patch adds all necessary architecture specific code to get basic VMs working. It's still pretty raw, but definitely functional. Known limitations: - Vtimer ackn

[PATCH v5 10/11] hvf: arm: Add support for GICv3

2020-12-11 Thread Alexander Graf
We currently only support GICv2 emulation. To also support GICv3, we will need to pass a few system registers into their respective handler functions. This patch adds handling for all of the required system registers, so that we can run with more than 8 vCPUs. Signed-off-by: Alexander Graf Acked

[PATCH 00/12] Compile QEMU with -Wimplicit-fallthrough

2020-12-11 Thread Thomas Huth
Coverity is already reporting switch-case statements where code can fall through from one case to another without a proper comment (since this could indicate a missing "break" and thus a bug). However, it's cumbersome to fix these issues after they have been merged already, it would be better if th

[PATCH 07/12] accel/tcg/user-exec: silence the compiler warnings

2020-12-11 Thread Thomas Huth
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: ../accel/tcg/user-exec.c: In function ‘handle_cpu_signal’: ../accel/tcg/user-exec.c:169:13: warning: this statement may fall through [-Wimplicit-fallthrough=] 169 | cpu_exit_tb_from_sighand

[PATCH 02/12] target/unicore32/translate: Add missing fallthrough annotations

2020-12-11 Thread Thomas Huth
Looking at the way the code is formatted here (there is an empty line after break statements, but none where the break is missing), and the instruction set overview at https://en.wikipedia.org/wiki/Unicore the fallthrough is very likely intended here. So add a fallthrough comment to make the it com

[PATCH v5 11/11] hvf: arm: Implement -cpu host

2020-12-11 Thread Alexander Graf
Now that we have working system register sync, we push more target CPU properties into the virtual machine. That might be useful in some situations, but is not the typical case that users want. So let's add a -cpu host option that allows them to explicitly pass all CPU capabilities of their host C

[PATCH 04/12] hw/timer/renesas_tmr: silence the compiler warnings

2020-12-11 Thread Thomas Huth
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: ../hw/timer/renesas_tmr.c: In function ‘tmr_read’: ../hw/timer/renesas_tmr.c:221:19: warning: this statement may fall through [-Wimplicit-fallthrough=] 221 | } else if (ch == 0) {i |

[PATCH 01/12] disas/libvixl: Fix fall-through annotation for GCC >= 7

2020-12-11 Thread Thomas Huth
For compiling with -Wimplicit-fallthrough we need to fix the fallthrough annotations in the libvixl code. This is based on the following upstream vixl commit by Martyn Capewell: https://git.linaro.org/arm/vixl.git/commit/?id=de326f850f736c3a337 "GCC 7 enables switch/case fallthrough checking, b

[PATCH 09/12] target/sparc/win_helper: silence the compiler warnings

2020-12-11 Thread Thomas Huth
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: target/sparc/win_helper.c: In function ‘get_gregset’: target/sparc/win_helper.c:304:9: warning: this statement may fall through [-Wimplicit-fallthrough=] 304 | trace_win_helper_gregset_error(ps

Re: [PATCH] hw/block: m25p80: Fix fast read for SST flashes

2020-12-11 Thread Francisco Iglesias
Hello Bin, On [2020 Dec 11] Fri 14:07:21, Bin Meng wrote: > Hi Francisco, > > On Fri, Dec 4, 2020 at 7:28 PM Francisco Iglesias > wrote: > > > > Hello Bin, > > > > On [2020 Dec 04] Fri 18:52:50, Bin Meng wrote: > > > Hi Francisco, > > > > > > On Fri, Dec 4, 2020 at 6:46 PM Francisco Iglesias > >

[PATCH 06/12] hw/intc/arm_gicv3_kvm: silence the compiler warnings

2020-12-11 Thread Thomas Huth
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: hw/intc/arm_gicv3_kvm.c: In function ‘kvm_arm_gicv3_put’: hw/intc/arm_gicv3_kvm.c:484:13: warning: this statement may fall through [-Wimplicit-fallthrough=] kvm_gicc_access(s, ICC_AP0R_EL1(1

[PATCH 03/12] hw/rtc/twl92230: Silence warnings about missing fallthrough statements

2020-12-11 Thread Thomas Huth
When compiling with -Werror=implicit-fallthrough, gcc complains about missing fallthrough annotations in this file. Looking at the code, the fallthrough is indeed wanted here, but instead of adding the annotations, it can be done more efficiently by simply calculating the offset with a subtraction

[PATCH 05/12] target/i386: silence the compiler warnings in gen_shiftd_rm_T1

2020-12-11 Thread Thomas Huth
From: Chen Qun The current "#ifdef TARGET_X86_64" statement affects the compiler's determination of fall through. When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: target/i386/translate.c: In function ‘gen_shiftd_rm_T1’: target/i386/translate.c:1773:12: warning: this

[PATCH 08/12] target/sparc/translate: silence the compiler warnings

2020-12-11 Thread Thomas Huth
From: Chen Qun When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: target/sparc/translate.c: In function ‘gen_st_asi’: target/sparc/translate.c:2320:12: warning: this statement may fall through [-Wimplicit-fallthrough=] 2320 | if (!(dc->def->features & CPU_FEAT

[PATCH 12/12] configure: Compile with -Wimplicit-fallthrough=2

2020-12-11 Thread Thomas Huth
Coverity always complains about switch-case statements that fall through the next one when there is no comment in between - which could indicate a forgotten "break" statement. Instead of handling these issues after they have been committed, it would be better to avoid them in the build process alre

[PATCH 11/12] tests/fp: Do not emit implicit-fallthrough warnings in the softfloat tests

2020-12-11 Thread Thomas Huth
The softfloat tests are external repositories, so we do not care about implicit fallthrough warnings in this code. Signed-off-by: Thomas Huth --- tests/fp/meson.build | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/fp/meson.build b/tests/fp/meson.build index 3d4fb00f9d..8d739c4d59 10

[PATCH 10/12] tcg/optimize: Add fallthrough annotations

2020-12-11 Thread Thomas Huth
To be able to compile this file with -Werror=implicit-fallthrough, we need to add some fallthrough annotations to the case statements that might fall through. Unfortunately, the typical "/* fallthrough */" comments do not work here as expected since some case labels are wrapped in macros and the co

Re: [PATCH 03/12] hw/rtc/twl92230: Silence warnings about missing fallthrough statements

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 15:24, Thomas Huth wrote: > > When compiling with -Werror=implicit-fallthrough, gcc complains about > missing fallthrough annotations in this file. Looking at the code, > the fallthrough is indeed wanted here, but instead of adding the > annotations, it can be done more effi

Re: [PATCH] kvm: Take into account the unaligned section size when preparing bitmap

2020-12-11 Thread Peter Xu
On Fri, Dec 11, 2020 at 09:13:10AM +0800, zhukeqian wrote: > > On 2020/12/10 22:50, Peter Xu wrote: > > On Thu, Dec 10, 2020 at 10:53:23AM +0800, zhukeqian wrote: > >> > >> > >> On 2020/12/10 10:08, Peter Xu wrote: > >>> Keqian, > >>> > >>> On Thu, Dec 10, 2020 at 09:46:06AM +0800, zhukeqian wrote

Re: [PATCH] hw/block: m25p80: Fix fast read for SST flashes

2020-12-11 Thread Bin Meng
Hi Francisco, On Fri, Dec 11, 2020 at 11:16 PM Francisco Iglesias wrote: > > Hello Bin, > > On [2020 Dec 11] Fri 14:07:21, Bin Meng wrote: > > Hi Francisco, > > > > On Fri, Dec 4, 2020 at 7:28 PM Francisco Iglesias > > wrote: > > > > > > Hello Bin, > > > > > > On [2020 Dec 04] Fri 18:52:50, Bin

Re: [RFC PATCH] hw/misc/zynq_slcr: Avoid #DIV/0! error

2020-12-11 Thread Damien Hedde
On 12/10/20 9:13 PM, Edgar E. Iglesias wrote: > On Thu, Dec 10, 2020 at 08:39:32AM -0800, Alistair Francis wrote: >> On Thu, Dec 10, 2020 at 6:27 AM Philippe Mathieu-Daudé >> wrote: >>> >>> Malicious user can set the feedback divisor for the PLLs >>> to zero, triggering a floating-point except

Re: [PATCH 12/12] configure: Compile with -Wimplicit-fallthrough=2

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 15:24, Thomas Huth wrote: > > Coverity always complains about switch-case statements that fall through > the next one when there is no comment in between - which could indicate > a forgotten "break" statement. Instead of handling these issues after > they have been committed

[PATCH] hw/rtc/twl92230: Add missing 'break'

2020-12-11 Thread Philippe Mathieu-Daudé
Add missing 'break' to fix: hw/rtc/twl92230.c: In function ‘menelaus_write’: hw/rtc/twl92230.c:713:5: error: label at end of compound statement 713 | default: | ^~~ Signed-off-by: Philippe Mathieu-Daudé --- I noticed Thomas "Compile QEMU with -Wimplicit-fallthrough" s

Re: [PATCH 10/12] tcg/optimize: Add fallthrough annotations

2020-12-11 Thread Richard Henderson
On 12/11/20 9:24 AM, Thomas Huth wrote: > To be able to compile this file with -Werror=implicit-fallthrough, > we need to add some fallthrough annotations to the case statements > that might fall through. Unfortunately, the typical "/* fallthrough */" > comments do not work here as expected since s

Re: [PATCH 11/12] tests/fp: Do not emit implicit-fallthrough warnings in the softfloat tests

2020-12-11 Thread Richard Henderson
On 12/11/20 9:24 AM, Thomas Huth wrote: > The softfloat tests are external repositories, so we do not care > about implicit fallthrough warnings in this code. > > Signed-off-by: Thomas Huth > --- > tests/fp/meson.build | 2 ++ > 1 file changed, 2 insertions(+) Reviewed-by: Richard Henderson r

Re: [PATCH 04/12] hw/timer/renesas_tmr: silence the compiler warnings

2020-12-11 Thread Thomas Huth
On 11/12/2020 16.38, Peter Maydell wrote: > On Fri, 11 Dec 2020 at 15:24, Thomas Huth wrote: >> >> From: Chen Qun >> >> When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: >> ../hw/timer/renesas_tmr.c: In function ‘tmr_read’: >> ../hw/timer/renesas_tmr.c:221:19: warning:

Re: [PATCH v5 05/11] arm: Set PSCI to 0.2 for HVF

2020-12-11 Thread Richard Henderson
On 12/11/20 9:12 AM, Alexander Graf wrote: > In Hypervisor.framework, we just pass PSCI calls straight on to the QEMU > emulation > of it. That means, if TCG is compatible with PSCI 0.2, so are we. Let's > transpose > that fact in code too. > > Signed-off-by: Alexander Graf > Reviewed-by: Roman

Re: [PATCH v3 0/1] spapr.c: set a 'kvm-type' default value instead of relying on NULL

2020-12-11 Thread Paolo Bonzini
On 11/12/20 01:21, David Gibson wrote: On Thu, Dec 10, 2020 at 05:51:41PM +0100, Paolo Bonzini wrote: On 10/12/20 15:55, Daniel Henrique Barboza wrote: changes from v2, all proposed by Greg: * Handle 'NULL' value as default mode fallback in spapr_kvm_type() * Do not allow for 'AUTO' to be a val

Re: [PATCH 01/12] disas/libvixl: Fix fall-through annotation for GCC >= 7

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 15:24, Thomas Huth wrote: > > For compiling with -Wimplicit-fallthrough we need to fix the > fallthrough annotations in the libvixl code. This is based on > the following upstream vixl commit by Martyn Capewell: > > https://git.linaro.org/arm/vixl.git/commit/?id=de326f850f7

Re: [PATCH] gdbstub: Correct misparsing of vCont C/S requests

2020-12-11 Thread Alex Bennée
Peter Maydell writes: > On Mon, 23 Nov 2020 at 13:41, Alex Bennée wrote: >> >> >> Peter Maydell writes: >> >> > In the vCont packet, two of the command actions (C and S) take an >> > argument specifying the signal to be sent to the process/thread, which is >> > sent as an ASCII string of two

Re: [PATCH 04/12] hw/timer/renesas_tmr: silence the compiler warnings

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 15:24, Thomas Huth wrote: > > From: Chen Qun > > When using -Wimplicit-fallthrough in our CFLAGS, the compiler showed warning: > ../hw/timer/renesas_tmr.c: In function ‘tmr_read’: > ../hw/timer/renesas_tmr.c:221:19: warning: this statement may fall through > [-Wimplicit-fa

Re: [PATCH] hw/rtc/twl92230: Add missing 'break'

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 15:46, Philippe Mathieu-Daudé wrote: > > Add missing 'break' to fix: > > hw/rtc/twl92230.c: In function ‘menelaus_write’: > hw/rtc/twl92230.c:713:5: error: label at end of compound statement > 713 | default: > | ^~~ > > Signed-off-by: Philippe Mat

Re: [PATCH v3] tests/acceptance: test hot(un)plug of ccw devices

2020-12-11 Thread Wainer dos Santos Moschetta
Hi, On 12/8/20 9:28 AM, Cornelia Huck wrote: Hotplug a virtio-net-ccw device, and then hotunplug it again. Signed-off-by: Cornelia Huck --- v2->v3: - do the dmesg cleanout and waiting for messages properly [Thomas] Wainer: I dropped your r-b, as there had been too many changes for me

Re: [PATCH] docs: Build and install all the docs in a single manual

2020-12-11 Thread Paolo Bonzini
On 10/12/20 21:35, Peter Maydell wrote: When we first converted our documentation to Sphinx, we split it into multiple manuals (system, interop, tools, etc), which are all built separately. The primary driver for this was wanting to be able to avoid shipping the 'devel' manual to end-users. How

Re: [PATCH] hw/rtc/twl92230: Add missing 'break'

2020-12-11 Thread Thomas Huth
On 11/12/2020 16.46, Philippe Mathieu-Daudé wrote: > Add missing 'break' to fix: > > hw/rtc/twl92230.c: In function ‘menelaus_write’: > hw/rtc/twl92230.c:713:5: error: label at end of compound statement > 713 | default: > | ^~~ ... which occurs when disabling the "VERB

Re: [PATCH 00/12] Compile QEMU with -Wimplicit-fallthrough

2020-12-11 Thread Thomas Huth
On 11/12/2020 16.24, Thomas Huth wrote: > Coverity is already reporting switch-case statements where code > can fall through from one case to another without a proper comment > (since this could indicate a missing "break" and thus a bug). > However, it's cumbersome to fix these issues after they ha

Re: [PATCH] docs: Build and install all the docs in a single manual

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 15:48, Paolo Bonzini wrote: > > On 10/12/20 21:35, Peter Maydell wrote: > > When we first converted our documentation to Sphinx, we split it into > > multiple manuals (system, interop, tools, etc), which are all built > > separately. The primary driver for this was wanting

Re: Some performance numbers for virtiofs, DAX and virtio-9p

2020-12-11 Thread Vivek Goyal
On Thu, Dec 10, 2020 at 08:29:21PM +0100, Miklos Szeredi wrote: > On Thu, Dec 10, 2020 at 5:11 PM Vivek Goyal wrote: > > > Conclusion > > --- > > - virtiofs DAX seems to help a lot in many workloads. > > > > Note, DAX performance well only if data fits in cache window. My total > > da

Re: [PATCH v14 10/13] qapi: block-stream: add "bottom" argument

2020-12-11 Thread Max Reitz
On 04.12.20 23:07, Vladimir Sementsov-Ogievskiy wrote: The code already don't freeze base node and we try to make it prepared for the situation when base node is changed during the operation. In other words, block-stream doesn't own base node. Let's introduce a new interface which should replace

Re: [PATCH v11 04/25] i386: move kvm accel files into kvm/

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > meson.build | 1 + > target/i386/cpu.h| 2 +- > target/i386/{ => kvm}/hyperv-proto.h | 0 > target/i386/{ => kvm}/hyperv.h | 0 > tar

Re: [PATCH v11 05/25] i386: move whpx accel files into whpx/

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > target/i386/{ => whpx}/whp-dispatch.h | 0 > target/i386/{ => whpx}/whpx-cpus.h| 0 > target/i386/{ => whpx}/whpx-all.c | 0 > target/i386/{ => whpx}/whpx-cpus.c| 0 > MAIN

Re: [PATCH v15 0/4] Add Versal usb model

2020-12-11 Thread Peter Maydell
On Thu, 3 Dec 2020 at 19:18, Sai Pavan Boddu wrote: > > This patch series adds dwc3 usb controller to versal SOC. > Applied to target-arm.next, thanks. -- PMM

[PATCH] ui: add support for remote power control to VNC server

2020-12-11 Thread Daniel P . Berrangé
The "XVP" (Xen VNC Proxy) extension defines a mechanism for a VNC client to issue power control requests to trigger graceful shutdown, reboot, or hard reset. This option is not enabled by default, since we cannot assume that users with VNC access implicitly have administrator access to the guest O

Re: [PATCH v14 11/13] iotests: 30: prepare to COR filter insertion by stream job

2020-12-11 Thread Max Reitz
On 04.12.20 23:07, Vladimir Sementsov-Ogievskiy wrote: test_stream_parallel run parallel stream jobs, intersecting so that top of one is base of another. It's OK now, but it would be a problem if insert the filter, as one job will want to use another job's filter as above_base node. Correct thin

Re: [PATCH v11 08/25] i386: move TCG accel files into tcg/

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > target/i386/{ => tcg}/bpt_helper.c | 0 > target/i386/{ => tcg}/cc_helper.c | 0 > target/i386/{ => tcg}/excp_helper.c | 0 > target/i386/{ => tcg}/fpu_helper.c | 0 > target/i

Re: [PATCH 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h

2020-12-11 Thread Leif Lindholm
On Fri, Dec 11, 2020 at 14:45:55 +, Peter Maydell wrote: > On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > > > Signed-off-by: Leif Lindholm > > --- > > target/arm/cpu.h | 24 > > 1 file changed, 24 insertions(+) > > > > diff --git a/target/arm/cpu.h b/target/ar

Re: [PATCH v11 06/25] i386: move hax accel files into hax/

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > target/i386/{ => hax}/hax-cpus.h | 0 > target/i386/{ => hax}/hax-i386.h | 6 +++--- > target/i386/{ => hax}/hax-interface.h | 0 > target/i386/{ => hax}/hax-posix.h | 0

Re: [PATCH] hw/block: m25p80: Fix fast read for SST flashes

2020-12-11 Thread Francisco Iglesias
Hello Bin, On [2020 Dec 11] Fri 23:29:16, Bin Meng wrote: > Hi Francisco, > > On Fri, Dec 11, 2020 at 11:16 PM Francisco Iglesias > wrote: > > > > Hello Bin, > > > > On [2020 Dec 11] Fri 14:07:21, Bin Meng wrote: > > > Hi Francisco, > > > > > > On Fri, Dec 4, 2020 at 7:28 PM Francisco Iglesias >

Re: [PATCH v11 09/25] i386: move cpu dump out of helper.c into cpu-dump.c

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > target/i386/cpu.h | 1 + > target/i386/cpu-dump.c | 537 > target/i386/helper.c| 514 -- > tar

Re: [PATCH v14 12/13] block/stream: add s->target_bs

2020-12-11 Thread Max Reitz
On 04.12.20 23:07, Vladimir Sementsov-Ogievskiy wrote: Add a direct link to target bs for convenience and to simplify following commit which will insert COR filter above target bs. This is a part of original commit written by Andrey. Signed-off-by: Vladimir Sementsov-Ogievskiy --- block/stre

Re: [PATCH v11 10/25] i386: move TCG cpu class initialization out of helper.c

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > Signed-off-by: Claudio Fontana > --- > target/i386/cpu.h | 97 ++--- > target/i386/tcg/helper-tcg.h | 112 ++ > target/i386/tcg/tcg-cpu.h | 15 + > target/i386/cpu.c

Re: [PATCH v11 11/25] tcg: cpu_exec_{enter,exit} helpers

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > From: Eduardo Habkost > > Move invocation of CPUClass.cpu_exec_*() to separate helpers, > to make it easier to refactor that code later. > > Signed-off-by: Eduardo Habkost > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > accel/

Re: [PATCH 3/5] target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 16:12, Leif Lindholm wrote: > > On Fri, Dec 11, 2020 at 14:45:55 +, Peter Maydell wrote: > > On Tue, 8 Dec 2020 at 12:23, Leif Lindholm wrote: > > > > > > Signed-off-by: Leif Lindholm > > > +FIELD(CCSIDR_EL1, ASSOCIATIVITY, 3, 20) > > > > The ASSOCIATIVITY field is bi

[PATCH v3 4/4] qtest/pvpanic: Test panic option that allows VM to continue

2020-12-11 Thread Alejandro Jimenez
Test the scenario where the -action panic=none parameter is used to signal that the VM must continue executing after a guest panic occurs. Suggested-by: Paolo Bonzini Signed-off-by: Alejandro Jimenez --- tests/qtest/pvpanic-test.c | 26 +- 1 file changed, 25 insertions(+

[PATCH v3 2/4] vl: Add option to avoid stopping VM upon guest panic

2020-12-11 Thread Alejandro Jimenez
The current default action of pausing a guest after a panic event is received leaves the responsibility to resume guest execution to the management layer. The reasons for this behavior are discussed here: https://lore.kernel.org/qemu-devel/52148f88.5000...@redhat.com/ However, in instances like th

Re: [PATCH v14 10/13] qapi: block-stream: add "bottom" argument

2020-12-11 Thread Vladimir Sementsov-Ogievskiy
11.12.2020 19:05, Max Reitz wrote: On 04.12.20 23:07, Vladimir Sementsov-Ogievskiy wrote: The code already don't freeze base node and we try to make it prepared for the situation when base node is changed during the operation. In other words, block-stream doesn't own base node. Let's introduce

[PATCH v3 1/4] vl: Add an -action option to respond to guest events

2020-12-11 Thread Alejandro Jimenez
Several command line options currently in use are meant to modify the behavior of QEMU in response to certain guest events like: -no-reboot, -no-shutdown, -watchdog-action. These can be grouped into a single option of the form: -action event=action Which can be used to specify the existing optio

[PATCH v3 3/4] qmp: Allow setting -action parameters on the fly

2020-12-11 Thread Alejandro Jimenez
Add a QMP command to allow for the behaviors specified by the -action event=action command line option to be set at runtime. The new command is named set-action and takes optional arguments with an event and a corresponding action to take. Example: -> { "execute": "set-action", "arguments":

Re: [PATCH v11 15/25] cpu: Introduce TCGCpuOperations struct

2020-12-11 Thread Richard Henderson
On 12/11/20 10:55 AM, Richard Henderson wrote: > On 12/11/20 2:31 AM, Claudio Fontana wrote: >> --- a/cpu.c >> +++ b/cpu.c >> @@ -174,14 +174,18 @@ void cpu_exec_initfn(CPUState *cpu) >> void cpu_exec_realizefn(CPUState *cpu, Error **errp) >> { >> CPUClass *cc = CPU_GET_CLASS(cpu); >> +#ifde

[PATCH v3 0/4] Add a new -action parameter

2020-12-11 Thread Alejandro Jimenez
v3: - Replaced the no_reboot and no_shutdown internal flags with enumerations that hold the current action selected in case of reboot or shutdown events. The same approach is used for panic and watchdog events. - Ensured that -no-shutdown option overrides any previously issued action panic=power

Re: [PATCH v11 18/25] cpu: Move synchronize_from_tb() to tcg_ops

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > From: Eduardo Habkost > > Signed-off-by: Eduardo Habkost > [claudio: wrapped in CONFIG_TCG] > Signed-off-by: Claudio Fontana > Reviewed-by: Philippe Mathieu-Daudé > Reviewed-by: Alex Bennée > --- > include/hw/core/cpu.h | 8 > i

Re: [PATCH v11 15/25] cpu: Introduce TCGCpuOperations struct

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > --- a/cpu.c > +++ b/cpu.c > @@ -174,14 +174,18 @@ void cpu_exec_initfn(CPUState *cpu) > void cpu_exec_realizefn(CPUState *cpu, Error **errp) > { > CPUClass *cc = CPU_GET_CLASS(cpu); > +#ifdef CONFIG_TCG > static bool tcg_target_initialized;

Re: [PATCH v11 16/25] target/riscv: remove CONFIG_TCG, as it is always TCG

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > for now only TCG is allowed as an accelerator for riscv, > so remove the CONFIG_TCG use. > > Signed-off-by: Claudio Fontana > Reviewed-by: Alistair Francis > --- > target/riscv/cpu.c | 3 +-- > 1 file changed, 1 insertion(+), 2 deletions(-) Aren't

Re: [PATCH 00/12] Compile QEMU with -Wimplicit-fallthrough

2020-12-11 Thread no-reply
Patchew URL: https://patchew.org/QEMU/20201211152426.350966-1-th...@redhat.com/ Hi, This series seems to have some coding style problems. See output below for more information: Type: series Message-id: 20201211152426.350966-1-th...@redhat.com Subject: [PATCH 00/12] Compile QEMU with -Wimplicit

Re: [PULL 0/3] tcg patch queue

2020-12-11 Thread Peter Maydell
On Fri, 11 Dec 2020 at 01:10, Richard Henderson wrote: > > The following changes since commit 2ecfc0657afa5d29a373271b342f704a1a3c6737: > > Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2020-12-10' > into staging (2020-12-10 17:01:05 +) > > are available in the Git repository

Re: [PATCH v11 17/25] accel/tcg: split TCG-only code from cpu_exec_realizefn

2020-12-11 Thread Richard Henderson
On 12/11/20 2:31 AM, Claudio Fontana wrote: > move away TCG-only code, make it compile only on TCG. > > Signed-off-by: Claudio Fontana > Reviewed-by: Alex Bennée > --- > include/hw/core/cpu.h | 8 + > accel/tcg/cpu-exec.c | 28 + > cpu.c | 70 ++

[PULL 00/34] Block layer patches

2020-12-11 Thread Kevin Wolf
The following changes since commit b785d25e91718a660546a6550f64b3c543af7754: Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging (2020-12-11 13:50:35 +) are available in the Git repository at: git://repo.or.cz/qemu/kevin.git tags/for-upstream for you to

[PULL 02/34] block/curl: Use lock guard macros

2020-12-11 Thread Kevin Wolf
From: Gan Qixin Replace manual lock()/unlock() calls with lock guard macros (QEMU_LOCK_GUARD/WITH_QEMU_LOCK_GUARD) in block/curl. Signed-off-by: Gan Qixin Reviewed-by: Paolo Bonzini Message-Id: <20201203075055.127773-3-ganqi...@huawei.com> Signed-off-by: Kevin Wolf --- block/curl.c | 28

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