On Mon, 24 Feb 2020 17:31:49 -0500
Eduardo Habkost wrote:
> On Mon, Feb 24, 2020 at 11:58:09AM -0600, Babu Moger wrote:
> >
> >
> > On 2/24/20 11:19 AM, Igor Mammedov wrote:
> > > On Thu, 13 Feb 2020 12:17:46 -0600
> > > Babu Moger wrote:
> > >
> > >> Check and Load the apicid handlers fr
On Tue, Feb 25, 2020 at 08:39:12AM +0100, Paolo Bonzini wrote:
> On 25/02/20 06:59, Gerd Hoffmann wrote:
> > Now that the rom bar is mapped read-only and the guest can't change
> > things under our feet we don't need the shadow rom any more.
>
> Can't it do so when migrating from an older version?
On 25/02/20 09:23, Gerd Hoffmann wrote:
> On Tue, Feb 25, 2020 at 08:39:12AM +0100, Paolo Bonzini wrote:
>> On 25/02/20 06:59, Gerd Hoffmann wrote:
>>> Now that the rom bar is mapped read-only and the guest can't change
>>> things under our feet we don't need the shadow rom any more.
>>
>> Can't it
On Mon, 17 Feb 2020 21:12:40 +0800
Dongjiu Geng wrote:
> RAS Virtualization feature is not supported now, so add a RAS machine
> option and disable it by default.
this doesn't match the patch.
I'd rephrase it as:
... feature is disabled by default ..
add an option so user co
On Mon, 17 Feb 2020 21:12:42 +0800
Dongjiu Geng wrote:
> This patch builds error_block_address and read_ack_register fields
> in hardware errors table , the error_block_address points to Generic
> Error Status Block(GESB) via bios_linker. The max size for one GESB
> is 1kb in bytes, For more deta
On Tue, 25 Feb 2020 at 08:34, Igor Mammedov wrote:
>
> On Mon, 17 Feb 2020 21:12:40 +0800
> Dongjiu Geng wrote:
>
> > RAS Virtualization feature is not supported now, so add a RAS machine
>
> > option and disable it by default.
>
>
> this doesn't match the patch.
Hmm? It seems
On Mon, Feb 24, 2020 at 12:51:54PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/24/20 11:34 AM, Stefan Hajnoczi wrote:
> > @@ -304,8 +310,10 @@ struct {
> > \
> > } while (/*CONSTCOND*/0)
> > #define QSIMPLEQ_REMOVE_HEAD(head, field
On Mon, Feb 24, 2020 at 12:54:37PM +0100, Philippe Mathieu-Daudé wrote:
> On 2/24/20 12:39 PM, Stefan Hajnoczi wrote:
> > On Mon, Feb 24, 2020 at 02:55:33AM -0800, no-re...@patchew.org wrote:
> > > === OUTPUT BEGIN ===
> > > 1/2 Checking commit f913b2430ad3 (qemu/queue.h: clear linked list
> > > p
On 2/25/20 6:59 AM, Gerd Hoffmann wrote:
Map qxl rom read-only into the guest, so the guest can't tamper with the
content. qxl has a shadow copy of the rom to deal with that, but the
shadow doesn't cover the mode list. A privilidged user in the guest can
manipulate the mode list and that to tri
23.02.2020 11:55, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
Script adds ERRP_AUTO_PROPAGATE macro invocation where appropriate and
does corresponding changes in code (look for details in
include/qapi/error.h)
Usage example:
spatch --sp-file scripts/coccinelle/auto-propagat
On Fri, Feb 21, 2020 at 03:16:29PM +, Peter Maydell wrote:
> On Thu, 20 Feb 2020 at 14:20, Kashyap Chamarthy wrote:
[...]
> > @@ -1056,6 +1055,8 @@ $(call define-manpage-rule,interop,\
> >
> > $(call define-manpage-rule,system,qemu-block-drivers.7)
> >
> > +$(call define-manpage-rule,system
> > 3) Muser.ko pins the pages (in get_dma_map(), called from below)
> > (https://urldefense.proofpoint.com/v2/url?u=https-
> 3A__github.com_nutanix_muser_blob_master_kmod_muser.c-
> 23L711&d=DwICAg&c=s883GpUCOChKOHiocYtGcg&r=XTpYsh5Ps2zJvtw6ogtt
> i46atk736SI4vgsJiUKIyDE&m=C8rTp4SZoy4YNcZWntiROp3o
On 2/18/20 3:20 PM, Philippe Mathieu-Daudé wrote:
Add more packages on the Mojave OSX job (Xcode 10),
and duplicate the job to build on Catalina (Xcode 11).
ping?
Each job takes ~34min:
https://travis-ci.org/philmd/qemu/builds/651473221
Philippe Mathieu-Daudé (3):
.travis.yml: Expand OSX
Hi,
On 2/17/20 7:13 PM, Auger Eric wrote:
> Hi Stefan,
>
> On 2/16/20 7:32 PM, Stefan Berger wrote:
>> On 2/14/20 1:37 PM, Eric Auger wrote:
>>> Introduce the tpm-tis-device which is a sysbus device
>>> and is bound to be used on ARM.
>>>
>>> Signed-off-by: Eric Auger
>>> ---
>>> hw/tpm/Kconfi
25.02.2020 10:56, dovgaluk wrote:
Vladimir Sementsov-Ogievskiy писал 2020-02-25 10:27:
25.02.2020 8:58, dovgaluk wrote:
Vladimir Sementsov-Ogievskiy писал 2020-02-21 16:23:
21.02.2020 15:35, dovgaluk wrote:
Vladimir Sementsov-Ogievskiy писал 2020-02-21 13:09:
21.02.2020 12:49, dovgaluk wrote
On 2/25/20 8:55 AM, Pan Nengyuan wrote:
Similar to other virtio-deivces, rq_vq forgot to delete in
virtio_pmem_unrealize, this patch fix it.
"devices"
This device has aleardy maintained a vq pointer, thus we use the new
virtio_delete_queue function directly to do the cleanup.
"already"
On 2/25/20 8:50 AM, Heyi Guo wrote:
Common VM users sometimes care about CPU speed, so we add two new
options to allow VM vendors to present CPU speed to their users.
Normally these information can be fetched from host smbios.
Strictly speaking, the "max speed" and "current speed" in type 4
are
Kevin, what do you think about it?
What guest is intended to receive, when it requests multiple reads to the same
buffer in a single DMA transaction?
Should it be the first SG part? The last one?
Or just a random set of bytes? (Then why it is reading this data in that case?)
Pavel Dovgalyuk
>
On 2/25/20 3:09 AM, kuhn.chen...@huawei.com wrote:
From: Chen Qun
Clang static code analyzer show warning:
hw/dma/xlnx-zdma.c:399:13: warning: Value stored to 'dst_type' is never read
dst_type = FIELD_EX32(s->dsc_dst.words[3], ZDMA_CH_DST_DSCR_WORD3,
^ ~~~
On 2/25/20 3:09 AM, kuhn.chen...@huawei.com wrote:
From: Chen Qun
The "again" assignment is meaningless before g_assert_not_reached.
In addition, the break statements no longer needs to be after
g_assert_not_reached.
Clang static code analyzer show warning:
hw/usb/hcd-ehci.c:2108:13: warning:
On 24.02.20 16:02, Halil Pasic wrote:
> We expose loadparm as a r/w machine property, but if loadparm is set by
> the guest via DIAG 308, we don't update the property. Having a
> disconnect between the guest view and the QEMU property is not nice in
> itself, but things get even worse for SCSI, whe
On 20.02.20 13:56, Janosch Frank wrote:
> Signed-off-by: Janosch Frank
> ---
> linux-headers/linux/kvm.h | 46 +++
> 1 file changed, 42 insertions(+), 4 deletions(-)
>
> diff --git a/linux-headers/linux/kvm.h b/linux-headers/linux/kvm.h
> index ec146bd52a..2e6
On 2/25/20 3:09 AM, kuhn.chen...@huawei.com wrote:
From: Chen Qun
Clang static code analyzer show warning:
monitor/hmp-cmds.c:2867:17: warning: Value stored to 'set' is never read
set = true;
^
Reported-by: Euler Robot
Signed-off-by: Chen Qun
---
Cc
On 2/25/20 2:50 AM, Yubo Miao wrote:
From: miaoyubo
Currently virt machine is not supported by pxb-pcie,
and only one main host bridge described in ACPI tables.
In this patch,PXB-PCIE is supproted by arm and certain
Typos: "expander" in subject and "supported" here.
resource is allocated fo
22.02.2020 11:23, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
21.02.2020 19:34, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
21.02.2020 10:38, Markus Armbruster wrote:
Vladimir Sementsov-Ogievskiy writes:
Add functions to clean Error **errp: call corr
On 2/25/20 1:02 AM, Alistair Francis wrote:
> On Mon, Feb 24, 2020 at 9:05 AM Damien Hedde
> wrote:
>>
>> This object may be used to represent a clock inside a clock tree.
>>
>> A clock may be connected to another clock so that it receives update,
>> through a callback, whenever the source/par
On 20.02.20 13:56, Janosch Frank wrote:
> Migration is not yet supported.
>
> Signed-off-by: Janosch Frank
> ---
> hw/s390x/s390-virtio-ccw.c | 17 ++---
> 1 file changed, 14 insertions(+), 3 deletions(-)
>
> diff --git a/hw/s390x/s390-virtio-ccw.c b/hw/s390x/s390-virtio-ccw.c
> ind
23.02.2020 11:55, Markus Armbruster wrote:
+|
+-warn_report_err(local_err);
++warn_report_errp(errp);
Likewise.
What about error_reportf_err(), warn_reportf_err()?
Hmm I'm afraid, we don't have corresponding cases to update..
We can still handle them here, but, then, should we use no
On Tue, 25 Feb 2020 at 10:19, Auger Eric wrote:
>
> Hi,
>
> On 2/17/20 7:13 PM, Auger Eric wrote:
> > Hi Stefan,
> >
> > On 2/16/20 7:32 PM, Stefan Berger wrote:
> >> On 2/14/20 1:37 PM, Eric Auger wrote:
> >>> Introduce the tpm-tis-device which is a sysbus device
> >>> and is bound to be used on
On 20.02.20 13:56, Janosch Frank wrote:
> From: Christian Borntraeger
>
Needs some love. What does the facility unlock/allow. Why can we enable
it now. What's in place, what's missing.
> Signed-off-by: Christian Borntraeger
> ---
> target/s390x/gen-features.c | 1 +
> target/s390x/kvm.c
On Fri, 21 Feb 2020 at 03:37, David Gibson wrote:
>
> From: Shivaprasad G Bhat
>
> Add support for NVDIMM devices for sPAPR. Piggyback on existing nvdimm
> device interface in QEMU to support virtual NVDIMM devices for Power.
> Create the required DT entries for the device (some entries have
> du
On 20.02.20 13:56, Janosch Frank wrote:
> Protected guests save the instruction control blocks in the SIDA
> instead of QEMU/KVM directly accessing the guest's memory.
>
> Let's introduce new functions to access the SIDA.
>
> Signed-off-by: Janosch Frank
> ---
> linux-headers/linux/kvm.h | 2 +
On 20.02.20 13:56, Janosch Frank wrote:
> Secure guests no longer intercept with code 4 for an instruction
> interception. Instead they have codes 104 and 108 for secure
> instruction interception and secure instruction notification
> respectively.
>
> The 104 mirrors the 4 interception.
>
> The
>-Original Message-
>From: Philippe Mathieu-Daudé [mailto:phi...@redhat.com]
>Sent: Tuesday, February 25, 2020 5:36 PM
>To: Chenqun (kuhn) ; qemu-
>de...@nongnu.org; qemu-triv...@nongnu.org
>Cc: peter.mayd...@linaro.org; Zhanghailiang
>; Alistair Francis ;
>qemu-...@nongnu.org
>Subject: R
On 2/24/20 10:20 PM, Alistair Francis wrote:
On Mon, Feb 24, 2020 at 12:51 PM Philippe Mathieu-Daudé
wrote:
This commit was produced with the Coccinelle script
scripts/coccinelle/memory-region-housekeeping.cocci.
Signed-off-by: Philippe Mathieu-Daudé
This looks good for the ROM regions, fo
On 2/25/20 2:27 AM, Alistair Francis wrote:
> /On Mon, Feb 24, 2020 at 9:12 AM Damien Hedde
> wrote
>>
>> Add functions to easily handle clocks with devices.
>> Clock inputs and outputs should be used to handle clock propagation
>> between devices.
>> The API is very similar the GPIO API.
>>
>
Hi Philippe,
On 2/14/20 8:03 PM, Philippe Mathieu-Daudé wrote:
> On 2/14/20 7:37 PM, Eric Auger wrote:
>> Let's separate the compilation of tpm_tis_common.c from
>> the compilation of tpm_tis_isa.c
>>
>> The common part will be also compiled along with the
>> tpm_tis_sysbus device.
>>
>> Signed-of
On Thu, 20 Feb 2020 at 16:11, Max Reitz wrote:
>
> If a protocol driver does not support image creation, we can see whether
> maybe the file exists already. If so, just truncating it will be
> sufficient.
>
> Signed-off-by: Max Reitz
> Message-Id: <20200122164532.178040-3-mre...@redhat.com>
> Si
On 2/24/20 9:55 PM, Philippe Mathieu-Daudé wrote:
The scripts/coccinelle/memory-region-housekeeping.cocci reported:
* TODO
[[view:hw/i386/pc_sysfw.c::face=ovl-face1::linb=67::colb=4::cole=26][potential
use of memory_region_init_rom*() in hw/i386/pc_sysfw.c::67]]
pc_isa_bios_init() does a manu
CC'ing Stefan due to the same question back in 2010:
https://lists.gnu.org/archive/html/qemu-devel/2010-09/msg01996.html
I also encountered this with Windows guest.
E.g., there were the requests like:
Read 2000 bytes:
addr=A, size=1000
addr=A, size=1000
I.e. reading 1000 bytes in real, but the
On 20.02.20 13:56, Janosch Frank wrote:
> For protected guests, we need to put the STSI emulation results into
> the SIDA, so SIE will write them into the guest at the next entry.
>
> Signed-off-by: Janosch Frank
> ---
> target/s390x/kvm.c | 15 ---
> 1 file changed, 12 insertions(+)
On 2/25/20 10:05 AM, Stefan Hajnoczi wrote:
On Mon, Feb 24, 2020 at 12:54:37PM +0100, Philippe Mathieu-Daudé wrote:
On 2/24/20 12:39 PM, Stefan Hajnoczi wrote:
On Mon, Feb 24, 2020 at 02:55:33AM -0800, no-re...@patchew.org wrote:
=== OUTPUT BEGIN ===
1/2 Checking commit f913b2430ad3 (qemu/queu
On 2/25/20 11:01 AM, Chenqun (kuhn) wrote:
-Original Message-
From: Philippe Mathieu-Daudé [mailto:phi...@redhat.com]
Sent: Tuesday, February 25, 2020 5:36 PM
To: Chenqun (kuhn) ; qemu-
de...@nongnu.org; qemu-triv...@nongnu.org
Cc: peter.mayd...@linaro.org; Zhanghailiang
; Alistair Franci
>-Original Message-
>From: Philippe Mathieu-Daudé [mailto:phi...@redhat.com]
>Sent: Tuesday, February 25, 2020 5:45 PM
>To: Chenqun (kuhn) ; qemu-
>de...@nongnu.org; qemu-triv...@nongnu.org
>Cc: peter.mayd...@linaro.org; Zhanghailiang
>; Dr. David Alan Gilbert
>
>Subject: Re: [PATCH 13/13]
Hi Phil,
On 2/14/20 7:55 PM, Philippe Mathieu-Daudé wrote:
> On 2/14/20 7:36 PM, Eric Auger wrote:
>> As we plan to introduce a sysbus TPM_TIS, let's rename
>> TPM_TIS into TPM_TIS_ISA.
>>
>> Signed-off-by: Eric Auger
>> ---
>> hw/i386/acpi-build.c | 6 +++---
>> hw/tpm/tpm_tis.c | 4 ++--
Hi Phil,
On 2/17/20 7:01 PM, Auger Eric wrote:
> Hi Philippe,
>
> On 2/17/20 10:21 AM, Philippe Mathieu-Daudé wrote:
>> Hi Eric,
>>
>> On 2/14/20 7:37 PM, Eric Auger wrote:
>>> As we plan to introdce a SysBus TPM TIS device, let's
>>> make the TPMState a common struct usable by both the
>>> ISADe
On 2/25/20 10:52 AM, Ard Biesheuvel wrote:
On Tue, 25 Feb 2020 at 10:19, Auger Eric wrote:
Hi,
On 2/17/20 7:13 PM, Auger Eric wrote:
Hi Stefan,
On 2/16/20 7:32 PM, Stefan Berger wrote:
On 2/14/20 1:37 PM, Eric Auger wrote:
Introduce the tpm-tis-device which is a sysbus device
and is bound
On 25.02.20 11:05, Peter Maydell wrote:
> On Thu, 20 Feb 2020 at 16:11, Max Reitz wrote:
>>
>> If a protocol driver does not support image creation, we can see whether
>> maybe the file exists already. If so, just truncating it will be
>> sufficient.
>>
>> Signed-off-by: Max Reitz
>> Message-Id:
On Tue, 25 Feb 2020 at 05:41, Jason Wang wrote:
>
>
> On 2020/2/25 上午10:59, Chen Qun wrote:
> > The current code causes clang static code analyzer generate warning:
> > hw/net/imx_fec.c:858:9: warning: Value stored to 'value' is never read
> > value = value & 0x000f;
> > ^
On 2/25/20 11:16 AM, Auger Eric wrote:
Hi Phil,
On 2/14/20 7:55 PM, Philippe Mathieu-Daudé wrote:
On 2/14/20 7:36 PM, Eric Auger wrote:
As we plan to introduce a sysbus TPM_TIS, let's rename
TPM_TIS into TPM_TIS_ISA.
Signed-off-by: Eric Auger
---
hw/i386/acpi-build.c | 6 +++---
hw/tpm/
On 2/13/20 1:24 PM, Christian Borntraeger wrote:
...
diff --git a/pc-bios/s390-ccw/jump2ipl.c b/pc-bios/s390-ccw/jump2ipl.c
index da13c43cc0..8839226803 100644
--- a/pc-bios/s390-ccw/jump2ipl.c
+++ b/pc-bios/s390-ccw/jump2ipl.c
@@ -18,6 +18,7 @@
typedef struct ResetInfo {
uint64_t ipl_p
>-Original Message-
>From: Philippe Mathieu-Daudé [mailto:phi...@redhat.com]
>Sent: Tuesday, February 25, 2020 6:12 PM
>To: Chenqun (kuhn) ; qemu-
>de...@nongnu.org; qemu-triv...@nongnu.org
>Cc: peter.mayd...@linaro.org; Zhanghailiang
>; Alistair Francis ;
>qemu-...@nongnu.org
>Subject: R
Samba changed the default of server min protocol from LANMAN1 (very old
protocol) to SMB2_02 (only Vista and newer) in commit 840b8501b436
(docs-xml: change "server min protocol" to SMB2_02).
WXP guests cannot use the samba shares since then as it uses a protocol
newer than LANMAN1, but older than
Hi Phil,
On 2/25/20 11:22 AM, Philippe Mathieu-Daudé wrote:
> On 2/25/20 11:16 AM, Auger Eric wrote:
>> Hi Phil,
>>
>> On 2/14/20 7:55 PM, Philippe Mathieu-Daudé wrote:
>>> On 2/14/20 7:36 PM, Eric Auger wrote:
As we plan to introduce a sysbus TPM_TIS, let's rename
TPM_TIS into TPM_TIS_I
On Tue, 25 Feb 2020 10:37:10 +1100
David Gibson wrote:
> On ppc we have the concept of virtual hypervisor ("vhyp") mode, where we
> only model the non-hypervisor-privileged parts of the cpu. Essentially we
> model the hypervisor's behaviour from the point of view of a guest OS, but
> we don't mo
On Tue, 25 Feb 2020 10:37:11 +1100
David Gibson wrote:
> When running guests under a hypervisor, the hypervisor obviously needs to
> be protected from guest accesses even if those are in what the guest
> considers real mode (translation off). The POWER hardware provides two
> ways of doing that:
Le 2/24/20 à 9:55 PM, Philippe Mathieu-Daudé a écrit :
This commit was produced with the Coccinelle script
scripts/coccinelle/memory-region-housekeeping.cocci.
Signed-off-by: Philippe Mathieu-Daudé
Looks good to me.
Reviewed-by: KONRAD Frederic
Thanks,
Fred
---
hw/sparc/leon3.c | 3
Vector strided operations access the first memory element at the base address,
and then access subsequent elements at address increments given by the byte
offset contained in the x register specified by rs2.
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h | 35 +
targe
The unit-stride fault-only-fault load instructions are used to
vectorize loops with data-dependent exit conditions(while loops).
These instructions execute as a regular load except that they
will only take a trap on element 0.
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h
Features:
* support specification riscv-v-spec-0.7.1.
* support basic vector extension.
* support Zvlsseg.
* support Zvamo.
* not support Zvediv as it is changing.
* fixed SLEN 128bit.
* element width support 8bit, 16bit, 32bit, 64bit.
Changelog:
v4
* remove check structure, use ch
Vector indexed operations add the contents of each element of the
vector offset operand specified by vs2 to the base effective address
to give the effective address of each element.
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h | 35
target/riscv/insn32.decode
Vector AMOs operate as if aq and rl bits were zero on each element
with regard to ordering relative to other instructions in the same hart.
Vector AMOs provide no ordering guarantee between element operations
in the same vector AMO instruction
Signed-off-by: LIU Zhiwei
---
target/riscv/helper.h
Vector unit-stride operations access elements stored contiguously in memory
starting from the base effective address.
The Zvlsseg expands some vector load/store segment instructions, which move
multiple contiguous fields in memory to and from consecutively numbered
vector register
Signed-off-by:
On Tue, Feb 25, 2020 at 11:27:58AM +0100, Jiri Slaby wrote:
> Samba changed the default of server min protocol from LANMAN1 (very old
> protocol) to SMB2_02 (only Vista and newer) in commit 840b8501b436
> (docs-xml: change "server min protocol" to SMB2_02).
>
> WXP guests cannot use the samba shar
On Tue, 25 Feb 2020 08:54:07 +
Peter Maydell wrote:
> On Tue, 25 Feb 2020 at 08:34, Igor Mammedov wrote:
> >
> > On Mon, 17 Feb 2020 21:12:40 +0800
> > Dongjiu Geng wrote:
> >
> > > RAS Virtualization feature is not supported now, so add a RAS machine
> >
> > > option and disable it b
Some of the documentation for QEMU "tools" which are standalone
binaries like qemu-img is an awkward fit in our current 5-manual
split. We've put it into "interop", but they're not really
about interoperability.
Create a new top level manual "tools" which will be a better
home for this documentati
The qemu-option-trace.rst.inc file contains a rST documentation
fragment which describes trace options common to qemu-nbd and
qemu-img. We put this file into interop/, but we'd like to move the
qemu-nbd and qemu-img files into the tools/ manual. We could move
the .rst.inc file along with them, bu
Move the following tools documentation files to the new tools manual:
docs/interop/qemu-img.rst
docs/interop/qemu-nbd.rst
docs/interop/virtfs-proxy-helper.rst
docs/interop/qemu-trace-stap.rst
docs/interop/virtiofsd.rst
Signed-off-by: Peter Maydell
Reviewed-by: Richard Henderson
Acked-by: P
erge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2020-02-24 11:38:54 +)
are available in the Git repository at:
https://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-docs-20200225
for you to fetch changes up to a08b4a9fe6cb3c23755db764c
On Mon, 24 Feb 2020 at 22:22, Gavin Shan wrote:
>
> This uses TYPE_PL011 when creating the serial port so that the code
> looks cleaner.
>
> Signed-off-by: Gavin Shan
> Reviewed-by: Philippe Mathieu-Daudé
> Reviewed-by: Alistair Francis
> ---
> v2: Improved changelog suggested by Phil
Applie
On 2/25/20 12:37 AM, David Gibson wrote:
Move the calculation of the Real Mode Area (RMA) size into a helper
function. While we're there clean it up and correct it in a few ways:
* Add comments making it clearer where the various constraints come from
* Remove a pointless check that the RM
On 2/25/20 10:42 AM, David Hildenbrand wrote:
> On 20.02.20 13:56, Janosch Frank wrote:
>> Signed-off-by: Janosch Frank
>> ---
>> linux-headers/linux/kvm.h | 46 +++
>> 1 file changed, 42 insertions(+), 4 deletions(-)
>>
>> diff --git a/linux-headers/linux/kvm.
On Sun, 23 Feb 2020 at 23:10, Philippe Mathieu-Daudé wrote:
>
> From: Philippe Mathieu-Daudé
>
> As the Connex and Verdex machines only boot in little-endian,
> we can simplify the code.
>
> Signed-off-by: Philippe Mathieu-Daudé
> ---
> static void gumstix_machine_init(void)
> {
> +if (ta
On 25. 02. 20, 11:43, Daniel P. Berrangé wrote:
> On Tue, Feb 25, 2020 at 11:27:58AM +0100, Jiri Slaby wrote:
>> Samba changed the default of server min protocol from LANMAN1 (very old
>> protocol) to SMB2_02 (only Vista and newer) in commit 840b8501b436
>> (docs-xml: change "server min protocol" t
On 25.02.20 11:23, Jason J. Herne wrote:
> On 2/13/20 1:24 PM, Christian Borntraeger wrote:
> ...
diff --git a/pc-bios/s390-ccw/jump2ipl.c b/pc-bios/s390-ccw/jump2ipl.c
index da13c43cc0..8839226803 100644
--- a/pc-bios/s390-ccw/jump2ipl.c
+++ b/pc-bios/s390-ccw/jump2ipl.c
On 2/25/20 12:12 PM, Peter Maydell wrote:
On Sun, 23 Feb 2020 at 23:10, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
As the Connex and Verdex machines only boot in little-endian,
we can simplify the code.
Signed-off-by: Philippe Mathieu-Daudé
---
static void gumstix_mach
On Sun, 23 Feb 2020 at 23:10, Philippe Mathieu-Daudé wrote:
>
> From: Philippe Mathieu-Daudé
>
> IEC binary prefixes ease code review: the unit is explicit.
>
> Add a comment describing the Connex uses a Numonyx RC28F128J3F75
> flash, and the Verdex uses a Micron RC28F256P30TFA.
>
> Correct the V
On Tue, Feb 25, 2020 at 10:47:47AM +0100, Philippe Mathieu-Daudé wrote:
> On 2/25/20 2:50 AM, Yubo Miao wrote:
> > From: miaoyubo
> >
> > Currently virt machine is not supported by pxb-pcie,
> > and only one main host bridge described in ACPI tables.
> > In this patch,PXB-PCIE is supproted by arm
On 2/25/20 12:16 PM, Peter Maydell wrote:
On Sun, 23 Feb 2020 at 23:10, Philippe Mathieu-Daudé wrote:
From: Philippe Mathieu-Daudé
IEC binary prefixes ease code review: the unit is explicit.
Add a comment describing the Connex uses a Numonyx RC28F128J3F75
flash, and the Verdex uses a Micron
On 2/25/20 10:50 AM, David Hildenbrand wrote:
> On 20.02.20 13:56, Janosch Frank wrote:
>> Migration is not yet supported.
>>
>> Signed-off-by: Janosch Frank
>> ---
>> hw/s390x/s390-virtio-ccw.c | 17 ++---
>> 1 file changed, 14 insertions(+), 3 deletions(-)
>>
>> diff --git a/hw/s390
On Tue, Feb 25, 2020 at 09:50:26AM +0800, Yubo Miao wrote:
> From: miaoyubo
>
> Currently, pxb-pcie could be defined by the cmdline like
> --device pxb-pcie,id=pci.9,bus_nr=128
> However pxb-pcie is not described in acpi tables for arm.
>
> The formal two patches support pxb-pcie for arm, es
On 2/25/20 10:59 AM, David Hildenbrand wrote:
> On 20.02.20 13:56, Janosch Frank wrote:
>> Protected guests save the instruction control blocks in the SIDA
>> instead of QEMU/KVM directly accessing the guest's memory.
>>
>> Let's introduce new functions to access the SIDA.
>>
>> Signed-off-by: Jano
On Tue, 25 Feb 2020 10:37:12 +1100
David Gibson wrote:
> For the "pseries" machine, we use "virtual hypervisor" mode where we
> only model the CPU in non-hypervisor privileged mode. This means that
> we need guest physical addresses within the modelled cpu to be treated
> as absolute physical ad
On Tue, 25 Feb 2020 10:37:13 +1100
David Gibson wrote:
> Currently we create the Real Mode Offset Register (RMOR) on all Book3S cpus
> from POWER7 onwards. However the translation mode which the RMOR controls
> is no longer supported in POWER9, and so the register has been removed from
> the arc
On 2/25/20 11:01 AM, David Hildenbrand wrote:
> On 20.02.20 13:56, Janosch Frank wrote:
>> Secure guests no longer intercept with code 4 for an instruction
>> interception. Instead they have codes 104 and 108 for secure
>> instruction interception and secure instruction notification
>> respectively
On Tue, 18 Feb 2020 at 19:10, Richard Henderson
wrote:
>
> These bits trap EL1 access to various virtual memory controls.
>
> Buglink: https://bugs.launchpad.net/bugs/1855072
> Signed-off-by: Richard Henderson
> ---
> v2: Include TTBCR.
> ---
> target/arm/helper.c | 77 ++
On Tue, 18 Feb 2020 at 19:10, Richard Henderson
wrote:
>
> These bits trap EL1 access to set/way cache maintenance insns.
>
> Buglink: https://bugs.launchpad.net/bugs/1863685
> Signed-off-by: Richard Henderson
> ---
> target/arm/helper.c | 22 --
> 1 file changed, 16 insertio
Am 25.02.2020 um 11:07 hat Pavel Dovgalyuk geschrieben:
> CC'ing Stefan due to the same question back in 2010:
>
> https://lists.gnu.org/archive/html/qemu-devel/2010-09/msg01996.html
>
> I also encountered this with Windows guest.
> E.g., there were the requests like:
>
> Read 2000 bytes:
> addr
On Tue, 18 Feb 2020 at 19:10, Richard Henderson
wrote:
>
> This bit traps EL1 access to the auxiliary control registers.
>
> Signed-off-by: Richard Henderson
Reviewed-by: Peter Maydell
thanks
-- PMM
Le 25/02/2020 à 00:21, Alistair Francis a écrit :
> Signed-off-by: Alistair Francis
> ---
> linux-user/riscv/syscall32_nr.h | 314
> linux-user/riscv/syscall64_nr.h | 303 ++
> linux-user/riscv/syscall_nr.h | 294 +
From: Igor Mammedov
Allow machine to opt in for hostmem backend based initial RAM
even if user uses old -mem-path/prealloc options by providing
MachineClass::default_ram_id
Follow up patches will incrementally convert machines to new API,
by dropping memory_region_allocate_system_memory() and s
From: Igor Mammedov
memory_region_allocate_system_memory() API is going away, so
replace it with memdev allocated MemoryRegion. The later is
initialized by generic code, so board only needs to opt in
to memdev scheme by providing
MachineClass::default_ram_id
and using MachineState::ram instead
From: Igor Mammedov
It will be possible for main RAM to come from memory-backend
and we should check that size specified in -m matches the size
of the backend and [MachineState::]ram_size also matches
backend's size.
However -m parsing (set_memory_options()) happens before backends
are intialize
From: Igor Mammedov
Extend set_memory_options() to check that size specified by -m
matches the size of backend pointed by memory-backend.
And in case of -m was omitted adjust ram_size to match that
of explicitly provided backend.
Signed-off-by: Igor Mammedov
Message-Id: <20200219160953.13771-8-
The following changes since commit c1e667d2598b9b3ce62b8e89ed22dd38dfe9f57f:
Merge remote-tracking branch 'remotes/stefanha/tags/block-pull-request' into
staging (2020-02-24 11:38:54 +)
are available in the git repository at:
git://github.com/bonzini/qemu.git tags/for-upstream
for you
From: Igor Mammedov
memory_region_allocate_system_memory() API is going away, so
replace it with memdev allocated MemoryRegion. The later is
initialized by generic code, so board only needs to opt in
to memdev scheme by providing
MachineClass::default_ram_id
and using MachineState::ram instead
From: Igor Mammedov
memory_region_allocate_system_memory() API is going away, so
replace it with memdev allocated MemoryRegion. The later is
initialized by generic code, so board only needs to opt in
to memdev scheme by providing
MachineClass::default_ram_id
and using MachineState::ram instead
From: Igor Mammedov
memory_region_allocate_system_memory() API is going away, so
replace it with memdev allocated MemoryRegion. The later is
initialized by generic code, so board only needs to opt in
to memdev scheme by providing
MachineClass::default_ram_id
and using MachineState::ram instead
From: Igor Mammedov
the new field will be used by boards to get access to main
RAM memory region and will help to save boiler plate in
boards which often introduce a field or variable just for
this purpose.
Memory region will be equivalent to what currently used
memory_region_allocate_system_mem
From: Igor Mammedov
Property will contain link to memory backend that will be
used for backing initial RAM.
Follow up commit will alias -mem-path and -mem-prealloc
CLI options into memory backend options to make memory
handling consistent (using only hostmem backend family
for guest RAM allocatio
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