Signed-off-by: David Gibson
---
target/ppc/translate/vmx-impl.inc.c | 26 +++---
1 file changed, 15 insertions(+), 11 deletions(-)
diff --git a/target/ppc/translate/vmx-impl.inc.c
b/target/ppc/translate/vmx-impl.inc.c
index eb10c533ca..bd3ff40e68 100644
--- a/target/ppc/tran
Signed-off-by: David Gibson
---
target/ppc/machine.c | 106 +--
1 file changed, 63 insertions(+), 43 deletions(-)
diff --git a/target/ppc/machine.c b/target/ppc/machine.c
index a92d0ad3a3..25cdb9088b 100644
--- a/target/ppc/machine.c
+++ b/target/ppc/machi
Signed-off-by: David Gibson
---
target/ppc/mmu_helper.c | 131
1 file changed, 80 insertions(+), 51 deletions(-)
diff --git a/target/ppc/mmu_helper.c b/target/ppc/mmu_helper.c
index 4a6be4d63b..a01a12a4af 100644
--- a/target/ppc/mmu_helper.c
+++ b/target/
Signed-off-by: David Gibson
---
target/ppc/cpu.h | 239 ++-
1 file changed, 130 insertions(+), 109 deletions(-)
diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index fc12b4688e..5d25b17539 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -23,23
Signed-off-by: David Gibson
---
target/ppc/kvm.c | 178 +++
target/ppc/kvm_ppc.h | 3 +-
2 files changed, 115 insertions(+), 66 deletions(-)
diff --git a/target/ppc/kvm.c b/target/ppc/kvm.c
index 2427c8ee13..a1c223385d 100644
--- a/target/ppc/kvm.c
+
Signed-off-by: David Gibson
---
target/ppc/cpu-models.c | 2 +-
target/ppc/cpu-models.h | 3 ++-
2 files changed, 3 insertions(+), 2 deletions(-)
diff --git a/target/ppc/cpu-models.c b/target/ppc/cpu-models.c
index 7c75963e3c..9d7050b5fa 100644
--- a/target/ppc/cpu-models.c
+++ b/target/ppc/cpu-
Signed-off-by: David Gibson
---
target/ppc/translate/fp-impl.inc.c | 52 ++
1 file changed, 32 insertions(+), 20 deletions(-)
diff --git a/target/ppc/translate/fp-impl.inc.c
b/target/ppc/translate/fp-impl.inc.c
index 0f21a4e477..9dcff947c0 100644
--- a/target/ppc/tra
Signed-off-by: David Gibson
---
target/ppc/helper_regs.h | 10 ++
1 file changed, 6 insertions(+), 4 deletions(-)
diff --git a/target/ppc/helper_regs.h b/target/ppc/helper_regs.h
index a2205e1044..8397819dee 100644
--- a/target/ppc/helper_regs.h
+++ b/target/ppc/helper_regs.h
@@ -44,10 +
From: Alexey Kardashevskiy
NVIDIA V100 GPUs have on-board RAM which is mapped into the host memory
space and accessible as normal RAM via an NVLink bus. The VFIO-PCI driver
implements special regions for such GPUs and emulates an NVLink bridge.
NVLink2-enabled POWER9 CPUs also provide address tra
From: Philippe Mathieu-Daudé
In commit 47973a2dbf we split the last generic chipset out of
the PC board, but missed to remove the i8042 keyboard controller.
This omission was later fixed in commit 7cb00357c1, but here we
forgot to remove the "i8042.h" include. Do it now.
Signed-off-by: Philippe
Signed-off-by: David Gibson
---
target/ppc/translate/spe-impl.inc.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/target/ppc/translate/spe-impl.inc.c
b/target/ppc/translate/spe-impl.inc.c
index 8c1c16c63e..7ab0a29b5f 100644
--- a/target/ppc/translate/spe-impl
Signed-off-by: David Gibson
---
target/ppc/fpu_helper.c | 134 +---
1 file changed, 83 insertions(+), 51 deletions(-)
diff --git a/target/ppc/fpu_helper.c b/target/ppc/fpu_helper.c
index 2ed4f42275..0b7308f539 100644
--- a/target/ppc/fpu_helper.c
+++ b/target/
Signed-off-by: David Gibson
---
target/ppc/translate_init.inc.c | 240 +++-
1 file changed, 146 insertions(+), 94 deletions(-)
diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c
index 0bd555eb19..78e4cd3e87 100644
--- a/target/ppc/translate
target/ppc has a lot of old code that doesn't stick to the modern
style guidelines. That means we keep getting checkpatch warnings from
code motions in there, or from people copying the local style rather
than the global style.
I'm sick of it, so here's a big series to fix many of the style
probl
Signed-off-by: David Gibson
---
target/ppc/monitor.c | 13 +++--
1 file changed, 7 insertions(+), 6 deletions(-)
diff --git a/target/ppc/monitor.c b/target/ppc/monitor.c
index 04deec8030..451ca722b3 100644
--- a/target/ppc/monitor.c
+++ b/target/ppc/monitor.c
@@ -27,32 +27,33 @@
#includ
Signed-off-by: David Gibson
---
target/ppc/dfp_helper.c | 14 +++---
1 file changed, 7 insertions(+), 7 deletions(-)
diff --git a/target/ppc/dfp_helper.c b/target/ppc/dfp_helper.c
index 9164fe701b..ddab65c7ba 100644
--- a/target/ppc/dfp_helper.c
+++ b/target/ppc/dfp_helper.c
@@ -1104,19
Signed-off-by: David Gibson
---
target/ppc/translate/vsx-impl.inc.c | 15 ---
1 file changed, 8 insertions(+), 7 deletions(-)
diff --git a/target/ppc/translate/vsx-impl.inc.c
b/target/ppc/translate/vsx-impl.inc.c
index 508e9199c8..0cb09891a6 100644
--- a/target/ppc/translate/vsx-imp
On Thu, Mar 21, 2019 at 03:49:00PM +0100, Cédric Le Goater wrote:
> These changes provide the interface with the KVM device implementing
> the XIVE native exploitation interrupt mode. Also used to retrieve the
> state of the KVM device for the monitor usage and for migration.
>
> Available from :
Signed-off-by: David Gibson
---
target/ppc/translate.c | 507 +
1 file changed, 315 insertions(+), 192 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 98b37cebc2..67aa128ef1 100644
--- a/target/ppc/translate.c
+++ b/target/p
Signed-off-by: David Gibson
---
target/ppc/mfrom_table.inc.c | 3 +--
target/ppc/mfrom_table_gen.c | 8 +---
2 files changed, 6 insertions(+), 5 deletions(-)
diff --git a/target/ppc/mfrom_table.inc.c b/target/ppc/mfrom_table.inc.c
index 6a1fa375c9..1653b974a4 100644
--- a/target/ppc/mfrom_ta
Signed-off-by: David Gibson
---
target/ppc/mmu-hash64.c | 62 +
1 file changed, 38 insertions(+), 24 deletions(-)
diff --git a/target/ppc/mmu-hash64.c b/target/ppc/mmu-hash64.c
index a2b1ec5040..90f4b306b2 100644
--- a/target/ppc/mmu-hash64.c
+++ b/target/
On Thu, Mar 21, 2019 at 03:49:02PM +0100, Cédric Le Goater wrote:
> XIVE hcalls are all redirected to QEMU as none are on a fast path.
> When necessary, QEMU invokes KVM through specific ioctls to perform
> host operations. QEMU should have done the necessary checks before
> calling KVM and, in cas
Signed-off-by: David Gibson
---
target/ppc/mmu-hash32.c | 19 ---
1 file changed, 12 insertions(+), 7 deletions(-)
diff --git a/target/ppc/mmu-hash32.c b/target/ppc/mmu-hash32.c
index e8562a7c87..f83944b78c 100644
--- a/target/ppc/mmu-hash32.c
+++ b/target/ppc/mmu-hash32.c
@@ -27
Patchew URL: https://patchew.org/QEMU/20190322002749.26561-1-pal...@sifive.com/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190322002749.26561-1-pal...@sifive.com
Subject: [Qemu-devel] [PATCH] sifive_prci: Read and write PRCI r
Signed-off-by: David Gibson
---
target/ppc/mem_helper.c | 33 +++--
1 file changed, 19 insertions(+), 14 deletions(-)
diff --git a/target/ppc/mem_helper.c b/target/ppc/mem_helper.c
index 9c5a68579e..5b0f9ee50d 100644
--- a/target/ppc/mem_helper.c
+++ b/target/ppc/mem_
On Thu, Mar 21, 2019 at 03:49:01PM +0100, Cédric Le Goater wrote:
> This introduces a set of helpers when KVM is in use, which create the
> KVM XIVE device, initialize the interrupt sources at a KVM level and
> connect the interrupt presenters to the vCPU.
>
> They also handle the initialization o
Signed-off-by: David Gibson
---
target/ppc/misc_helper.c | 9 +
1 file changed, 5 insertions(+), 4 deletions(-)
diff --git a/target/ppc/misc_helper.c b/target/ppc/misc_helper.c
index c65d1ade15..0a81e98ee9 100644
--- a/target/ppc/misc_helper.c
+++ b/target/ppc/misc_helper.c
@@ -210,10 +2
Patchew URL:
https://patchew.org/QEMU/20190322001544.9794-1-da...@gibson.dropbear.id.au/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Message-id: 20190322001544.9794-1-da...@gibson.dropbear.id.au
Subject: [Qemu-devel] [RFC for-4.1 00/25] Man
If the fd is invalid or interrupted by signal.
-邮件原件-
发件人: Paolo Bonzini [mailto:pbonz...@redhat.com]
发送时间: 2019年3月21日 18:38
收件人: lizhengui; stefa...@redhat.com; mre...@redhat.com; kw...@redhat.com
抄送: qemu-bl...@nongnu.org; qemu-devel@nongnu.org; Fangyi (C); wangjie (P)
主题: Re: [PATCH] q
On 3/1/19 4:39 AM, Cornelia Huck wrote:
A vfio-ccw device may provide an async command subregion for
issuing halt/clear subchannel requests. If it is present, use
it for sending halt/clear request to the device; if not, fall
back to emulation (as done today).
Signed-off-by: Cornelia Huck
---
On 3/1/19 4:39 AM, Cornelia Huck wrote:
[I'm not quite happy with how this async processing hooks up in css.c;
ideas welcome.]
I guess I'm not unhappy with it, but it does look a little odd. Not
sure I have a better idea right now... Will ponder that for a while.
- Eric
[top-posting is harder to read on technical lists; I'm reordering your
message before replying inline]
> On 20/03/19 15:07, Zhengui li wrote:
>> The function fcntl maybe return -1, which is not a unsigned type.
>> Unsigned type or Negative values should not do bitwise operator with
>> O_ACCMODE.
On Thu, Mar 21, 2019 at 03:49:03PM +0100, Cédric Le Goater wrote:
> This extends the KVM XIVE device backend with 'synchronize_state'
> methods used to retrieve the state from KVM. The HW state of the
> sources, the KVM device and the thread interrupt contexts are
> collected for the monitor usage
On Thu, Mar 21, 2019 at 03:49:11PM +0100, Cédric Le Goater wrote:
> spapr_ics_create() is only called once. Merge it in spapr_irq_init_xics()
> and simplify a bit the error handling by using 'error_fatal' .
>
> Signed-off-by: Cédric Le Goater
Seems like a good cleanup, regardless of the rest. A
On Thu, Mar 21, 2019 at 03:49:07PM +0100, Cédric Le Goater wrote:
> Removing RTAS handlers will become necessary when the new pseries
> machine supporting multiple interrupt mode is introduced.
>
> Signed-off-by: Cédric Le Goater
This makes sense independent of the rest, so I've applied it to pp
On Thu, Mar 21, 2019 at 03:49:14PM +0100, Cédric Le Goater wrote:
> The interrupt mode is chosen by the CAS negotiation process and
> activated after a reset to take into account the required changes in
> the machine. This brings new constraints on how the associated KVM IRQ
> device is initialized
On Thu, Mar 21, 2019 at 03:49:13PM +0100, Cédric Le Goater wrote:
> Add a check to make sure that the routine initializing the emulated
> IRQ device is called once. We don't have much to test on the XICS
> side, so we introduce a 'static bool'. Not very elegant but works well
> enough.
What's the
On Fri, Mar 22, 2019 at 11:15:19AM +1100, David Gibson wrote:
> target/ppc has a lot of old code that doesn't stick to the modern
> style guidelines. That means we keep getting checkpatch warnings from
> code motions in there, or from people copying the local style rather
> than the global style.
On Thu, Mar 21, 2019 at 03:49:12PM +0100, Cédric Le Goater wrote:
> The way the XICS and the XIVE devices are initialized follows the same
> pattern. First, try to connect to the KVM device and if not possible
> fallback on the emulated device, unless a kernel_irqchip is required.
> The spapr_irq_i
The fcntl call fails in the actual scene and it is really hard to happen. But
according to a good coding style, I think there should be a error handling for
a system call.
+ if (((unsigned int) flags & O_ACCMODE) == O_RDONLY) {
The flags is a int type. According to strict programming specifica
On Wed, Mar 20, 2019 at 01:28:47PM -0400, Jason Andryuk wrote:
> On Fri, Mar 15, 2019 at 12:28 PM Andrew Cooper
> wrote:
> >
> > On 15/03/2019 09:17, Paul Durrant wrote:
> > >> -Original Message-
> > >> From: Jason Andryuk [mailto:jandr...@gmail.com]
> > >> Sent: 14 March 2019 18:16
> > >>
> On Thu, Mar 07, 2019 at 02:51:20PM +, Daniel P. Berrangé wrote:
>
>> On Mar 7, 2019, at 11:27 AM, Stefan Hajnoczi wrote:
>>>
>>> On Thu, Mar 07, 2019 at 02:51:20PM +, Daniel P. Berrangé wrote:
I guess one obvious answer is that the existing security mechanisms like
SELin
break_dependency incorrectly handles the case of dependency on an opcode
that references the same register multiple times. E.g. the following
instruction is translated incorrectly:
{ or a2, a3, a3 ; or a3, a2, a2 }
This happens because resource indices of both dependency graph nodes are
increme
On 15/03/2019 20.06, Aleksandar Markovic wrote:
>> From: Thomas Huth
>> Subject: Re: Maintainers, please tell us how to boot your machines!
>>
>>> On Tue, Mar 12, 2019 at 6:44 PM Markus Armbruster
>>> wrote:
>> [...]
I gathered the machine types, mapped them to source files, which I
fed
On 20/03/2019 22.08, Aleksandar Markovic wrote:
> Folks,
>
> If qemu tree is already fully built, and "make" is attempted, for 3.1, the
> outcome is:
>
> $ make
> CHK version_gen.h
> $
>
> For 4.0-rc0, the outcome seems to be different:
>
> $ make
> make[1]: Entering directory '/home/bui
On Tue, 2019-03-19 at 17:05 -0300, Eduardo Habkost wrote:
> Currently, the Cascadelake-Server, Icelake-Client, and
> Icelake-Server are always generating the following warning:
>
> qemu-system-x86_64: warning: \
> host doesn't support requested feature: CPUID.07H:ECX [bit 4]
>
> This happen
This patch adds support in QEMU to handle "ibm,nmi-register"
and "ibm,nmi-interlock" RTAS calls.
The machine check notification address is saved when the
OS issues "ibm,nmi-register" RTAS call.
This patch also handles the case when multiple processors
experience machine check at or about the same
On Thu, Mar 21, 2019 at 11:31:30PM +0800, Catherine Ho wrote:
> Thanks, Peter
> See my comments below, please
>
> On Thu, 21 Mar 2019 at 14:10, Peter Xu wrote:
> >
> > On Wed, Mar 20, 2019 at 04:05:58PM +0800, chenxi He wrote:
> > > On Wed, 20 Mar 2019 at 13:07, Peter Xu wrote:
> > > >
> > > > O
Introduce a wrapper function to wait on condition for
the main loop mutex. This function atomically releases
the main loop mutex and causes the calling thread to
block on the condition.
Signed-off-by: Aravinda Prasad
---
cpus.c |5 +
include/qemu/main-loop.h |8
Block VM migration requests until the machine check
error handling is complete as (i) these errors are
specific to the source hardware and is irrelevant on
the target hardware, (ii) these errors cause data
corruption and should be handled before migration.
Signed-off-by: Aravinda Prasad
---
hw/p
Enable the KVM capability KVM_CAP_PPC_FWNMI so that
the KVM causes guest exit with NMI as exit reason
when it encounters a machine check exception on the
address belonging to a guest. Without this capability
enabled, KVM redirects machine check exceptions to
guest's 0x200 vector.
Signed-off-by: Ar
Memory error such as bit flips that cannot be corrected
by hardware are passed on to the kernel for handling.
If the memory address in error belongs to guest then
the guest kernel is responsible for taking suitable action.
Patch [1] enhances KVM to exit guest with exit reason
set to KVM_EXIT_NMI in
This patch set adds support for FWNMI in PowerKVM guests.
System errors such as SLB multihit and memory errors
that cannot be corrected by hardware is passed on to
the kernel for handling by raising machine check
exception (an NMI). Upon such machine check exceptions,
if the address in error belon
This patch builds the rtas error log, copies it to the
rtas_addr and then invokes the guest registered machine
check handler.
Signed-off-by: Aravinda Prasad
---
hw/ppc/spapr.c |4 +
hw/ppc/spapr_events.c | 247
include/hw/ppc/spapr.h
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