On 12/7/18 4:46 AM, David Gibson wrote:
> On Thu, Dec 06, 2018 at 12:22:25AM +0100, Cédric Le Goater wrote:
>> The IVPE scans the O/S CAM line of the XIVE thread interrupt contexts
>> to find a matching Notification Virtual Target (NVT) among the NVTs
>> dispatched on the HW processor threads.
>>
>
06.12.2018 22:25, John Snow wrote:
> Presently, we abort transactions in the same order they were processed in.
> Bitmap commands, though, attempt to restore backup data structures on abort.
> To that end, though, they need to be aborted in reverse chronological order.
>
> Replace the QSIMPLEQ dat
On 12/7/18 4:10 AM, David Gibson wrote:
> On Thu, Dec 06, 2018 at 12:22:22AM +0100, Cédric Le Goater wrote:
>> The last sub-engine of the XIVE architecture is the Interrupt
>> Virtualization Presentation Engine (IVPE). On HW, the IVRE and the
>> IVPE share elements, the Power Bus interface (CQ), th
On Thu, 6 Dec 2018 at 21:57, Jason Wang wrote:
>
>
> On 2018/12/6 下午2:35, elohi...@gmail.com wrote:
> > From: Xie Yongji
> >
> > This patchset is aimed at supporting qemu to reconnect
> > vhost-user-blk backend after vhost-user-blk backend crash or
> > restart.
> >
> > The patch 1 tries to implen
These helpers allow us to move AVR register values to/from the specified
TCGv_i64
argument.
To prevent VMX helpers accessing the cpu_avr{l,h} arrays directly, add extra TCG
temporaries as required.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/translate.c | 10 +++
target/ppc/tr
Signed-off-by: Mark Cave-Ayland
---
target/ppc/helper.h | 8
target/ppc/int_helper.c | 7 ---
target/ppc/translate/vmx-impl.inc.c | 16
3 files changed, 8 insertions(+), 23 deletions(-)
diff --git a/target/ppc/helper.h b/target/ppc/help
This patchset is an attempt at trying to improve the VMX (Altivec) instruction
performance by making use of the new TCG vector operations where possible.
In order to use TCG vector operations, the registers must be accessible from
cpu_env
whilst currently they are accessed via arrays of static TC
These helpers allow us to move VSR register values to/from the specified
TCGv_i64
argument.
To prevent VSX helpers accessing the cpu_vsr array directly, add extra TCG
temporaries as required.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/translate/vsx-impl.inc.c | 782
Instead of accessing the FPR, VMX and VSX registers through static arrays of
TCGv_i64 globals, remove them and change the helpers to load/store data directly
within cpu_env.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/translate.c | 59 ++
1 file
These helpers allow us to move FP register values to/from the specified TCGv_i64
argument.
To prevent FP helpers accessing the cpu_fpr array directly, add extra TCG
temporaries as required.
Signed-off-by: Mark Cave-Ayland
---
target/ppc/translate.c | 10 +
target/ppc/translate/fp-i
Add a couple of helper functions to cope with GDB threads and processes.
The gdb_get_process() function looks for a process given a pid.
The gdb_get_cpu() function returns the CPU corresponding to the (pid,
tid) pair given as parameters.
The read_thread_id() function parses the thread-id sent by
Change the thread info related packets handling to support multiprocess
extension.
Add the CPUs class name in the extra info to help differentiate
them in multiprocess mode.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar E. Iglesias
---
gdbstub.c | 37 +++
Change the sC packet handling to support the multiprocess extension.
Instead of returning the first thread, we return the first thread of the
current process.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
---
gdbstub
Create two separate CPU clusters for APUs and RPUs.
Signed-off-by: Luc Michel
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Alistair Francis
---
include/hw/arm/xlnx-zynqmp.h | 3 +++
hw/arm/xlnx-zynqmp.c | 23 +++
2 files changed,
Signed-off-by: Mark Cave-Ayland
---
target/ppc/translate.c | 1 +
target/ppc/translate/vmx-impl.inc.c | 64 ++---
2 files changed, 40 insertions(+), 25 deletions(-)
diff --git a/target/ppc/translate.c b/target/ppc/translate.c
index 5923c688cd..92d023
changes since v7:
- patch 1Add documentation about cpu-cluster [Eduardo, Peter]
- patch 1Remove the cluster-id auto-assign mechanism [Eduardo]
- patch 2Replace create_unique_process() with
create_default_process() that is now called even if some
clu
Add the gdb_first_attached_cpu() and gdb_next_attached_cpu() to iterate
over all the CPUs in currently attached processes.
Add the gdb_first_cpu_in_process() and gdb_next_cpu_in_process() to
iterate over CPUs of a given process.
Use them to add multiprocess extension support to vCont packets.
Si
'D' packets are used by GDB to detach from a process. In multiprocess
mode, the PID to detach from is sent in the request.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
---
gdbstub.c | 60 +++
Let's state the rationale for requiring a typedef in the commit
message, or point to a prior commit that has it.
Paolo Bonzini writes:
> Signed-off-by: Paolo Bonzini
> ---
> scripts/checkpatch.pl | 5 +
> 1 file changed, 5 insertions(+)
>
> diff --git a/scripts/checkpatch.pl b/scripts/chec
Add support for the vAttach packets. In multiprocess mode, GDB sends
them to attach to additional processes.
Signed-off-by: Luc Michel
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
Reviewed-by: Philippe Mathieu-Daudé
---
gdbstub.c | 35 +++
1 file c
Add support for multiprocess extension in gdb_vm_state_change()
function.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
---
gdbstub.c | 15 ---
1 file changed, 12 insertions(+), 3 deletions(-)
diff --git a/
For the Aarch64, there is one machine 'virt', it is primarily meant to
run on KVM and execute virtualization workloads, but we need an
environment as faithful as possible to physical hardware, to support
firmware and OS development for pysical Aarch64 machines.
This machine comes with:
- Re-desi
Add multiprocess extension support by enabling multiprocess mode when
the peer requests it, and by replying that we actually support it in the
qSupported reply packet.
Signed-off-by: Luc Michel
Reviewed-by: Philippe Mathieu-Daudé
Acked-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
---
g
On 12/7/18 3:07 AM, David Gibson wrote:
> On Thu, Dec 06, 2018 at 07:17:47AM +0100, Cédric Le Goater wrote:
>> On 12/6/18 4:25 AM, David Gibson wrote:
>>> On Thu, Dec 06, 2018 at 12:22:17AM +0100, Cédric Le Goater wrote:
The XiveNotifier offers a simple interface, between the XiveSource
o
The gdb_get_cpu_pid() function does the PID lookup for the given CPU. It
checks if the CPU is a direct child of a CPU cluster. If it is, the
returned PID is the cluster ID plus one (cluster IDs start at 0, GDB
PIDs at 1). When the CPU is not a child of such a container, the PID of
the default proce
Add a structure GDBProcess that represents processes from the GDB
semantic point of view.
CPUs can be split into different processes, by grouping them under
different cpu-cluster objects. Each occurrence of a cpu-cluster object
implies the existence of the corresponding process in the GDB stub. T
Change the Xfer:features:read: packet handling to support the
multiprocess extension. This packet is used to request the XML
description of the CPU. In multiprocess mode, different descriptions can
be sent for different processes.
This function now takes the process to send the description for as
Following the previous patch, this patch adds peripheral devices to the
newly introduced SBSA-ref machine.
Signed-off-by: Hongbo Zhang
---
hw/arm/sbsa-ref.c | 421 ++
1 file changed, 421 insertions(+)
diff --git a/hw/arm/sbsa-ref.c b/hw/arm/sb
On 2018-12-03 16:32, Paolo Bonzini wrote:
> From: Emanuele Giuseppe Esposito
>
> This function is intended to group all the qvirtio_* functions that
> start the qvirtio devices.
> Applied in all tests using this combination of functions.
>
> Signed-off-by: Emanuele Giuseppe Esposito
> Signed-of
When a new connection is established, we set the first process to be
attached, and the others detached. The first CPU of the first process
is selected as the current CPU.
Signed-off-by: Luc Michel
Reviewed-by: Alistair Francis
Reviewed-by: Edgar E. Iglesias
Reviewed-by: Philippe Mathieu-Daudé
On 2018-12-03 16:32, Paolo Bonzini wrote:
> From: Emanuele Giuseppe Esposito
>
> Rename qpci_init_pc in qpci_pc_new and qpci_init_spapr in qpci_spapr_new,
> since theese function actually allocate a new pci struct and initialize it.
Matter of taste, I guess ... I'd also be fine if we keep "init"
On 2018-12-03 16:32, Paolo Bonzini wrote:
> This test was merged into drive_del-test in 2014.
>
> Signed-off-by: Paolo Bonzini
> ---
> tests/Makefile.include | 1 -
> 1 file changed, 1 deletion(-)
>
> diff --git a/tests/Makefile.include b/tests/Makefile.include
> index 3e3b16b..2718548 100644
>
This commit adds the cpu-cluster type. It aims at gathering CPUs from
the same cluster in a machine.
For now it only has a `cluster-id` property.
Documentation in cluster.h written with the help of Peter Maydell.
Signed-off-by: Luc Michel
Reviewed-by: Alistair Francis
Reviewed-by: Philippe Mat
Sorry for the redundant "[PATCH v4]" in the title line, it was due to
copy-paste from last iteration, that should be only "[PATCH v5 0/2]".
On Fri, 7 Dec 2018 at 17:08, Hongbo Zhang wrote:
>
> For the Aarch64, there is one machine 'virt', it is primarily meant to
> run on KVM and execute virtuali
Paolo Bonzini writes:
> QTAILQ is a doubly linked list, with a pointer-to-pointer to the last
> element from the head, and the previous element from each node.
>
> But if you squint enough, QTAILQ becomes a combination of a singly-linked
> forwards list, and another singly-linked list which goes
When gdb_set_stop_cpu() is called with a CPU associated to a process
currently not attached by the GDB client, return without modifying the
stop CPU. Otherwise, GDB gets confused if it receives packets with a
thread-id it does not know about.
Signed-off-by: Luc Michel
Acked-by: Alistair Francis
Add support for the '!' extended mode packet. This is required for the
multiprocess extension.
Signed-off-by: Luc Michel
Reviewed-by: Edgar E. Iglesias
Acked-by: Alistair Francis
---
gdbstub.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/gdbstub.c b/gdbstub.c
index 48c2571ebe..1cf1be
For the Aarch64, there is one machine 'virt', it is primarily meant to
run on KVM and execute virtualization workloads, but we need an
environment as faithful as possible to physical hardware, for supporting
firmware and OS development for pysical Aarch64 machines.
This patch introduces new machin
On Thu, 6 Dec 2018 12:50:50 -0500
Farhan Ali wrote:
> On 12/06/2018 11:21 AM, Cornelia Huck wrote:
> > On Thu, 6 Dec 2018 10:26:12 -0500
> > Farhan Ali wrote:
> >
> >> On 12/06/2018 09:39 AM, Cornelia Huck wrote:
> >>> On Wed, 5 Dec 2018 13:34:11 -0500
> >>> Farhan Ali wrote:
> >>>
>
On Thu, Dec 06, 2018 at 09:01:46PM +0100, Paolo Bonzini wrote:
> On 04/12/18 11:56, Thomas Huth wrote:
> > I think it would be best if we find a way to automate this process, e.g.
> > when a new release is tagged, a script generates the docs and puts them
> > somewhere on the web server, into the r
On Thu, Dec 06, 2018 at 05:36:29PM +, Vladimir Sementsov-Ogievskiy wrote:
> 06.12.2018 13:36, Daniel P. Berrangé wrote:
> > On Wed, Dec 05, 2018 at 05:46:57PM +0300, Vladimir Sementsov-Ogievskiy
> > wrote:
> >> qcrypto_block_encrypt_helper and qcrypto_block_decrypt_helper are
> >> almost ident
On Thu, Dec 06, 2018 at 05:42:54PM +, Vladimir Sementsov-Ogievskiy wrote:
> 06.12.2018 13:54, Daniel P. Berrangé wrote:
> > On Wed, Dec 05, 2018 at 05:47:00PM +0300, Vladimir Sementsov-Ogievskiy
> > wrote:
> >> The two thing that should be handled are cipher and ivgen. For ivgen
> >> the solut
On Wed, Dec 05, 2018 at 03:43:07PM -0500, Ed Maste wrote:
> I'd very much like to have CI coverage for QEMU on FreeBSD, and as of
> yesterday there's a hosted CI service that supports FreeBSD: Cirrus
> CI. They also offer free service for OSS projects. I created a
> .cirrus.yml (shown below) in a Q
Eric Blake writes:
> POSIX states that the value of endptr is unspecified if strtol()
> fails with EINVAL due to an invalid base argument. Since none of
> the callers to check_strtox_error() initialized endptr, we could
> end up propagating uninitialized data back to a caller on error.
> However
In the 'Format specific information' section of the 'qemu-img info'
command output, the supplemental information about existing QCOW2
bitmaps will be shown, such as a bitmap name, flags and granularity:
image: /vz/vmprivate/VM1/harddisk.hdd
file format: qcow2
virtual size: 64G (68719476736 bytes)
On Thu, Dec 06, 2018 at 06:47:54AM -0800, Maran Wilson wrote:
> On 12/6/2018 2:38 AM, Stefan Hajnoczi wrote:
> > On Wed, Dec 05, 2018 at 10:04:36AM -0800, Maran Wilson wrote:
> > > On 12/5/2018 5:20 AM, Stefan Hajnoczi wrote:
> > > > On Tue, Dec 04, 2018 at 02:44:33PM -0800, Maran Wilson wrote:
> >
01.12.2018 1:03, Eric Blake wrote:
> We want to be able to detect whether a given qemu NBD server is
> exposing the right export(s) and dirty bitmaps, at least for
> regression testing. We could use 'nbd-client -l' from the upstream
> NBD project to list exports, but it's annoying to rely on
> out
On Thu, 6 Dec 2018 19:47:14 +0100
Halil Pasic wrote:
> On Wed, 5 Dec 2018 13:54:02 +0100
> Cornelia Huck wrote:
>
> > On Tue, 4 Dec 2018 16:02:36 +0100
> > Halil Pasic wrote:
> >
> > > On Tue, 4 Dec 2018 14:11:30 +0100
> > > Cornelia Huck wrote:
> > >
> > > > On Tue, 4 Dec 2018 13:38:10
01.12.2018 1:03, Eric Blake wrote:
> +/* Clean up result of nbd_receive_export_list */
> +void nbd_free_export_list(NBDExportInfo *info, int count)
> +{
> +int i, j;
personally, I'd prefer explicit
if (!info) {
return;
}
here, it's more obvious, and info is unchanging, strange to check
Hi Remy,
On 11/16/18 8:02 PM, remy.n...@blade-group.com wrote:
> From: Remy Noel
>
> It is possible for an io_poll callback to be concurrently executed along
> with an aio_set_fd_handlers. This can cause all sorts of problems, like
> a NULL callback or a bad opaque pointer.
> We fixes that by usi
On 12/6/18 4:18 PM, Eric Blake wrote:
> POSIX states that the value of endptr is unspecified if strtol()
> fails with EINVAL due to an invalid base argument. Since none of
> the callers to check_strtox_error() initialized endptr, we could
> end up propagating uninitialized data back to a caller on
On 12/7/18 12:23 AM, Paolo Bonzini wrote:
> Use the QTAILQ_IN_USE macro instead, it does the same thing but the next
> patch will change it to a different definition.
>
> Signed-off-by: Paolo Bonzini
Reviewed-by: Philippe Mathieu-Daudé
> ---
> blockdev.c | 2 +-
> 1 file changed, 1 insertion(
On 12/7/18 12:23 AM, Paolo Bonzini wrote:
> This will be needed when we change the QTAILQ head and elem structs
> to unions. However, it is also consistent with the usage elsewhere
> in QEMU for other list head structs (see for example FsMountList).
>
> Note that most QTAILQs only need their name
Am 07.12.2018 um 07:40 hat Markus Armbruster geschrieben:
> Kevin Wolf writes:
>
> > From: Fam Zheng
> >
> > The extracted vmdk_init_extent takes a BlockBackend object and
> > initializes the format metadata. It is the common part between "qemu-img
> > create" and "blockdev-create".
> >
> > Add
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 8
1 file changed, 8 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7ba4c996cf..d034a5edf3 100644
--- a/target/arm/translate-a64.c
+++ b/target/arm/translate-a64.c
@@ -4884,6 +488
This has survivied a small user-only smoke test.
I need to build a kernel with the right patches in order to both
test this in system mode as well as verify the hashes that I am
producing vs ARM Fast Model.
However,
$ aarch64-linux-gcc-8.0.1 -msign-return-address=all z.c
$ ./aarch64-linux-user/q
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 93 +-
1 file changed, 81 insertions(+), 12 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 7c1cc1ce8e..0df344f9e8 100644
--- a/target/arm/translate-a64.c
Post v8.4 bits taken from SysReg_v85_xml-00bet8.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 40 +---
1 file changed, 29 insertions(+), 11 deletions(-)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index 0766e32a1b..80d65866c6 100644
--- a/targ
There are 5 bits of state that could be added, but to save
space within tbflags, add only a single enable bit.
Helpers will determine the rest of the state at runtime.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 4
target/arm/translate.h | 2 ++
target/arm/helper
The cryptographic internals are stubbed out for now,
but the enable and trap bits are checked.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.h | 12 +++
target/arm/internals.h | 6 ++
target/arm/helper-a64.c | 169
3 files changed, 187 in
This function is only used by AArch64. Code movement only.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.h | 2 +
target/arm/helper.h | 1 -
target/arm/helper-a64.c | 155
target/arm/op_helper.c | 155 ---
Add storage space for the 5 encryption keys. Migrate them when
the extension is enabled.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h | 23 +++
target/arm/machine.c | 23 +++
2 files changed, 46 insertions(+)
diff --git a/target/arm/cpu.h b/
This will enable PAuth decode in a subsequent patch.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 34 +++---
1 file changed, 23 insertions(+), 11 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c84c2dbb66..
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 100 +++--
1 file changed, 95 insertions(+), 5 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 5fa2647771..d4df2b48b1 100644
--- a/target/arm/translate-a64.c
Now properly signals unallocated for REV64 with SF=0.
Allows for the opcode2 field to be decoded shortly.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 31 ++-
1 file changed, 22 insertions(+), 9 deletions(-)
diff --git a/target/arm/translate-a64.
Not that there are any stores involved, but why argue with ARM's
naming convention.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 62 ++
1 file changed, 62 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
The arm_regime_tbi{0,1} functions are replacable with the new function
by giving the lowest and highest address.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 35 -
target/arm/helper.c | 55 +
2 files changed, 1
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 146 +
1 file changed, 146 insertions(+)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index c5ec430b42..7ba4c996cf 100644
--- a/target/arm/translate-a64.c
+++ b/target/ar
This is not really functional yet, because the crypto is not yet
implemented. This, however follows the AddPAC pseudo function.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 40 +++-
1 file changed, 39 insertions(+), 1 deletion(-)
diff --git
This is not really functional yet, because the crypto is not yet
implemented. This, however follows the Auth pseudo function.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 21 -
1 file changed, 20 insertions(+), 1 deletion(-)
diff --git a/target/arm/helper-
This is the main crypto routine, an implementation of QARMA.
This matches, as much as possible, ARM pseudocode.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 240 +++-
1 file changed, 239 insertions(+), 1 deletion(-)
diff --git a/target/arm/h
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.h| 2 +-
target/arm/helper-a64.c| 10 +-
target/arm/translate-a64.c | 7 ++-
3 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/target/arm/helper-a64.h b/target/arm/helper-a64.h
index cb7209eb31..b54ce59
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 66 +
1 file changed, 66 insertions(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index c73525f813..f466c174e6 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -5071,6
The pattern
ARMMMUIdx mmu_idx = core_to_arm_mmu_idx(env, cpu_mmu_index(env, false));
is computing the full ARMMMUIdx, stripping off the ARM bits,
and then putting them back.
Avoid the extra two steps with the appropriate helper function.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h
We can perform this with fewer operations.
Signed-off-by: Richard Henderson
---
target/arm/translate-a64.c | 65 ++
1 file changed, 23 insertions(+), 42 deletions(-)
diff --git a/target/arm/translate-a64.c b/target/arm/translate-a64.c
index 99e1405dff..15080c
FIXME: We should have an attribute that controls the EL1 enable bits.
We may not always want to turn on pointer authentication with -cpu max.
Signed-off-by: Richard Henderson
---
target/arm/cpu.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index
This function is, or will shortly become, too big to inline.
Signed-off-by: Richard Henderson
---
target/arm/cpu.h| 48 +
target/arm/helper.c | 44 +
2 files changed, 49 insertions(+), 43 deletions(-)
diff -
Am 07.12.2018 um 08:10 hat Markus Armbruster geschrieben:
> This is a reasonably careful review of the QAPI-related parts, but more
> of an eye-over for the remainder.
>
> Kevin Wolf writes:
>
> > From: Fam Zheng
> >
> > This makes VMDK support blockdev-create. The implementation reuses the
> >
We need to reuse this from helper-a64.c. Provide a stub
definition for CONFIG_USER_ONLY. This matches the stub
definitions that we removed for arm_regime_tbi{0,1} before.
Signed-off-by: Richard Henderson
---
target/arm/internals.h | 29 +
target/arm/helper.c| 16
Split out functions to extract the virtual address parameters.
Let the functions choose T0 or T1 address space half, if present.
Extract (most of) the control bits that vary between EL or Tx.
Signed-off-by: Richard Henderson
---
target/arm/helper.c | 274 -
Patchew URL:
https://patchew.org/QEMU/1544173675-14217-1-git-send-email-hongbo.zh...@linaro.org/
Hi,
This series failed the docker-mingw@fedora build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST S
Stripping out the authentication data does not require any crypto,
it merely requires the virtual address parameters.
Signed-off-by: Richard Henderson
---
target/arm/helper-a64.c | 16 ++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/target/arm/helper-a64.c b/targe
Signed-off-by: Richard Henderson
---
target/arm/cpu64.c | 4
1 file changed, 4 insertions(+)
diff --git a/target/arm/cpu64.c b/target/arm/cpu64.c
index 1d57be0c91..84f70b2a24 100644
--- a/target/arm/cpu64.c
+++ b/target/arm/cpu64.c
@@ -316,6 +316,10 @@ static void aarch64_max_initfn(Object
On Fri, 7 Dec 2018 at 04:43, Jason A. Donenfeld wrote:
>
> On Tue, Nov 20, 2018 at 11:08 AM Peter Maydell
> wrote:
> > It's still stuck, because unconditionally adding a second serial
> > port to the virt board breaks some commonly used existing guest
> > code (UEFI + Linux), and it's not clear
Patchew URL:
https://patchew.org/QEMU/1544173675-14217-1-git-send-email-hongbo.zh...@linaro.org/
Hi,
This series failed the docker-quick@centos7 build test. Please find the testing
commands and
their output below. If you have Docker installed, you can probably reproduce it
locally.
=== TEST
Le 30/11/2018 à 10:53, Li Qiang a écrit :
> Cc: qemu-triv...@nongnu.org
>
> Signed-off-by: Li Qiang
> ---
> util/vfio-helpers.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/util/vfio-helpers.c b/util/vfio-helpers.c
> index 9cd42e..342d4a2285 100644
> --- a/util/v
Le 06/12/2018 à 16:18, Eric Blake a écrit :
> POSIX states that the value of endptr is unspecified if strtol()
> fails with EINVAL due to an invalid base argument. Since none of
> the callers to check_strtox_error() initialized endptr, we could
> end up propagating uninitialized data back to a cal
01.12.2018 1:03, Eric Blake wrote:
> Commit 3d068aff forgot to advertise available qemu: contexts
> when the client requests a list with 0 queries. Furthermore,
> 3.0 shipped with a qemu-img hack of x-dirty-bitmap (commit
> 216ee365) that _silently_ acts as though the entire image is
> clean if a r
On Wed, Dec 5, 2018 at 8:26 PM Markus Armbruster wrote:
>
> Marc-André Lureau writes:
>
> > Introduce a new helper function to check if the given keys are known,
> > and if mandatory keys are present. The function will be reused in
> > other places in the following code changes.
> >
> > Signed-of
From: Fam Zheng
The extracted vmdk_init_extent takes a BlockBackend object and
initializes the format metadata. It is the common part between "qemu-img
create" and "blockdev-create".
Add a "BlockBackend *pbb" parameter to vmdk_create_extent, to return the
opened BB to the caller in the next patc
From: Fam Zheng
This makes VMDK support blockdev-create. The implementation reuses the
image creation code in vmdk_co_create_opts which now acceptes a callback
pointer to "retrieve" BlockBackend pointers from the caller. This way we
separate the logic between file/extent acquisition and initializ
I picked up the patch series from Fam and rebased it to current master
(which involved a major rework on the test case) and tried to address
Markus' review comments for v2. I did not do any further review of the
actual code, but it passes the tests, so I guess having it in tree is
better than conti
Clarify that the number of extents provided in BlockdevCreateOptionsVmdk
must match the number of extents that will actually be used. Providing
more extents will result in an error now.
This requires adapting the test case to provide the right number of
extents.
Signed-off-by: Kevin Wolf
---
qa
Signed-off-by: Fam Zheng
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/237 | 233 +
tests/qemu-iotests/237.out | 347 +
tests/qemu-iotests/group | 1 +
3 files changed, 581 insertions(+)
create mode 100755 tests/qemu-iotests
From: Fam Zheng
Signed-off-by: Fam Zheng
Signed-off-by: Kevin Wolf
---
tests/qemu-iotests/common.filter | 1 +
tests/qemu-iotests/iotests.py| 1 +
2 files changed, 2 insertions(+)
diff --git a/tests/qemu-iotests/common.filter b/tests/qemu-iotests/common.filter
index 2031e353a5..1aa7d57140
On Wed, Dec 05, 2018 at 05:57:04PM -0200, Eduardo Habkost wrote:
> Many of the current virtio-*-pci device types actually represent
> 3 different types of devices:
> * virtio 1.0 non-transitional devices
> * virtio 1.0 transitional devices
> * virtio 0.9 ("legacy device" in virtio 1.0 terminology)
On Thu, 6 Dec 2018 17:24:17 -0500
Collin Walling wrote:
> Diagnose 318 is a new z14.2 CPU feature. Since we are able to emulate
> it entirely via KVM, we can add guest support for earlier models. A
> new CPU feature for diagnose 318 (shortened to diag318) will be made
> available to guests start
On Thu, Dec 06, 2018 at 03:08:28PM +, Paul Durrant wrote:
> This patch adds the basic boilerplate for a 'XenBus' object that will act
> as a parent to 'XenDevice' PV backends.
> A new 'XenBridge' object is also added to connect XenBus to the system bus.
>
> The XenBus object is instantiated by
Am 05.12.2018 um 16:34 hat Eric Blake geschrieben:
> On 12/5/18 2:43 AM, Christian Borntraeger wrote:
> > "-machine pc" will not work all architectures. Lets fall back to the
> > default machine by not specifying it.
> >
> > In addition we also need to specify -no-shutdown on s390 as qemu will
> >
Am 06.12.2018 um 12:05 hat Christian Borntraeger geschrieben:
>
>
> On 05.12.2018 17:09, Vladimir Sementsov-Ogievskiy wrote:
> > 05.12.2018 18:52, Christian Borntraeger wrote:
> >>
> >>
> >> On 05.12.2018 14:39, Vladimir Sementsov-Ogievskiy wrote:
> >>> 05.12.2018 15:35, Christian Borntraeger wro
1 - 100 of 291 matches
Mail list logo
