On 09/30/2016 10:06 PM, Markus Armbruster wrote:
Alex Williamson writes:
Once there's a need to handle a certain condition as an error, we should
do that, no argument. This also provides a way to test the error path.
However, I wouldn't buy an argument that preconditions should be made
On 06/10/2016 05:03, David Gibson wrote:
> The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
> for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
> and PAPR guests) to have numerous independent PHBs, each controlling a
> separate PCI domain.
>
> There
On 06/10/2016 02:10, Joey Connelly wrote:
> Hey QEMU dev group,
> I'm a graduate student at Boise State University working on my thesis
> involving Virtualization/Cloud Computing Security and I wanted to ask a few
> questions:
>
> *[QUESTION#1.]* From within a guest KVM/QEMU process (qemu-system
On 06/10/2016 05:44, Joey Connelly wrote:
> Hey QEMU dev group,
>
> I'm a graduate student at Boise State University working on my thesis
> involving Virtualization/Cloud Computing Security and I wanted to ask
> another IN-DEPTH question I've been trying to solve. If you have some time
> it woul
On 06/10/2016 05:03, David Gibson wrote:
> Currently the default PCI host bridge for the 'pseries' machine type is
> constructed with its IO windows in the 1TiB..(1TiB + 64GiB) range in
> guest memory space. This means that if > 1TiB of guest RAM is specified,
> the RAM will collide with the PCI
On 06/10/2016 05:45, David Gibson wrote:
> qtest is about testing hardware, not the guest cpu, and whether you're
> accessing MMIO space or buffers the hardware will read via DMA, it's
> the hardware which determines the correct endianness, not the guest
> cpu.
Well, sort of... qtest writes are
Am 05.10.2016 um 20:49 hat John Snow geschrieben:
> On 10/05/2016 09:43 AM, Kevin Wolf wrote:
> >Am 01.10.2016 um 00:00 hat John Snow geschrieben:
> >>@@ -3136,10 +3111,10 @@ void qmp_block_commit(bool has_job_id, const char
> >>*job_id, const char *device,
> >> goto out;
> >>
On Thu, Oct 06, 2016 at 09:10:41AM +0200, Laurent Vivier wrote:
>
>
> On 06/10/2016 05:03, David Gibson wrote:
> > The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
> > for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
> > and PAPR guests) to have num
On Wed, Oct 05, 2016 at 04:31:27PM +0100, Stefan Hajnoczi wrote:
> Hmm...the SystemTap simpletrace script does not work anymore for me. But I've
> tested qemu.git/master and get the same results.
>
> Did you test it successfully somehow?
Yes, I had tested this, but lemme go back and test again -
Alistair Francis writes:
> This patch does three things:
> - It adds a list of restrictions and ToDos
> - It corrects the header --- lines to match the length of the header
> - It clarifies the force-raw option
>
> Signed-off-by: Alistair Francis
Thanks, Alistair!
Reviewed-by: Markus Armbru
Paolo Bonzini writes:
> On 06/10/2016 02:10, Joey Connelly wrote:
>> Hey QEMU dev group,
>> I'm a graduate student at Boise State University working on my thesis
>> involving Virtualization/Cloud Computing Security and I wanted to ask a few
>> questions:
>>
>> *[QUESTION#1.]* From within a guest
* Emilio G. Cota (c...@braap.org) wrote:
> Patch 1 fixes a warning that gcc may unnecessarily emit.
>
> Patch 2 fixes a real bug that sometimes shows up as a segfault in test-qht.
> Daniel reported it yesterday on IRC; the trick to easily trigger it is to
> run on RHEL6 (or CentOS6).
> It is very
On Thu, Oct 06, 2016 at 09:23:11AM +0200, Paolo Bonzini wrote:
>
>
> On 06/10/2016 05:45, David Gibson wrote:
> > qtest is about testing hardware, not the guest cpu, and whether you're
> > accessing MMIO space or buffers the hardware will read via DMA, it's
> > the hardware which determines the c
On Thu, Oct 06, 2016 at 09:21:56AM +0200, Laurent Vivier wrote:
>
>
> On 06/10/2016 05:03, David Gibson wrote:
> > Currently the default PCI host bridge for the 'pseries' machine type is
> > constructed with its IO windows in the 1TiB..(1TiB + 64GiB) range in
> > guest memory space. This means t
On Wed, Oct 05, 2016 at 02:03:29PM +0200, Lluís Vilanova wrote:
> Add missing execution mode documentation for the 'guest_cpu_enter' and
> 'guest_cpu_reset' events.
>
> Signed-off-by: Lluís Vilanova
> ---
> trace-events |2 ++
> 1 file changed, 2 insertions(+)
Thanks, applied to my tracing
On Wed, Oct 05, 2016 at 04:31:27PM +0100, Stefan Hajnoczi wrote:
> Hmm...the SystemTap simpletrace script does not work anymore for me. But I've
> tested qemu.git/master and get the same results.
>
> Did you test it successfully somehow?
>
> $ cat x86_64-softmmu/qemu-system-x86_64.stp \
>
On 06/10/2016 05:03, David Gibson wrote:
> The 'spapr-pci-host-bridge' represents the virtual PCI host bridge (PHB)
> for a PAPR guest. Unlike on x86, it's routine on Power (both bare metal
> and PAPR guests) to have numerous independent PHBs, each controlling a
> separate PCI domain.
>
> There
On 06/10/2016 05:03, David Gibson wrote:
> Currently the default PCI host bridge for the 'pseries' machine type is
> constructed with its IO windows in the 1TiB..(1TiB + 64GiB) range in
> guest memory space. This means that if > 1TiB of guest RAM is specified,
> the RAM will collide with the PCI
> On 30 Sep 2016, at 15:08 PM, Markus Armbruster wrote:
>
> Cao jin writes:
>
>> On 09/29/2016 10:42 PM, Markus Armbruster wrote:
>>> Cao jin writes:
>>>
>>
static int vmxnet3_post_load(void *opaque, int version_id)
{
VMXNET3State *s = opaque;
-PCIDevice *d =
On 06/10/2016 10:37, David Gibson wrote:
> On Thu, Oct 06, 2016 at 09:23:11AM +0200, Paolo Bonzini wrote:
>>
>>
>> On 06/10/2016 05:45, David Gibson wrote:
>>> qtest is about testing hardware, not the guest cpu, and whether you're
>>> accessing MMIO space or buffers the hardware will read via DMA
Recently we moved a few options from QemuOptsLists in blockdev.c to
bdrv_runtime_opts in block.c in order to make them accissble using
blockdev-add. However, this has the side effect that these options are
missing from query-command-line-options now, and libvirt consequently
disables the correspond
On 05/10/2016 21:00, Dr. David Alan Gilbert wrote:
> * Paolo Bonzini (pbonz...@redhat.com) wrote:
>>
>>
>> On 05/10/2016 16:29, Dr. David Alan Gilbert wrote:
>>> The virtio-input conversion especially is nice and simple.
>>> The only weird case is virtio-gpu, and well virtio-gpu is the one that's
This is a partial update aiming at enhancing the VFIO user API
with IOMMU info capability chain, msi_geometry reporting and
MSI IOVA window registration.
The kernel code is not yet upstreamed. It is available at
https://github.com/eauger/linux/tree/generic-v7-passthrough-v13
([PATCH v13 00/15] KVM
This new helper makes possible to search for a MemoryRegion matching
a given name within a root MemoryRegion.
Signed-off-by: Eric Auger
---
include/exec/memory.h | 11 +++
memory.c | 16
2 files changed, 27 insertions(+)
diff --git a/include/exec/memory.h b
On ARM, MSI transactions emitted by passthrough'ed devices are translated
by the IOMMU. So the host must allocate IOVAs and map them to the host
MSI frame physical addresses. Those IOVAs must be allocated within safe
GPA slots, unused by the guest.
The QEMU VFIO device retrieves the size if the I
Introduce a new reserved_iova region type. This type of iova region
is bound to be used by the kernel to map some host physical addresses
(typically MSI frames).
A new initializer, memory_region_init_reserved_iova is introduced, as
well as a test function, memory_region_is_reserved_iova.
Signed-o
Writing to the MIPS DESAVE register (and now the KScratch registers)
will stop translation, supposedly due to risk of execution mode
switches. However these registers are basically RW scratch registers
with no side effects so there is no risk of them triggering execution
mode changes.
Drop the bst
Introduce vfio_get_iommu_type1_info helper that allows to handle
variable size vfio_iommu_type1_info allocation with capability
chain support.
Besides, fixes a checkpatch warning on vfio_host_win_add's call.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 33 +++--
On 4 October 2016 at 18:49, Dr. David Alan Gilbert (git)
wrote:
> From: "Dr. David Alan Gilbert"
>
> The following changes since commit bbc4c3f4f3c624e2de64fdcb79f4dd8c1a508e9d:
>
> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
> (2016-10-04 14:25:08 +0100)
>
> ar
vfio_register_msi_iova allows to register the MSI IOVA region.
This IOVA window will be used by the kernel to map MSI doorbells.
The function will become static in subsequent patches. However, since
there is no user yet, the compiler argues; the function is currently
not static and a dummy declara
The platform bus is currently used to map dynamically instantiable
platform device MMIO regions. The platform bus also can be seen as a
pool of free guest physical addresses. We would like to use that pool
to allocate a contiguous reserved IOVA region usable for MSI message
address IOMMU mapping.
In case of reserved iova region, let's declare this region to the
kernel so that it can use it for IOVA/HPA bindings.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 48 +---
1 file changed, 29 insertions(+), 19 deletions(-)
diff --git a/hw/vfio/comm
Introduce an helper function to retrieve the iommu type1 capability
chain info.
The first capability ready to be exploited is the msi geometry
capability. vfio_prepare_msi_mapping allocates a MemoryRegion
dedicated to host MSI IOVA mapping. Its size matches the host needs.
This region is mapped on
On 06.10.2016 11:40, Kevin Wolf wrote:
> Recently we moved a few options from QemuOptsLists in blockdev.c to
> bdrv_runtime_opts in block.c in order to make them accissble using
> blockdev-add. However, this has the side effect that these options are
> missing from query-command-line-options now, a
On 6 October 2016 at 06:02, David Gibson wrote:
> On Wed, Oct 05, 2016 at 01:13:18PM -0700, Peter Maydell wrote:
>> I think cpu_list_add() needs to be in init, because
>> this is where we set cpu->cpu_index, and (after patch 5)
>> target-arm assumes that cpu_index has been set by
>> init but befor
On 10/06/2016 11:40 AM, Paolo Bonzini wrote:
>
>
> On 06/10/2016 10:37, David Gibson wrote:
>> On Thu, Oct 06, 2016 at 09:23:11AM +0200, Paolo Bonzini wrote:
>>>
>>>
>>> On 06/10/2016 05:45, David Gibson wrote:
qtest is about testing hardware, not the guest cpu, and whether you're
acces
On 05/10/2016 23:40, Tomáš Golembiovský wrote:
> When --offset is set the apparent device size has to be adjusted
> accordingly. Otherwise client may request read/write beyond the file end
> which would fail.
>
> Signed-off-by: Tomáš Golembiovský
Queued, thanks.
Paolo
> ---
> qemu-nbd.c | 8
On 6 October 2016 at 04:45, David Gibson wrote:
> On Wed, Oct 05, 2016 at 07:20:52AM -0700, Peter Maydell wrote:
>> On 5 October 2016 at 07:00, Cédric Le Goater wrote:
>> > On 10/05/2016 03:53 PM, Peter Maydell wrote:
>> >> Which tswap? Last time I worked through the stack of
>> >> what happens I
Hi,
On 06/10/2016 11:50, Eric Auger wrote:
> Introduce an helper function to retrieve the iommu type1 capability
> chain info.
>
> The first capability ready to be exploited is the msi geometry
> capability. vfio_prepare_msi_mapping allocates a MemoryRegion
> dedicated to host MSI IOVA mapping. I
On 10/05/2016 05:52 PM, Paolo Bonzini wrote:
>
> On 05/10/2016 16:29, Dr. David Alan Gilbert wrote:
>> > The virtio-input conversion especially is nice and simple.
>> > The only weird case is virtio-gpu, and well virtio-gpu is the one that's
>> > odd here (compared to the rest of virtio).
> Thou
On 06/10/2016 00:34, Emilio G. Cota wrote:
> Patch 1 fixes a warning that gcc may unnecessarily emit.
>
> Patch 2 fixes a real bug that sometimes shows up as a segfault in test-qht.
> Daniel reported it yesterday on IRC; the trick to easily trigger it is to
> run on RHEL6 (or CentOS6).
> It is v
On Thu, Oct 06, 2016 at 11:40:36AM +0200, Kevin Wolf wrote:
Recently we moved a few options from QemuOptsLists in blockdev.c to
bdrv_runtime_opts in block.c in order to make them accissble using
blockdev-add. However, this has the side effect that these options are
missing from query-command-line
On 5 October 2016 at 14:44, Juan Quintela wrote:
> From: Juan Quintela
>
> The following changes since commit bbc4c3f4f3c624e2de64fdcb79f4dd8c1a508e9d:
>
> Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
> (2016-10-04 14:25:08 +0100)
>
> are available in the git rep
On 6 October 2016 at 04:38, David Gibson wrote:
> On Wed, Oct 05, 2016 at 05:31:07AM -0700, Peter Maydell wrote:
>> On 4 October 2016 at 16:43, David Gibson wrote:
>> > On Tue, Oct 04, 2016 at 01:36:09PM +0100, Peter Maydell wrote:
>> >> The difficulty with this patch is that it's hard to tell wh
Sure, Peter, I am going to take your hints and address all your concerns in the
v2 of this series, which is planned to be posted soon.
I appreciate your guidance,
Aleksandar
From: Peter Maydell [peter.mayd...@linaro.org]
Sent: Wednesday, October 05, 2016
On 05/10/2016 18:56, Dr. David Alan Gilbert wrote:
> * Jianjun Duan (du...@linux.vnet.ibm.com) wrote:
>> Currently we cannot directly transfer a QTAILQ instance because of the
>> limitation in the migration code. Here we introduce an approach to
>> transfer such structures. In our approach such a
On 05/10/2016 19:43, Dr. David Alan Gilbert wrote:
> > Speaking of the pocket calculator: my recommendation would be "nuke from
> > orbit". It adds surprising corner cases to the HMP language, and
> > provides next to no value.
>
> Huh, didn't realise that existed - I assume you mean get_expr a
On 10/05/2016 09:00 PM, Dr. David Alan Gilbert wrote:
> * Paolo Bonzini (pbonz...@redhat.com) wrote:
>>
>>
>> On 05/10/2016 16:29, Dr. David Alan Gilbert wrote:
>>> The virtio-input conversion especially is nice and simple.
>>> The only weird case is virtio-gpu, and well virtio-gpu is the one tha
On 6 October 2016 at 12:07, Paolo Bonzini wrote:
> My hunch is that it would be a drop in the sea if monitor.c were
> refactored properly.
Speaking of refactoring, is there scope for splitting things
up so that if the foo subsystem needs to implement a monitor
command it can just call a function
Am 06.10.2016 um 12:58 hat Martin Kletzander geschrieben:
> On Thu, Oct 06, 2016 at 11:40:36AM +0200, Kevin Wolf wrote:
> >Recently we moved a few options from QemuOptsLists in blockdev.c to
> >bdrv_runtime_opts in block.c in order to make them accissble using
> >blockdev-add. However, this has the
On 06/10/2016 13:10, Peter Maydell wrote:
> On 6 October 2016 at 12:07, Paolo Bonzini wrote:
>> My hunch is that it would be a drop in the sea if monitor.c were
>> refactored properly.
>
> Speaking of refactoring, is there scope for splitting things
> up so that if the foo subsystem needs to im
Hi
On Thu, Oct 6, 2016 at 3:14 PM Paolo Bonzini wrote:
>
>
> On 06/10/2016 13:10, Peter Maydell wrote:
> > On 6 October 2016 at 12:07, Paolo Bonzini wrote:
> >> My hunch is that it would be a drop in the sea if monitor.c were
> >> refactored properly.
> >
> > Speaking of refactoring, is there s
"Dr. David Alan Gilbert" writes:
> * Markus Armbruster (arm...@redhat.com) wrote:
>
> Thanks for this.
>
>> In the beginning, there was only monitor.c, and it provided what we
>> today call HMP, at just under 500 SLOC.
>>
>> Since then, most (but not all) HMP commands have moved elsewhere, eithe
Am 05.10.2016 um 20:01 hat Max Reitz geschrieben:
> On 05.10.2016 11:26, Kevin Wolf wrote:
> > Almost all block devices are qdevified by now. This allows us to go back
> > from the BlockBackend to the DeviceState. xen_disk is the last device
> > that is missing. We'll remember in the BlockBackend i
Expose the capacity of algorithms supported by
virtio crypto device to the frontend driver using
pci configuration space.
Signed-off-by: Gonglei
---
hw/virtio/virtio-crypto.c | 40 ++-
include/hw/virtio/virtio-crypto.h | 14 ++
2 files chan
The new cryptodev backend named cryptodev-builtin,
which realized by QEMU cipher APIS. These APIs can
be backed by either nettle or gcrypt.
Signed-off-by: Gonglei
---
backends/Makefile.objs | 1 +
backends/cryptodev-builtin.c | 345 +++
qemu-option
the scenario of virtio crypto device is mostly NFV, which require
the existing Guest can't need to do any changes to support virtio
crypto, so that they can easily migrate the existing network units
to VM. That's also a basic requirement came from our customers
in production environment.
For virti
Realize the symmetric algorithm control queue handler,
including plain cipher and chainning algorithms.
Currently the control queue is used to create and
close session for symmetric algorithm.
Signed-off-by: Gonglei
---
hw/virtio/virtio-crypto.c | 277 +++
The virtio crypto is a virtual crypto device as well as a kind
of virtual hardware accelerator for virtual machines. The
encryption and decryption requests are placed in the data
queue and handled by the real crypto accelerators finally.
The second queue is the control queue used to create or
destr
This patch adds session operation and crypto operation
stuff in the cryptodev backend, including function
pointers and corresponding structures.
Signed-off-by: Gonglei
---
backends/cryptodev.c | 45 +++
include/sysemu/cryptodev.h | 138 +
Remove qcrypto and/or QCRYPTO prefix in order to
make the name shorter because it doesn't repeat
any information.
Signed-off-by: Gonglei
---
backends/cryptodev-builtin.c | 84
backends/cryptodev.c | 106 +++---
hw/virtio/virtio-
This patch adds virtio-crypto-pci, which is the pci proxy for the virtio
crypto device.
Signed-off-by: Gonglei
---
hw/virtio/Makefile.objs | 1 +
hw/virtio/virtio-crypto-pci.c | 77 +++
hw/virtio/virtio-pci.h| 15 +
3 files changed,
Introduce the virtio crypto realization, I'll
finish the core code in the following patches. The
thoughts came from virtio net realization.
For more information see:
http://qemu-project.org/Features/VirtioCrypto
Signed-off-by: Gonglei
---
hw/virtio/Makefile.objs | 1 +
hw/
vfio_register_msi_iova allows to register the MSI IOVA region.
This IOVA window will be used by the kernel to map MSI doorbells.
The function will become static in subsequent patches. However, since
there is no user yet, the compiler argues; the function is currently
not static and a dummy declara
On ARM, MSI transactions emitted by passthrough'ed devices are translated
by the IOMMU. So the host must allocate IOVAs and map them to the host
MSI frame physical addresses. Those IOVAs must be allocated within safe
GPA slots, unused by the guest.
The QEMU VFIO device retrieves the size if the I
This new helper makes possible to search for a MemoryRegion matching
a given name within a root MemoryRegion.
Signed-off-by: Eric Auger
---
include/exec/memory.h | 11 +++
memory.c | 16
2 files changed, 27 insertions(+)
diff --git a/include/exec/memory.h b
This patch including two parts: Cryptodev Backends
and virtio-crypto stuff. I can maintain cryptodev backends
which introduced by myself. For virtio-crypto stuff, I can
share the work with Michael (The whole virtio supporter).
Signed-off-by: Gonglei
---
MAINTAINERS | 14 ++
1 file ch
Introduce a new reserved_iova region type. This type of iova region
is bound to be used by the kernel to map some host physical addresses
(typically MSI frames).
A new initializer, memory_region_init_reserved_iova is introduced, as
well as a test function, memory_region_is_reserved_iova.
Signed-o
Introduce vfio_get_iommu_type1_info helper that allows to handle
variable size vfio_iommu_type1_info allocation with capability
chain support.
Besides, fixes a checkpatch warning on vfio_host_win_add's call.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 33 +++--
We use an opaque point to the VirtIOCryptoReq which
can support different packets based on different
algorithms.
Signed-off-by: Gonglei
---
backends/cryptodev-builtin.c | 2 +-
backends/cryptodev.c | 28 ++--
hw/virtio/virtio-crypto.c| 10 +-
include/
This is a partial update aiming at enhancing the VFIO user API
with IOMMU info capability chain, msi_geometry reporting and
MSI IOVA window registration.
The kernel code is not yet upstreamed. It is available at
https://github.com/eauger/linux/tree/generic-v7-passthrough-v13
([PATCH v13 00/15] KVM
The platform bus is currently used to map dynamically instantiable
platform device MMIO regions. The platform bus also can be seen as a
pool of free guest physical addresses. We would like to use that pool
to allocate a contiguous reserved IOVA region usable for MSI message
address IOMMU mapping.
Introduces VirtIOCryptoReq structure to store
crypto request so that we can support sync and async
crypto operation in the future.
At present, we only support cipher and algorithm
chainning.
Signed-off-by: Gonglei
---
hw/virtio/virtio-crypto.c | 326 +
We can simply test the functions of virtio crypto
device, including session creation, session closing,
cipher encryption and decryption.
Quick usage:
# make tests/virtio-crypto-test && ./tests/virtio-crypto-test
CCtests/virtio-crypto-test.o
LINK tests/virtio-crypto-test
/x86_64/virtio/c
Introduce an helper function to retrieve the iommu type1 capability
chain info.
The first capability ready to be exploited is the msi geometry
capability. vfio_prepare_msi_mapping allocates a MemoryRegion
dedicated to host MSI IOVA mapping. Its size matches the host needs.
This region is mapped on
Introduce the virtio_crypto.h which follows
virtio-crypto specification.
Signed-off-by: Gonglei
---
include/standard-headers/linux/virtio_crypto.h | 381 +
1 file changed, 381 insertions(+)
create mode 100644 include/standard-headers/linux/virtio_crypto.h
diff --git a/i
From: Ravi Bangoria
mfvsrld: Move From VSR Lower Doubleword
Signed-off-by: Ravi Bangoria
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate/vsx-impl.inc.c | 17 +
target-ppc/translate/vsx-ops.inc.c | 1 +
2
From: Thomas Huth
The firmware of the pseries machine, SLOF, is able to load files via
IPv6 networking, too. So to test both, network bootloading on ppc64
and IPv6 (via Slirp) , let's add some PXE tests for this environment,
too. Since we can not use the normal x86 boot sector for network boot
lo
In case of reserved iova region, let's declare this region to the
kernel so that it can use it for IOVA/HPA bindings.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 48 +---
1 file changed, 29 insertions(+), 19 deletions(-)
diff --git a/hw/vfio/comm
From: Thomas Huth
It makes more sense if we have a proper function to check
for KVM-PR than to check for the GET_PVINFO extension all
over the place.
Signed-off-by: Thomas Huth
[dwg: Expanded a comment to discourage overuse of this function]
Signed-off-by: David Gibson
---
target-ppc/kvm.c |
From: Ravi Bangoria
mtvsrdd: Move To VSR Double Doubleword
Signed-off-by: Ravi Bangoria
Signed-off-by: Nikunj A Dadhania
Reviewed-by: Richard Henderson
Signed-off-by: David Gibson
---
target-ppc/translate/vsx-impl.inc.c | 23 +++
target-ppc/translate/vsx-ops.inc.c | 1
The following changes since commit bbc4c3f4f3c624e2de64fdcb79f4dd8c1a508e9d:
Merge remote-tracking branch 'remotes/kevin/tags/for-upstream' into staging
(2016-10-04 14:25:08 +0100)
are available in the git repository at:
git://github.com/dgibson/qemu.git tags/ppc-for-2.8-2016100
cryptodev backend interface is used to realize the active work for
virtual crypto device.
This patch only add the framework, doesn't include specific operations.
Signed-off-by: Gonglei
---
backends/Makefile.objs | 2 +
backends/cryptodev.c | 176 +
From: Thomas Huth
The function spapr_populate_cpu_dt() has become quite big
already, and since we likely have to extend the pa-features
property for every new processor generation, it is nicer
if we put the related code into a separate function.
Signed-off-by: Thomas Huth
Reviewed-by: Cédric Le
From: Thomas Huth
The current code uses pa_features_206 for POWERPC_MMU_2_06, and
for everything else, it uses pa_features_207. This is bad in some
cases because there is also a "degraded" MMU version of ISA 2.06,
called POWERPC_MMU_2_06a, which should of course use the flags for
2.06 instead. An
From: Nikunj A Dadhania
Load 8byte at a time and manipulate.
Big-Endian Storage
+-+-+-+-+
| 00 11 22 33 | 44 55 66 77 | 88 99 AA BB | CC DD EE FF |
+-+-+-+-+
Little-Endian Storage
+-+
From: Avinesh Kumar
cmpl: invalid bit mask should be 0x0041
bctar: invalid bit mask should be 0xE000
Signed-off-by: Avinesh Kumar
Signed-off-by: Rajalakshmi Srinivasaraghavan
Signed-off-by: David Gibson
---
target-ppc/translate.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletion
* Paolo Bonzini (pbonz...@redhat.com) wrote:
>
>
> On 05/10/2016 18:56, Dr. David Alan Gilbert wrote:
> > * Jianjun Duan (du...@linux.vnet.ibm.com) wrote:
> >> Currently we cannot directly transfer a QTAILQ instance because of the
> >> limitation in the migration code. Here we introduce an approa
From: Nikunj A Dadhania
Manipulate data and store 8bytes instead of 4bytes.
Vector (32-bit elements):
+--+--+--+--+
| 00112233 | 44556677 | 8899AABB | CCDDEEFF |
+--+--+--+--+
Store results in following:
Big-Endian Storage
+--
From: Nikunj A Dadhania
lxvb16x: Load VSX Vector Byte*16
Little/Big-endian Storage
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
Vector load results in (8-bit elements):
+--+--+--+--+--+--+--
From: Rajalakshmi Srinivasaraghavan
The following vector compare not equal instructions are added from ISA 3.0.
vcmpneb - Vector Compare Not Equal Byte
vcmpneh - Vector Compare Not Equal Halfword
vcmpnew - Vector Compare Not Equal Word
Signed-off-by: Rajalakshmi Srinivasaraghavan
Reviewed-by:
From: Laurent Vivier
Signed-off-by: Laurent Vivier
Reviewed-by: Greg Kurz
Reviewed-by: David Gibson
Signed-off-by: David Gibson
---
tests/e1000e-test.c | 2 +-
tests/i440fx-test.c | 2 +-
tests/ide-test.c| 2 +-
tests/ivshmem-test.c| 2 +-
tests/libqos
Now that 2.7 is released, create the pseries-2.8 machine type and add the
boilerplate compatiblity macro stuff. There's nothing new to put into the
2.7 compatiliby properties yet, but we'll need something eventually, so
we might as well get it ready now.
Signed-off-by: David Gibson
---
hw/ppc/s
From: Laurent Vivier
Signed-off-by: Laurent Vivier
Signed-off-by: David Gibson
---
tests/Makefile.include| 8 +++-
tests/usb-hcd-uhci-test.c | 24
2 files changed, 23 insertions(+), 9 deletions(-)
diff --git a/tests/Makefile.include b/tests/Makefile.include
i
From: Thomas Huth
A couple of distributors are compiling their distributions
with "-mcpu=power8" for ppc64le these days, so the user sooner
or later runs into a crash there when not explicitely specifying
the "-cpu POWER8" option to QEMU (which is currently using POWER7
for the "pseries" machine
From: Nikunj A Dadhania
stxvb16x: Store VSX Vector Byte*16
Vector (8-bit elements):
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
|F0|F1|F2|F3|F4|F5|F6|F7|E0|E1|E2|E3|E4|E5|E6|E7|
+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+--+
Store results in following:
Little/Big-endian Storage
+--+--
From: Thomas Huth
Transactional memory is also supported on POWER8 KVM-HV if the
KVM_CAP_PPC_HTM is not available in the kernel yet, so add a hack
to allow TM here, too.
Signed-off-by: Thomas Huth
Signed-off-by: David Gibson
---
target-ppc/kvm.c | 9 -
1 file changed, 8 insertions(+),
From: Thomas Huth
SLOF is unfortunately quite slow when running with TCG, so
the pxe test is also performing rather slow here. By using
"-nodefaults" we can disable some devices (vscsi) that we
are not interested in here, so that SLOF does not have to
scan them during boot and thus starts up a li
From: Felipe Franciosi
A typo introduced in f19661c8 prevents qemu from building when configured
with --enable-trace-backend=dtrace.
Signed-off-by: Felipe Franciosi
Reviewed-by: Laurent Vivier
Signed-off-by: David Gibson
---
hw/scsi/spapr_vscsi.c | 2 +-
hw/scsi/trace-events | 2 +-
2 files
* Li Zhijian (lizhij...@cn.fujitsu.com) wrote:
>
>
> On 09/30/2016 05:58 PM, Dr. David Alan Gilbert wrote:
> > * Li Zhijian (lizhij...@cn.fujitsu.com) wrote:
> > >
> > >
> > > On 09/30/2016 02:15 PM, Amit Shah wrote:
> > > > Hi,
> > > >
> > > > On (Thu) 29 Sep 2016 [19:06:32], Li Zhijian wrote
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