Hello,
Here is a v4 addressing all the comments from v3 and adding a couple
more models. Most important changes are :
- a rework of the XSCOM model which now dispatches addresses to the
memory regions using pcb_addr << 3.
- the model for the native Interrupt Presentation Controllers based
This is is an abstraction of a POWER8 chip which is a set of cores
plus other 'units', like the pervasive unit, the interrupt controller,
the memory controller, the on-chip microcontroller, etc. The whole can
be seen as a socket. It depends on a cpu model and its characteristics:
max cores, specifi
From: Benjamin Herrenschmidt
The goal is to emulate a PowerNV system at the level of the skiboot
firmware, which loads the OS and provides some runtime services. Power
Systems have a lower firmware (HostBoot) that does low level system
initialization, like DRAM training. This is beyond the scope
On a real POWER8 system, the Pervasive Interconnect Bus (PIB) serves
as a backbone to connect different units of the system. The host
firmware connects to the PIB through a bridge unit, the
Alter-Display-Unit (ADU), which gives him access to all the chiplets
on the PCB network (Pervasive Connect Bu
From: Benjamin Herrenschmidt
The LPC (Low Pin Count) interface on a POWER8 is made accessible to
the system through the ADU (XSCOM interface). This interface is part
of set of units connected together via a local OPB (On-Chip Peripheral
Bus) which act as a bridge between the ADU and the off chip
As Qemu only supports a single instance of the ISA bus, we use the LPC
controller of chip 0 to create one and plug in a couple of useful
devices, like an UART and RTC. An IPMI BT device, which is also an ISA
device, can be defined on the command line to connect an external BMC.
That is for later.
This will be used to build real HW ids for the cores and enforce some
limits on the available cores per chip.
Signed-off-by: Cédric Le Goater
---
Changes since v3 :
- reworked pnv_chip_core_sanitize() to return errors and to check the
maximum of cores against the instance cores_mask
Ch
Now that we are using real HW ids for the cores in PowerNV chips, we
can route the XSCOM accesses to them. We just need to attach a
specific XSCOM memory region to each core in the appropriate window
for the core number.
To start with, let's install the DTS (Digital Thermal Sensor) handlers
which
The Processor Identification Register (PIR) is a register that holds a
processor identifier which is used for bus transactions (XSCOM) and
for processor differentiation in multiprocessor systems. It also used
in the interrupt vector entries (IVE) to identify the thread serving
the interrupts.
P9 a
From: Benjamin Herrenschmidt
Useful to debug interrupt problems.
Signed-off-by: Benjamin Herrenschmidt
[clg: - updated for qemu-2.7
- added a test on ->irqs as it is not necessarily allocated
(PHB3_MSI)
- removed static variable g_xics and replace with a loop on all
Today, the Interrupt Presentation Controllers (ICP) are stored in an
array under the base class XICSState. They are simply indexed using
the CPU index field of CPUState. This made sense for the current
derived classes, spapr and kvm, as the CPU index are contiguous.
Nevertheless some problems have
Interrupt Control Sources (ICS) are now maintained under a list.
Signed-off-by: Cédric Le Goater
---
hw/intc/xics.c| 6 ++
include/hw/ppc/xics.h | 1 +
2 files changed, 7 insertions(+)
diff --git a/hw/intc/xics.c b/hw/intc/xics.c
index 876c472aaa69..3c250fca85c0 100644
--- a/hw/intc
This is largy inspired by sPAPRCPUCore with some simplification, no
hotplug for instance. But the differences are small and the objects
could possibly be merged.
A set of PnvCore objects is added to the PnvChip and the device
tree is populated looping on these cores.
Real HW cpu ids are now gener
From: Benjamin Herrenschmidt
This provides access to the MMIO based Interrupt Presentation
Controllers (ICP) as found on a POWER8 system.
A new XICSNative class is introduced to hold the MMIO region of the
ICPs. It also makes use of a hash table to associate the ICPState of a
CPU with a HW proce
From: Benjamin Herrenschmidt
Instead of an array of fixed sized blocks, use a list, as we will need
to have sources with variable number of interrupts. SPAPR only uses
a single entry. Native will create more. If performance becomes an
issue we can add some hashed lookup but for now this will do f
and also link the XICS object to each core as it is needed to do the
CPU setup.
Signed-off-by: Cédric Le Goater
---
hw/ppc/pnv.c | 18 ++
hw/ppc/pnv_core.c| 25 +
include/hw/ppc/pnv.h | 2 ++
3 files changed, 41 insertions(+), 4 deletions(-)
From: Benjamin Herrenschmidt
The existing implementation remains same and ics-base is introduced. The
type name "ics" is retained, and all the related functions renamed as
ics_simple_*
This will allow different implementations for the source controllers
such as the MSI support of PHB3 on Power8
From: Benjamin Herrenschmidt
The OCC is an on-chip microcontroller based on a ppc405 core used
for various power management tasks. It comes with a pile of additional
hardware sitting on the PIB (aka XSCOM bus). At this point we don't
emulate it (nor plan to do so). However there is one facility w
From: Benjamin Herrenschmidt
The PSI (Processor Service Interface) is one of the engines of the
"Bridge" unit which connects the different interfaces to the Power
Processor.
This adds just enough of the PSI bridge to handle various on-chip and
the one external interrupt. The rest of PSI has to d
From: Benjamin Herrenschmidt
It adds the Naples chip which supports proper LPC interrupts via the
LPC controller rather than via an external CPLD.
Signed-off-by: Benjamin Herrenschmidt
[clg: - updated for qemu-2.7
- ported on latest PowerNV patchset (v3) ]
Signed-off-by: Cédric Le Goater
The LPC Controller on POWER9 is very similar to the one found on
POWER8 but accesses are now done via on MMIOs, without the XSCOM and
ECCB logic. The device tree is populated differently so we add a
PnvLpcClass and a couple of methods for the purpose.
LPC interrupts routing is missing. This is Wor
Hi,
On 02/10/2016 22:50, Eric Auger wrote:
> Pass an error object to prepare for migration to VFIO-PCI realize.
>
> For the time being let's just simply report the error in
> vfio platform's vfio_base_device_init(). A subsequent patch will
> duly propagate the error up to vfio_platform_realize.
>
Hi,
Your series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: 1475479496-16158-1-git-send-email-...@kaod.org
Subject: [Qemu-devel] [PATCH v4 00/20] ppc/pnv: booting the kernel and reaching
user space
=== TEST SCRIPT BEGIN ===
#!/bin/ba
> Checking PATCH 14/20: ppc/xics: introduce a helper to insert a new ics...
> Checking PATCH 15/20: ppc/xics: Add "native" XICS subclass...
> ERROR: spaces required around that '&' (ctx:WxV)
> #308: FILE: hw/intc/xics_native.c:246:
> +(gpointer) &xics->ss[cs->cpu_index]);
>
On 9/30/2016 10:49 AM, Kirti Wankhede wrote:
>
...
>> Hi Daniel,
>>
>> Here you are proposing to add a class named "gpu", which will make all
>> those gpu
>> related attributes mandatory, which libvirt can allow user to better
>> parse/present a particular mdev configur
If a PDU has a flush request pending, the current code calls pdu_free()
twice:
1) pdu_complete()->pdu_free() with pdu->cancelled set, which does nothing
2) v9fs_flush()->pdu_free() with pdu->cancelled cleared, which moves the
PDU back to the free list.
This works but it complexifies the logic
On 30/09/2016 23:31, Alex Bennée wrote:
> tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
> -if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
> - tb->flags != flags)) {
> +if (unlikely(!tb || atomic_read(&tb->pc) != pc ||
> atomic_r
On 30/09/2016 23:31, Alex Bennée wrote:
> Updates to the internal page table are protected by the mmap_lock.
> However for defined C11 semantics things that are access across threads
> need to accessed using at least relaxed atomics.
Again, this is only necessary for the initial load-acquire ope
On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
> Added two new options 'offset' and 'size'. This makes it possible to use
> only part of the file as a device. This can be used e.g. to limit the
> access only to single partition in a disk image or use a disk inside a
> tar archi
On 01/10/2016 19:06, David Kiarie wrote:
> Signed-off-by: David Kiarie
> ---
> hw/i386/amd_iommu.c | 16 ++--
> 1 file changed, 10 insertions(+), 6 deletions(-)
>
> diff --git a/hw/i386/amd_iommu.c b/hw/i386/amd_iommu.c
> index 023de52..886c72b 100644
> --- a/hw/i386/amd_iommu.c
>
On 30/09/2016 23:30, Alex Bennée wrote:
> Commit b480d9b74 converted tb_page_addr_t to abi_ulong which while the
> right size imposes additional alignment restrictions on the type. This
> gets in the way of using atomic accesses on certain guest platforms
> which allow finer alignments. As tb_pag
From: Prasad J Pandit
ARM A9MP processor has a peripheral timer with an auto-increment
register, which holds an increment step value. A user could set
this value to zero. When auto-increment control bit is enabled,
it leads to an infinite loop in 'a9_gtimer_update' while
updating comparator value
Hello Peter,
+-- On Sun, 2 Oct 2016, Peter Maydell wrote --+
| The timer can't autoincrement by more than a 32 bit value, but
| the timer value is 64 bits, and since this code may be doing more than
| one autoincrement it's better to use 64 bits.
Okay.
| If in doubt, you need to check the da
On 03/10/2016 10:52, Daniel P. Berrange wrote:
> On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
>> Added two new options 'offset' and 'size'. This makes it possible to use
>> only part of the file as a device. This can be used e.g. to limit the
>> access only to single partit
On 30/09/2016 23:30, Alex Bennée wrote:
> Hi,
>
> This is v3 of the ThreadSanitizer fixes. Changes from the last
> version:
>
> - added some more review tags
> - made clear C11 undefined behaviour is the main issue
> - added two minor fixes to atomic.h
> - change type of tb_page_addr_t
Paolo Bonzini writes:
> On 30/09/2016 23:30, Alex Bennée wrote:
>> Commit b480d9b74 converted tb_page_addr_t to abi_ulong which while the
>> right size imposes additional alignment restrictions on the type. This
>> gets in the way of using atomic accesses on certain guest platforms
>> which allo
Paolo Bonzini writes:
> On 30/09/2016 23:30, Alex Bennée wrote:
>> Hi,
>>
>> This is v3 of the ThreadSanitizer fixes. Changes from the last
>> version:
>>
>> - added some more review tags
>> - made clear C11 undefined behaviour is the main issue
>> - added two minor fixes to atomic.h
>>
On Fri, 12 Aug 2016 14:54:07 +0800
Xiao Guangrong wrote:
> We should let nvdimm acpi know which nvdimm device is being unplugged
> before QEMU interrupts the guest so that nvdimm acpi can update its
> FIT properly
>
> prepare_unplug() callback is introduced exactly for this purpose then
> the be
mux_chr_update_read_handler() is adding a new mux_cnt each time
mux_chr_update_read_handler() is called, it's not possible to actually
update the "child" chr callbacks that were set previously. This may lead
to crashes if the "child" chr is destroyed:
valgrind x86_64-softmmu/qemu-system-x86_64 -ch
In commit ac1b84dd1 (rhbz#1027181), a check was added to only update the
"read handler" when the front-end is opened, because the read callbacks
were not restored when a device is plugged. However, this seems not
correct, the handler is correctly set back on hotplug (in
virtconsole_realize) and the
Hi,
When qemu with muxed monitor quits, it leads to invalid use after free:
valgrind qemu -chardev stdio,mux=on,id=char0 -mon
chardev=char0,mode=control,default
==4306== Invalid read of size 8
==4306==at 0x8061D3: json_lexer_destroy (json-lexer.c:385)
==4306==by 0x7E39F8: js
Paolo Bonzini writes:
> On 30/09/2016 23:31, Alex Bennée wrote:
>> tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
>> -if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
>> - tb->flags != flags)) {
>> +if (unlikely(!tb || atomic_read(
On 03/10/2016 11:48, Alex Bennée wrote:
>
> Paolo Bonzini writes:
>
>> On 30/09/2016 23:31, Alex Bennée wrote:
>>> tb = atomic_rcu_read(&cpu->tb_jmp_cache[tb_jmp_cache_hash_func(pc)]);
>>> -if (unlikely(!tb || tb->pc != pc || tb->cs_base != cs_base ||
>>> - tb->flags !
On 03/10/2016 11:47, Marc-André Lureau wrote:
> Hi,
>
> When qemu with muxed monitor quits, it leads to invalid use after free:
>
> valgrind qemu -chardev stdio,mux=on,id=char0 -mon
> chardev=char0,mode=control,default
>
> ==4306== Invalid read of size 8
> ==4306==at 0x8061D3: jso
On 09/30/2016 05:02 PM, Paolo Bonzini wrote:
>
> On 30/09/2016 16:19, Halil Pasic wrote:
>> > As a part of the long term effort to convert migration to vmstate the
>> > migration of virtio devices was recently partially switched to vmstate
>> > starting with the outer layer (commit 5943124cc "v
On 03/10/2016 12:04, Halil Pasic wrote:
> > Another useful thing to do is to move code out of virtio_load and into a
> > post_load callback of vmstate_virtio.
>
> thanks for the review. I agree, but I see this out of scope for this patch
> series. If you like I could do something along the lines
Hi
On Mon, Oct 3, 2016 at 1:57 PM Paolo Bonzini wrote:
>
>
> On 03/10/2016 11:47, Marc-André Lureau wrote:
> > Hi,
> >
> > When qemu with muxed monitor quits, it leads to invalid use after free:
> >
> > valgrind qemu -chardev stdio,mux=on,id=char0 -mon
> chardev=char0,mode=control,default
> >
>
On 03/10/2016 11:32, Alex Bennée wrote:
> 1. For atomic_read/set fall back to plain access for sizeof(*ptr) >
> sizeof(void *)
>
> This would throw up warnings in ThreadSanitizer on 64-on-32 but
> practically generate the same code as before.
>
> 2. Split sizeof(*ptr) > sizeof(void *) accesses
Good morning.
I am currently trying to replace the TLB entirely but fail to do so. Indeed,
while I seem to have managed to catch any call/access made to it, whenever I
now try to read or write to a device, I get a failed access(code is 2, e.g.
device not present). My addresses do seem to be good
On 09/30/2016 04:50 PM, Paolo Bonzini wrote:
>
>
> On 30/09/2016 16:19, Halil Pasic wrote:
>> In most cases the functions passed to VMSTATE_VIRTIO_DEVICE
>> only call the virtio_load and virtio_save wrappers. Some include some
>> pre- and post- massaging too. The massaging is better expressed
>
On Mon, 3 Oct 2016 09:52:13 +0100
"Daniel P. Berrange" wrote:
> On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
> > Added two new options 'offset' and 'size'. This makes it possible to use
> > only part of the file as a device. This can be used e.g. to limit the
> > access onl
On Mon, 3 Oct 2016 11:20:44 +0200
Paolo Bonzini wrote:
> On 03/10/2016 10:52, Daniel P. Berrange wrote:
> > On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
> >> Added two new options 'offset' and 'size'. This makes it possible to use
> >> only part of the file as a device. T
On Mon, Oct 03, 2016 at 12:45:57PM +0200, Tomáš Golembiovský wrote:
> On Mon, 3 Oct 2016 09:52:13 +0100
> "Daniel P. Berrange" wrote:
>
> > On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
> > > Added two new options 'offset' and 'size'. This makes it possible to use
> > > only
On Mon, 3 Oct 2016 11:52:59 +0100
"Daniel P. Berrange" wrote:
> On Mon, Oct 03, 2016 at 12:45:57PM +0200, Tomáš Golembiovský wrote:
> > On Mon, 3 Oct 2016 09:52:13 +0100
> > "Daniel P. Berrange" wrote:
> >
> > > On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
> > > > Add
On Mon, Oct 03, 2016 at 01:07:07PM +0200, Tomáš Golembiovský wrote:
> On Mon, 3 Oct 2016 11:52:59 +0100
> >
> > > > > +
> > > > > +if (((bs->drv != &bdrv_file) || !bs->read_only) &&
> > > >
> > > > Why the check against bdrv_file ?
> > >
> > > To limit it only to files. Maybe there is
On 03/10/2016 12:47, Tomáš Golembiovský wrote:
> On Mon, 3 Oct 2016 11:20:44 +0200
> Paolo Bonzini wrote:
>
>> On 03/10/2016 10:52, Daniel P. Berrange wrote:
>>> On Sun, Oct 02, 2016 at 09:13:29PM +0200, Tomáš Golembiovský wrote:
Added two new options 'offset' and 'size'. This makes it p
On 09/29/2016 07:27 AM, David Gibson wrote:
> On Wed, Sep 28, 2016 at 08:51:28PM +0200, Laurent Vivier wrote:
>> Signed-off-by: Laurent Vivier
>> ---
>> tests/Makefile.include | 1 +
>> tests/libqos/pci-pc.c| 22
>> tests/libqos/pci-spapr.c | 280
>>
On 03/10/2016 12:36, Halil Pasic wrote:
>> > #define VMSTATE_PCI_DEVICE(_field, _state) { \
>> > .name = (stringify(_field)), \
>> > .size = sizeof(VirtIODevice),\
>> > .vmsd =
On 03/10/2016 13:23, Cédric Le Goater wrote:
> On 09/29/2016 07:27 AM, David Gibson wrote:
>> On Wed, Sep 28, 2016 at 08:51:28PM +0200, Laurent Vivier wrote:
>>> Signed-off-by: Laurent Vivier
>>> ---
>>> tests/Makefile.include | 1 +
>>> tests/libqos/pci-pc.c| 22
>>> tests/libqos
From: Evgeny Yakovlev
Current CPU definition for AMD Opteron third generation includes
features like SSE4a and LAHF_LM support in emulated CPUID. These
features are present in K8 rev.E or K10 CPUs and later. However,
current G3 family and model describe 2nd generation K8 cores instead.
This is i
Ping...
Please help to review the patch set in order to catch up with the qemu-2.8'
time window if possible. Thanks a lot!
Regards,
-Gonglei
发件人：龚磊
收件人：qemu-devel,virtio-...@lists.oasis-open.org,
抄送：骆能军,Michael S. Tsirkin,Stefan Hajnoczi,Paolo Bonzini,Daniel P.
Berrange,黄伟栋,吴斌,Mihai Claudiu Car
Unfortunately, there is no public Windows API to start trimming the
filesystem. The only viable way here is to call 'defrag.exe /L' for
each volume.
This is working since Win8 and Win2k12.
Signed-off-by: Denis V. Lunev
Signed-off-by: Denis Plotnikov
CC: Michael Roth
CC: Stefan Weil
CC: Marc-A
If the user passes an alias name and a property to -cpu, QEMU fails to
find the CPU definition and exits.
$ qemu-system-ppc64 -cpu POWER8E,compat=power7
qemu-system-ppc64: Unable to find sPAPR CPU Core definition
This happens because spapr_get_cpu_core_type() passes the full string from
the comma
Hi Denis
On Mon, Oct 3, 2016 at 4:08 PM Denis V. Lunev wrote:
> Unfortunately, there is no public Windows API to start trimming the
> filesystem. The only viable way here is to call 'defrag.exe /L' for
> each volume.
>
> This is working since Win8 and Win2k12.
>
Could you describe the changes t
On 10/03/2016 03:22 PM, Marc-André Lureau wrote:
> Hi Denis
>
> On Mon, Oct 3, 2016 at 4:08 PM Denis V. Lunev wrote:
>
>> Unfortunately, there is no public Windows API to start trimming the
>> filesystem. The only viable way here is to call 'defrag.exe /L' for
>> each volume.
>>
>> This is working
To prepare for migration to realize, let's use a local error
object in vfio_initfn. Also let's use the same error prefix for all
error messages.
On top of the 1-1 conversion, we start using a common error prefix for
all error messages. We also introduce a similar warning prefix which will
be used
Pass an error object to prepare for migration to VFIO-PCI realize.
The returned value will be removed later on.
The case where error recovery cannot be enabled is not converted into
an error object but directly reported through error_report, as before.
Populating an error instead would cause the f
This series converts VFIO-PCI to realize. It also aims at improving
the error reporting in case of QMP hot-plug.
Before the series, a device_add failure would have reported:
{"error": {"class": "GenericError", "desc": "Device initialization
failed"}}.
Now the actual error cause is reported.
A si
Pass an error object to prepare for migration to VFIO-PCI realize.
In vfio_probe_igd_bar4_quirk, simply report the error.
Signed-off-by: Eric Auger
---
hw/vfio/pci-quirks.c | 10 +-
hw/vfio/pci.c| 3 +--
hw/vfio/pci.h| 3 ++-
3 files changed, 8 insertions(+), 8 deletio
Pass an error object to prepare for the same operation in
vfio_populate_device. Eventually this contributes to the migration
to VFIO-PCI realize.
We now report an error on vfio_get_region_info failure.
vfio_probe_igd_bar4_quirk is not involved in the migration to realize
and simply calls error_re
Pass an error object to prepare for migration to VFIO-PCI realize.
The error object is propagated down to vfio_intx_enable_kvm().
The three other callers, vfio_intx_enable_kvm(), vfio_msi_disable_common()
and vfio_pci_post_reset() do not propagate the error and simply call
error_reportf_err() wit
In case the vfio_init_intp fails we currently do not return an
error value. This patch fixes the bug. The returned value is not
explicit but in practice the error object is the one used to
report the error to the end-user and the actual returned error
value is not used.
Signed-off-by: Eric Auger
Propagate the vfio_populate_device errors up to vfio_base_device_init.
The error object also is passed to vfio_init_intp. At the moment we
only report the error. Subsequent patches will propagate the error
up to the realize function.
Signed-off-by: Eric Auger
---
hw/vfio/platform.c | 25
This patch converts VFIO PCI to realize function.
Also original initfn errors now are propagated using QEMU
error objects. All errors are formatted with the same pattern:
"vfio: %s: the error description"
Signed-off-by: Eric Auger
---
v2 -> v3:
- use errp directly in all cases
v1 -> v2:
- corr
Pass an error object to prepare for migration to VFIO-PCI realize.
The returned value will be removed later on.
We now format an error in case of reading failure for
- the MSIX flags
- the MSIX table,
- the MSIX PBA.
Signed-off-by: Eric Auger
---
v1 -> v2:
- this patch now comes before the act
In case the end-user calls qemu with -vfio-pci option without passing
either sysfsdev or host property value, the device is interpreted as
:00:00.0. Let's create a specific error message to guide the end-user.
Signed-off-by: Eric Auger
---
hw/vfio/pci.c | 11 +++
1 file changed, 11 i
Pass an error object to prepare for migration to VFIO-PCI realize.
In vfio platform vfio_base_device_init we currently just report the
error. Subsequent patches will propagate the error up to the realize
function.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 13 +++--
h
Pass an error object to prepare for migration to VFIO-PCI realize.
The error is cascaded downto vfio_add_std_cap and then vfio_msi(x)_setup,
vfio_setup_pcie_cap.
vfio_add_ext_cap does not return anything else than 0 so let's transform
it into a void function.
Also use pci_add_capability2 which ta
This patch propagates errors encountered during vfio_base_device_init
up to the realize function.
Signed-off-by: Eric Auger
---
v3: creation
---
hw/vfio/platform.c | 49 ++---
1 file changed, 26 insertions(+), 23 deletions(-)
diff --git a/hw/vfio/pl
The error is currently simply reported in vfio_get_group. Don't
bother too much with the prefix which will be handled at upper level,
later on.
Signed-off-by: Eric Auger
---
hw/vfio/common.c | 39 ---
1 file changed, 24 insertions(+), 15 deletions(-)
diff --g
Pass an error object to prepare for migration to VFIO-PCI realize.
For the time being let's just simply report the error in
vfio platform's vfio_base_device_init(). A subsequent patch will
duly propagate the error up to vfio_platform_realize.
Signed-off-by: Eric Auger
---
v3 -> v4:
- vfio_conne
The returned value is not used anymore by the caller, vfio_realize,
since the error now is stored in the error object. So let's remove it.
Signed-off-by: Eric Auger
---
Logically we could do that job for all the functions now getting an
Error object passed as a parameter to avoid duplicate info
The returned value (either -errno or -1) is not used anymore by the caller,
vfio_realize, since the error now is stored in the error object. So let's
remove it.
Signed-off-by: Eric Auger
---
hw/vfio/pci.c | 23 ++-
1 file changed, 10 insertions(+), 13 deletions(-)
diff --git
See two comments below.
On 10/03/16 14:08, Denis V. Lunev wrote:
Unfortunately, there is no public Windows API to start trimming the
filesystem. The only viable way here is to call 'defrag.exe /L' for
each volume.
This is working since Win8 and Win2k12.
Signed-off-by: Denis V. Lunev
Signed-of
On Fri, Sep 30, 2016 at 09:59:16PM +0300, Vladimir Sementsov-Ogievskiy wrote:
> On 30.09.2016 20:11, Vladimir Sementsov-Ogievskiy wrote:
> > Hi all!
> >
> > Please, can somebody explain me, why we fail guest request in case of io
> > error in write notifier? I think guest consistency is more impor
On Fri, 12 Aug 2016 14:54:08 +0800
Xiao Guangrong wrote:
> nvdimm's memory info can not exported via _CRS, instead, it is reported
> by NFIT/FIT
>
> This patch let _CRS return zero for both memory address and memory size
> if it is a nvdimm device inserted to the slot
I'm not sure if it's right
On Wed, Sep 28, 2016 at 02:08:04PM +0100, Daniel P. Berrange wrote:
> The colo patch series added various trace events to the top
> level trace-events file, despite the files using them being
> in a sub-dir.
>
> commit 30656b097e9dd7978d3fe9416cb9f5a421a9e63e
> Author: Zhang Chen
> Date:
On Wed, Sep 28, 2016 at 02:08:05PM +0100, Daniel P. Berrange wrote:
> If there is a double underscore in an event name, at least
> systemtap 3.0 will turn that into a single underscore. This
> in turn breaks the generated QEMU code that calls this
> event. The generated-tracers.h file calls a macro
On Wed, Sep 28, 2016 at 02:08:12PM +0100, Daniel P. Berrange wrote:
> Currently we only expose a TraceEvent array, which must
> be indexed via the TraceEventID enum constants. This
> changes the generator to expose a named TraceEvent
> instance for each event, with an _EVENT suffix.
>
> Signed-off
Hi Paolo,
I'm sorry, but I do not get it quite yet, or more exactly I have the
feeling I did not manage to bring my point over. So I will try with
more details.
On 10/03/2016 01:29 PM, Paolo Bonzini wrote:
>
>
> On 03/10/2016 12:36, Halil Pasic wrote:
#define VMSTATE_PCI_DEVICE(_field, _st
On Fri, 12 Aug 2016 14:54:02 +0800
Xiao Guangrong wrote:
General design issue in this series is regenerating
_FIT data every time inside of _FIT read loop.
The issue here is that if FIT data doesn't fit in one page
RFIT would be called several times resulting in calling
nvdimm_dsm_func_read_fit(
Whops, somehow I completely forgot about this.
On Tue, 20 Sep 2016 09:09:59 -0500
Eric Blake wrote:
> On 09/20/2016 04:37 AM, Tomáš Golembiovský wrote:
>
> [meta-comment]: Your series came through without any threading (you sent
> three threads, instead of patch 1 and 2 being marked In-Reply-To
On Wed, Sep 28, 2016 at 02:08:14PM +0100, Daniel P. Berrange wrote:
> def read_trace_records(edict, fobj):
> """Deserialize trace records from a file, yielding record tuples
> (event_num, timestamp, pid, arg1, ..., arg6)."""
> +idtoname = {
> +dropped_event_id: "dropped"
> +}
On Wed, Sep 28, 2016 at 02:08:15PM +0100, Daniel P. Berrange wrote:
> If the ftrace backend is compiled into QEMU, any attempt
> to start QEMU while non-root will fail due to the
> inability to open /sys/kernel/debug/tracing/trace_on.
s/trace_on/tracing_on/
>
> Add a fallback into the code so th
Unfortunately, there is no public Windows API to start trimming the
filesystem. The only viable way here is to call 'defrag.exe /L' for
each volume.
This is working since Win8 and Win2k12.
Signed-off-by: Denis V. Lunev
Signed-off-by: Denis Plotnikov
CC: Michael Roth
CC: Stefan Weil
CC: Marc-A
On Wed, Sep 28, 2016 at 02:08:16PM +0100, Daniel P. Berrange wrote:
> Remove the notion of there being a single global array
> of trace events, by introducing a method for registering
> groups of events.
>
> The module_call_init() needs to be invoked at the start
> of any program that wants to mak
On Wed, Sep 28, 2016 at 02:08:17PM +0100, Daniel P. Berrange wrote:
> The CPUState struct has a bitmap tracking which VCPU
> events are currently active. This is indexed based on
> the event ID values, and sized according the maximum
> TraceEventVCPUID enum value.
>
> When we start dynamically ass
On Mon, 3 Oct 2016 13:23:27 +0200
Cédric Le Goater wrote:
> On 09/29/2016 07:27 AM, David Gibson wrote:
> > On Wed, Sep 28, 2016 at 08:51:28PM +0200, Laurent Vivier wrote:
> >> Signed-off-by: Laurent Vivier
> >> ---
> >> tests/Makefile.include | 1 +
> >> tests/libqos/pci-pc.c| 22 --
On Sat, Oct 1, 2016 at 4:10 AM, ashish mittal wrote:
>> If you make these changes then all multi-threading in libqnio and the
>> QEMU block driver can be dropped. There will be less code and it will
>> be simpler.
You'll get a lot of basic tests for free if you add vxhs support to
the existing t
On 10/03/2016 04:03 PM, Greg Kurz wrote:
> On Mon, 3 Oct 2016 13:23:27 +0200
> Cédric Le Goater wrote:
>
>> On 09/29/2016 07:27 AM, David Gibson wrote:
>>> On Wed, Sep 28, 2016 at 08:51:28PM +0200, Laurent Vivier wrote:
Signed-off-by: Laurent Vivier
---
tests/Makefile.include
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