From: Liang Li
Put the three parameters related to multiple thread (de)compression
into an int array, and use an enum type to index the parameter.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
include/migration/migration.h | 4 +---
migration/migration.c
From: Michael Chapman
This bug manifested itself as a VM that could not be resumed by libvirt
following a migration:
# virsh resume example
error: Failed to resume domain example
error: internal error: cannot parse json {"return":
{"xbzrle-cache":
{..., "cache-miss-rate": -nan, .
From: Liang Li
Add the hmp interface to tune and query the parameters used in
live migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
hmp-commands.hx | 17 +++
hmp.c | 65
From: Liang Li
If live migration is very fast and can be completed in 1 second,
the dirty_sync_count of MigrationState will not be updated.
Then you will see "dirty sync count: 0" in qemu monitor even if
the actual dirty sync count is not 0.
Signed-off-by: Liang Li
Reviewed-by: Juan Quintela
R
Shannon Zhao writes:
> From: Shannon Zhao
>
> Add aml_memory32_fixed() for describing device mmio region in resource
> template.
> These can be used to generating DSDT table for ACPI on ARM.
>
> Signed-off-by: Shannon Zhao
> Signed-off-by: Shannon Zhao
Reviewed-by: Alex Bennée
> ---
> hw
On 06/05/2015 19:23, Max Reitz wrote:
> The guest sees whatever has been written into reply->error, and that
> field hasn't been written by this function in that case. It has been
> written by nbd_receive_reply() in nbd.c, and that value comes directly
> from the server. In case of qemu-nbd being
On 07/05/2015 12:50, Liviu Ionescu wrote:
>
>> On 07 May 2015, at 12:52, Leon Alrae wrote:
>>
>>> is it that difficult to count the "arg"s and correctly alloc the array?
>>
>> This probably would require going through the list twice
>
> the code to iterate is already there, for other options, y
On 10 March 2015 at 17:45, Peter Maydell wrote:
> On 10 March 2015 at 17:43, John Snow wrote:
>> Wasn't aware we were actually going through with that; it had looked
>> like we were going to refrain from fiddling with it because we found
>> a workaround that sufficed for glib 2.12.
>
> Well, we'r
Am 07.05.2015 um 14:20 hat Paolo Bonzini geschrieben:
>
>
> On 06/05/2015 19:23, Max Reitz wrote:
> > The guest sees whatever has been written into reply->error, and that
> > field hasn't been written by this function in that case. It has been
> > written by nbd_receive_reply() in nbd.c, and that
> On 07 May 2015, at 15:21, Leon Alrae wrote:
>
> On 07/05/2015 12:50, Liviu Ionescu wrote:
>>
>>> On 07 May 2015, at 12:52, Leon Alrae wrote:
>>>
is it that difficult to count the "arg"s and correctly alloc the array?
>>>
>>> This probably would require going through the list twice
>>
On 7 May 2015 at 12:49, Leon Alrae wrote:
> Remove semihosting_enabled and semihosting_target and replace them with
> SemihostingConfig structure containing equivalent fields. The structure
> is defined in vl.c where it is actually set.
>
> Also introduce separate header file include/exec/semihost
On 7 May 2015 at 12:50, Juan Quintela wrote:
>
>
> Hi again
>
> For v2
>
> - fix 32bit compilation (as said, compiling for 64bit linux, 64bit
> windows and 32bit windows was not enough)
>
> - Now, we have versions 2.4 everywhere (thanks Eric)
>
> - Liang Li sent a new patch to the list to fix th
On 07/05/2015 13:35, Liviu Ionescu wrote:
>
>> On 07 May 2015, at 15:21, Leon Alrae wrote:
>>
>> On 07/05/2015 12:50, Liviu Ionescu wrote:
>>>
On 07 May 2015, at 12:52, Leon Alrae wrote:
> is it that difficult to count the "arg"s and correctly alloc the array?
This probab
Hello!
> The issue is similar to what you have noticed.
In this case it's probably not your fault.
> The larger the number of smp cores it is more likely that the boot will get
> stuck.
> I've commuted this patch series as an RFC because of this issue.
I have tried to give more testing to it
On 07/05/2015 14:29, Kevin Wolf wrote:
> > No, it shouldn't indeed.
> >
> > Could alloc_clusters_noref do bdrv_truncate and return ENOSPC if it
> > fails? That's how for example qcow and vhdx work. vdi has the same
> > problem.
>
> If you want NBD to return -ENOSPC for writes after EOF, chang
On 07/05/2015 13:31, Alexander Spyridakis wrote:
> This series implements a bare-metal test payload for the ARM and AARCH64 virt
> machine models. With the new direction of TCG to finally get multi-threaded
> capabilities, simple and easily deployed tests are needed, to reproduce race
> condition
On 15/04/2015 11:26, Liang Li wrote:
> @@ -378,7 +402,18 @@ void migrate_compress_threads_create(void)
> thread_count = migrate_compress_threads();
> compress_threads = g_new0(QemuThread, thread_count);
> comp_param = g_new0(CompressParam, thread_count);
> +comp_done_cond = g_n
On 15/04/2015 11:26, Liang Li wrote:
> +if (ret != RAM_SAVE_CONTROL_NOT_SUPP) {
> +if (ret != RAM_SAVE_CONTROL_DELAYED) {
> +if (bytes_xmit > 0) {
> +acct_info.norm_pages++;
I don't think you can mix non-atomic and atomic increments like
this---or if you c
On 7 May 2015 at 12:49, Leon Alrae wrote:
> Add new "arg" sub-argument to the --semihosting-config allowing to pass
> multiple input argument separately. It is required for example by UHI
> semihosting to construct argc and argv.
> diff --git a/qemu-options.hx b/qemu-options.hx
> index ec356f6..e
Hello!
> My current guest kernel is v3.19.5. I will test on 4.1rc2 soon.
Retested with 4.1.0rc2 (linux-stable.git master). Works perfectly fine with up
to 8 CPUs. Here is boot log from 16 CPUs, listing potential problems:
--- cut ---
Initializing cgroup subsys memory
Initializing cgroup subsy
Hello,
On Thu, May 7, 2015 at 12:41 PM, Michael Tokarev wrote:
> include/glib-compat.h defines a bunch of functions based on glib primitives,
> and uses assert() without including assert.h. Replace assert() with
> g_assert() to make the file more self-contained, and to fix compilation
> breakage
On Wed, May 06, 2015 at 12:52:02PM +0800, Fam Zheng wrote:
> v2: Fix typo and add Eric's rev-by in patch 3.
> Add patch 1 to discard target in mirror job. (Paolo)
> Add patch 6 to improve iotests.wait_ready. (John)
>
> This fixes the mirror assert failure reported by wangxiaolong:
>
> htt
Am 07.05.2015 um 14:47 hat Paolo Bonzini geschrieben:
>
>
> On 07/05/2015 14:29, Kevin Wolf wrote:
> > > No, it shouldn't indeed.
> > >
> > > Could alloc_clusters_noref do bdrv_truncate and return ENOSPC if it
> > > fails? That's how for example qcow and vhdx work. vdi has the same
> > > probl
On Thu, 07 May 2015 13:48:20 +0300
Pavel Fedin wrote:
> set_host_notifier() is introduced into virtio-mmio now. Most of codes came
> from virtio-pci.
>
> Signed-off-by: Ying-Shiuan Pan
Meta-comment #1:
This is almost certainly not the correct email address of the original
author :) I'd recomm
On Thu, 07 May 2015 13:49:54 +0300
Pavel Fedin wrote:
> Same as host notifier of virtio-mmio, most of codes came from virtio-pci.
Possibly another case for common helper functions, as I also copied a
lot of stuff from pci for ccw :)
> The kvm-arm does not yet support irqfd, need to fix the hard
On Wed, May 06, 2015 at 07:23:32PM +0800, Fam Zheng wrote:
> Reported by Paolo.
>
> Unlike the iohandler in main loop, iothreads currently process the event
> notifier used as virtio-blk ioeventfd in all nested aio_poll. This is
> dangerous
> without proper protection, because guest requests coul
On Thu, 07 May 2015 13:51:27 +0300
Pavel Fedin wrote:
Would it make sense to merge this with the first patch, so that you
introduce ioeventfds in one go?
> Signed-off-by: Ying-Shiuan Pan
> Signed-off-by: Pavel Fedin
> ---
> hw/virtio/virtio-mmio.c | 47
> ++
On Thursday, May 7, 2015, Pavel Fedin wrote:
> Hello!
>
> > The issue is similar to what you have noticed.
>
> In this case it's probably not your fault.
>
> > The larger the number of smp cores it is more likely that the boot will
> get stuck.
> > I've commuted this patch series as an RFC becau
On 7 May 2015 at 12:44, Adrian Huang wrote:
> Consider the following pseudo code to configure SYSTICK (The
> recommended programming sequence from "the definitive guide to the
> arm cortex-m3"):
> SYSTICK Reload Value Register = 0x
> SYSTICK Current Value Register = 0
> SYSTICK Con
[ Cc: qemu-block ]
Am 30.04.2015 um 16:03 hat Keith Busch geschrieben:
> On Thu, 30 Apr 2015, Christoph Hellwig wrote:
> >The SCSI emulation in the Linux NVMe driver really wants to know
> >if a device has a volatile write cache. Given that qemu has moved
> >away from a model where we report the
On 6 May 2015 at 23:50, Peter Crosthwaite wrote:
> Rename some A57 CP register variables in preparation for support for
> Cortex A53. Use "a57_a53" to describe the shareable features. Some of
> the CP15 registers (such as ACTLR) are specific to implementation, but
> we currently just RAZ them so c
On 6 May 2015 at 23:50, Peter Crosthwaite wrote:
> Add the ARM cortex A53 processor definition. Similar to A57, but with
> different L1 I cache policy, phys addr size and different cache
> geometries. The cache sizes is implementation configurable, but use
> these values (from Xilinx Zynq MPSoC) a
On 07/05/2015 15:20, Kevin Wolf wrote:
> > Does ENOSPC over LVM (dm-linear) work at all, and who generates the
> > ENOSPC there?
>
> The LVM use case is what oVirt uses, so I'm pretty sure that it works.
> I'm now sure who generates the ENOSPC, but it's not qemu anyway. If I
> had to guess, I'd s
On 6 May 2015 at 23:50, Peter Crosthwaite wrote:
> GIC generally uses a 4k memory region for the various subregions, such
> as GICC, GICD, GICV and GICH. Macroify this number in the publicly
> visible header.
> +#define ARM_GIC_REGION_SIZE 0x1000
I don't think it makes sense to have a single c
On 6 May 2015 at 23:50, Peter Crosthwaite wrote:
> Add the GIC and connect IRQ outputs to the CPUs. The GIC regions are
> under-decoded through a 64k address region so implement aliases
> accordingly.
> +assert(ARRAY_SIZE(xlnx_zynqmp_gic_regions) == XLNX_ZYNQMP_GIC_REGIONS);
> +for (i = 0
I found a relevant Fedora bug here:
https://bugzilla.redhat.com/show_bug.cgi?id=817700
** Bug watch removed: Red Hat Bugzilla #1058173
https://bugzilla.redhat.com/show_bug.cgi?id=1058173
** Bug watch added: Red Hat Bugzilla #817700
https://bugzilla.redhat.com/show_bug.cgi?id=817700
--
You
Am 07.05.2015 um 15:55 hat Paolo Bonzini geschrieben:
>
>
> On 07/05/2015 15:20, Kevin Wolf wrote:
> > > Does ENOSPC over LVM (dm-linear) work at all, and who generates the
> > > ENOSPC there?
> >
> > The LVM use case is what oVirt uses, so I'm pretty sure that it works.
> > I'm now sure who gene
On 6 May 2015 at 23:50, Peter Crosthwaite wrote:
> Hi Peter and all,
>
> Xilinx's next gen SoC has been announced. This series adds a SoC and
> board.
>
> Series start with addition of ARM cortex A53 support (P1 and P2). The
> Soc skeleton is then added with GIC, EMACs and UARTs added. The
> pre-e
Consider the following pseudo code to configure SYSTICK (The
recommended programming sequence from "the definitive guide to the
arm cortex-m3"):
SYSTICK Reload Value Register = 0x
SYSTICK Current Value Register = 0
SYSTICK Control and Status Register = 0x7
The pseudo code "SYSTICK
Hi,
I just want to introduce myseld. Iam David from Germany and hope i can
ask some development specific questions and this is the right place.What
is my best starting point getting familar with the networking code and
is there any useful, technicall documentation out there?
Iam espacially i
* Paolo Bonzini (pbonz...@redhat.com) wrote:
>
>
> On 15/04/2015 11:26, Liang Li wrote:
> > +if (ret != RAM_SAVE_CONTROL_NOT_SUPP) {
> > +if (ret != RAM_SAVE_CONTROL_DELAYED) {
> > +if (bytes_xmit > 0) {
> > +acct_info.norm_pages++;
>
> I don't think you c
On 07/05/2015 16:07, Kevin Wolf wrote:
> This is not right for two reasons: The first is that this is
> BlockBackend code
I think it would take effect for the qemu-nbd case though.
> and it wouldn't even take effect for the qcow2 case
> where we're writing past EOF only on the protocol layer. T
On 07/05/2015 16:13, Dr. David Alan Gilbert wrote:
>> > Perhaps you can add a counter to the CompressParam struct, and sum all
>> > counters in norm_mig_pages_transferred/norm_mig_bytes_transferred (the
>> > latter probably should just call norm_mig_pages_transferred)?
> The 'ram_save_compressed_
Public bug reported:
Hello,
I tried running a guest with vdagent which is supposed to resize the
guest screen to match client window size.
However, a special serial port needs to be created for the vdagent to
communicate with the client.
This patch adds a short note to the vga qxl option.
** A
The qxl display and vdagent running in guest do just this.
Unfortunately, the options needed in qemu command line to make vdagent
work with the spice client do not seem to be documented anywhere.
see bug 1452742
--
You received this bug notification because you are a member of qemu-
devel-ml, w
Am 07.05.2015 um 16:16 hat Paolo Bonzini geschrieben:
>
>
> On 07/05/2015 16:07, Kevin Wolf wrote:
> > This is not right for two reasons: The first is that this is
> > BlockBackend code
>
> I think it would take effect for the qemu-nbd case though.
Oh, you want to change the server code rather
On 05/07/2015 02:36 AM, Pavel Fedin wrote:
> Hello!
>
>> Yes. qemu-system-aarch64 -cpu cortex-a15 gets you a 32-bit Cortex-A15. This
>> is
>> exactly like the x86 QEMU, where you can emulate all the 32-bit x86 CPUs in
>> qemu-system-x86_64.
>
> And what is the default in x86_64 ? I believe it'
On 7 May 2015 at 11:46, Pavel Fedin wrote:
> Hello!
>
> This is updated version of my eventfd for virtio-mmio patch. Style notes
> have been considered, hopefully it's OK now.
> It's now 3 parts instead of 4, because the last one was actually a small
> fix, i decided to merge it with no 3.
Whe
On 05/07/2015 06:45 AM, Peter Maydell wrote:
> Fails to build on win32:
>
> LINK arm-softmmu/qemu-system-arm.exe
> arch_init.o: In function `do_compress_ram_page':
> /home/petmay01/linaro/qemu-for-merges/arch_init.c:879: undefined
> reference to `___sync_fetch_and_add_8'
> collect2: ld returne
On 07/05/2015 16:34, Kevin Wolf wrote:
> Am 07.05.2015 um 16:16 hat Paolo Bonzini geschrieben:
>>
>>
>> On 07/05/2015 16:07, Kevin Wolf wrote:
>>> This is not right for two reasons: The first is that this is
>>> BlockBackend code
>>
>> I think it would take effect for the qemu-nbd case though.
>
On Thu, May 7, 2015 at 1:20 PM, Christoffer Dall
wrote:
> On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
>> On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
>> wrote:
>> > Hi Jérémy,
>> >
>> > On Tue, May 05, 2015 at 11:13:11AM +0200, Jérémy Fanguède wrote:
>> >> To maintain cac
On Wed, Apr 22, 2015 at 08:04:44PM -0400, John Snow wrote:
> +static void block_dirty_bitmap_clear_prepare(BlkTransactionState *common,
> + Error **errp)
> +{
> +BlockDirtyBitmapState *state = DO_UPCAST(BlockDirtyBitmapState,
> +
On 07/05/2015 16:43, Eric Blake wrote:
>
> I wonder if include/qemu/atomic.h could enhance the #define wrappers to
> add no-op compile-time checking, something like (untested):
>
> #define atomic_add(ptr, n) do { \
> QEMU_BUILD_BUG_ON(sizeof(ptr) > sizeof(void*)); \
> __sync_fetch_and_add(p
On 05/06/2015 07:39 AM, Alberto Garcia wrote:
> The current algorithm to evict entries from the cache gives always
> preference to those in the lowest positions. As the size of the cache
> increases, the chances of the later elements of being removed decrease
> exponentially.
>
> In a scenario wit
On Thu 07 May 2015 04:55:21 PM CEST, Eric Blake wrote:
>> /* Give the table some hits for the start so that it won't be replaced
>> * immediately. The number 32 is completely arbitrary. */
>> -c->entries[i].cache_hits = 32;
>> c->entries[i].offset = offset;
>
> The comment is n
On Thu, May 07, 2015 at 09:55:45AM +0200, Michael Mueller wrote:
> On Wed, 6 May 2015 08:41:50 -0300
> Eduardo Habkost wrote:
[...]
> > > > > diff --git a/qom/cpu.c b/qom/cpu.c
> > > > > index 108bfa2..457afc7 100644
> > > > > --- a/qom/cpu.c
> > > > > +++ b/qom/cpu.c
> > > > > @@ -67,6 +67,20 @@
On 05/06/2015 10:04 PM, Zhe Qiu wrote:
> From: phoeagon
>
> In reference to
> b0ad5a455d7e5352d4c86ba945112011dbeadfb8~078a458e077d6b0db262c4b05fee51d01de2d1d2,
> metadata writes to qcow2/cow/qcow/vpc/vmdk are all synced prior to
> succeeding writes.
>
Please wrap commit comments to be under
Label the "size" and "offset" fields in BLOCK_IMAGE_CORRUPTED as
optional, and clarify that the latter refers to the host's offset into
the image.
Signed-off-by: Alberto Garcia
---
docs/qmp/qmp-events.txt | 5 +++--
qapi/block-core.json| 2 +-
2 files changed, 4 insertions(+), 3 deletions(-)
On May 7, 2015, at 2:47 AM, Michael Tokarev wrote:
> 07.05.2015 09:12, Michael Tokarev wrote:
>> 07.05.2015 04:11, G 3 wrote:
>>> Did you boot Windows XP to the desktop? I have tested Windows 95, Windows
>>> 2000, and Windows XP. All of them fail to boot to the desktop.
>>
>> Yes, booted to des
On 05/07/2015 08:22 AM, Peter Maydell wrote:
> On 10 March 2015 at 17:45, Peter Maydell wrote:
>> On 10 March 2015 at 17:43, John Snow wrote:
>>> Wasn't aware we were actually going through with that; it had looked
>>> like we were going to refrain from fiddling with it because we found
>>> a w
In reference to b0ad5a45...078a458e, metadata writes to
qcow2/cow/qcow/vpc/vmdk are all synced prior to succeeding writes.
Only when write is successful that bdrv_flush is called.
Signed-off-by: Zhe Qiu
---
block/vdi.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/block/vdi.c b/block/
This is consistent with the handling of writes.
Signed-off-by: Paolo Bonzini
---
nbd.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/nbd.c b/nbd.c
index cb1b9bb..eea8c51 100644
--- a/nbd.c
+++ b/nbd.c
@@ -1325,6 +1325,12 @@ static void nbd_trip(void *opaque)
break;
case
Right now, NBD includes potentially platform-specific error values in
the wire protocol.
Luckily, most common error values are more or less universal: in
particular, of all errno values <= 34 (up to ERANGE), they are all
the same on supported platforms except for 11 (which is EAGAIN on
Windows and
On Thu, May 07, 2015 at 03:05:45PM +0530, Bharata B Rao wrote:
> On Wed, Mar 18, 2015 at 11:50:04AM +0530, Bharata B Rao wrote:
> > On Tue, Mar 17, 2015 at 11:56:04AM +0100, Andreas Färber wrote:
> > > Am 17.03.2015 um 09:39 schrieb Bharata B Rao:
> > > > On Tue, Mar 17, 2015 at 07:56:41AM +0100, A
On Thu, May 7, 2015 at 4:50 PM, Jérémy Fanguède
wrote:
> On Thu, May 7, 2015 at 1:20 PM, Christoffer Dall
> wrote:
>> On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
>>> On Wed, May 6, 2015 at 4:12 PM, Christoffer Dall
>>> wrote:
>>> > Hi Jérémy,
>>> >
>>> > On Tue, May 05, 2015
On 7 May 2015 at 10:29, Shannon Zhao wrote:
> From: Shannon Zhao
>
> Introduce a preliminary framework in virt-acpi-build.c with the main
> ACPI build functions. It exposes the generated ACPI contents to
> guest over fw_cfg.
>
> The required ACPI v5.1 tables for ARM are:
> - RSDP: Initial table t
This is the behavior in the operating system, for example Linux's
blkdev_write_iter has the following:
if (bdev_read_only(I_BDEV(bd_inode)))
return -EPERM;
This does not apply to opening a device for read/write, when the
device only supports read-only operation. In this c
On 7 May 2015 at 10:29, Shannon Zhao wrote:
> From: Shannon Zhao
>
> Add aml_interrupt() for describing device interrupt in resource template.
> These can be used to generating DSDT table for ACPI on ARM.
> +/* Interrupt Number */
> +build_append_byte(var->buf, extract32(irq, 0, 8)); /*
On 7 May 2015 at 10:29, Shannon Zhao wrote:
> From: Shannon Zhao
>
> Expose the needed device information to the table generation
> insfrastructure and register a machine_init_done notify to
"infrastructure".
> call virt_acpi_build().
>
> Add CONFIG_ACPI to arm-softmmu.mak.
>
> Signed-off-by: S
On 07/05/2015 14:02, Peter Maydell wrote:
>> +static int add_semihosting_arg(const char *name, const char *val, void
>> *opaque)
>> +{
>> +SemihostingConfig *s = opaque;
>> +if (strcmp(name, "arg") == 0) {
>> +s->argc++;
>> +s->argv = g_realloc(s->argv, s->argc * sizeof(voi
On 7 May 2015 at 10:29, Shannon Zhao wrote:
> From: Shannon Zhao
>
> This patch series generate seven ACPI tables for machine virt on ARM.
> The set of generated tables are:
> - RSDP
> - RSDT
> - MADT
> - GTDT
> - FADT
> - DSDT
> - MCFG (For PCIe host bridge)
>
> These tables are created dynamica
7e9b2b17:
Merge remote-tracking branch 'remotes/rth/tags/tcg-next-20150505' into
staging (2015-05-06 11:16:35 +0100)
are available in the git repository at:
git://github.com/juanquintela/qemu.git tags/migration/20150507-1
for you to fetch changes up to 362ba4e3ee801e8f5e28d72d
From: Liang Li
Give some details about the multiple thread (de)compression and
how to use it in live migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
docs/multi-thread-compression.txt
From: Liang Li
Add the code to create and destroy the multiple threads those will
be used to do data compression. Left some functions empty to keep
clearness, and the code will be added later.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Ju
From: Liang Li
Split the function save_zero_page from ram_save_page so that we can
reuse it later.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
arch_init.c | 61 +++--
1
From: Liang Li
Add the code to create and destroy the multiple threads those will be
used to do data decompression. Left some functions empty just to keep
clearness, and the code will be added later.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed
From: Liang Li
qemu_put_compression_data() compress the data and put it to QEMUFile.
qemu_put_qemu_file() put the data in the buffer of source QEMUFile to
destination QEMUFile.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
incl
From: Liang Li
Now, multiple thread compression can co-work with xbzrle. when
xbzrle is on, multiple thread compression will only work at the
first round of RAM data sync.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Signed-off-by: Juan Quintela
---
a
From: Liang Li
Define the data structure and variables used to do multiple thread
compression, and add the code to initialize and free them.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
arch
From: Liang Li
Add the qmp commands to tune and query the parameters used in live
migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
migration/migration.c | 56 ++
qapi-schema.json | 45 ++
From: Liang Li
Implement the core logic of the multiple thread compression. At this
point, multiple thread compression can't co-work with xbzrle yet.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
arch_init.c | 185 +
From: Liang Li
The multiple compression threads can be turned on/off through
qmp and hmp interface before doing live migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Eric Blake
Signed-off-by: Juan Quintela
---
migration/migration.
From: Liang Li
Define the data structure and variables used to do multiple thread
decompression, and add the code to initialize and free them.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Reviewed-by: Dr.David Alan Gilbert
Reviewed-by: Juan Quintela
Signed-off-by: Juan Quintela
---
ar
From: Liang Li
Implement the core logic of multiple thread decompression,
the decompression can work now.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
arch_init.c | 50 --
1 file changed, 48 insertions(+),
From: Liang Li
Put the three parameters related to multiple thread (de)compression
into an int array, and use an enum type to index the parameter.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
include/migration/migration.h | 4 +---
migration/migration.c
From: Michael Chapman
This bug manifested itself as a VM that could not be resumed by libvirt
following a migration:
# virsh resume example
error: Failed to resume domain example
error: internal error: cannot parse json {"return":
{"xbzrle-cache":
{..., "cache-miss-rate": -nan, .
From: Liang Li
If live migration is very fast and can be completed in 1 second,
the dirty_sync_count of MigrationState will not be updated.
Then you will see "dirty sync count: 0" in qemu monitor even if
the actual dirty sync count is not 0.
Signed-off-by: Liang Li
Reviewed-by: Juan Quintela
R
From: Liang Li
Add the hmp interface to tune and query the parameters used in
live migration.
Signed-off-by: Liang Li
Signed-off-by: Yang Zhang
Signed-off-by: Juan Quintela
---
hmp-commands.hx | 17 +++
hmp.c | 65
On Thu, May 7, 2015 at 5:34 PM, Christoffer Dall
wrote:
> On Thu, May 7, 2015 at 4:50 PM, Jérémy Fanguède
> wrote:
>> On Thu, May 7, 2015 at 1:20 PM, Christoffer Dall
>> wrote:
>>> On Thu, May 07, 2015 at 12:50:50PM +0200, Jérémy Fanguède wrote:
On Wed, May 6, 2015 at 4:12 PM, Christoffer D
On 05/07/2015 09:26 AM, Paolo Bonzini wrote:
> Right now, NBD includes potentially platform-specific error values in
> the wire protocol.
>
> Luckily, most common error values are more or less universal: in
> particular, of all errno values <= 34 (up to ERANGE), they are all
> the same on supporte
On 07/05/2015 18:56, Jérémy Fanguède wrote:
> USB devices fail with a timeout error, as if the communication between
> the kernel and the devices fail at a certain point:
> usb 1-1: device not accepting address 5, error -110
> usb usb1-port1: unable to enumerate USB device
>
> e1000 fails when t
On 07/05/2015 19:01, Eric Blake wrote:
>> >
>> > +/* NBD errors should be universally equal to the corresponding
>> > + * errno values, check it here.
>> > + */
>> > +QEMU_BUILD_BUG_ON(EPERM != 1);
> And this is (probably not the first place) where qemu compilation would
> fail
On 05/07/2015 08:58 AM, Alberto Garcia wrote:
> Label the "size" and "offset" fields in BLOCK_IMAGE_CORRUPTED as
> optional, and clarify that the latter refers to the host's offset into
> the image.
>
> Signed-off-by: Alberto Garcia
> ---
> docs/qmp/qmp-events.txt | 5 +++--
> qapi/block-core.js
On 05/06/2015 08:38 AM, Alvise Rigo wrote:
> The purpose of this new bitmap is to flag the memory pages that are in
> the middle of LL/SC operations (after a LL, before a SC).
> For all these pages, the corresponding TLB entries will be generated
> in such a way to force the slow-path.
>
> The acc
On 07/05/2015 18:46, Juan Quintela wrote:
> static CompressParam *comp_param;
> static QemuThread *compress_threads;
> +/* comp_done_cond is used to wake up the migration thread when
> + * one of the compression threads has finished the compression.
> + * comp_done_lock is used to co-work with
On 05/07/2015 10:54 AM, Stefan Hajnoczi wrote:
> On Wed, Apr 22, 2015 at 08:04:44PM -0400, John Snow wrote:
>> +static void block_dirty_bitmap_clear_prepare(BlkTransactionState
>> *common, + Error
>> **errp) +{ +BlockDirtyBitmapState *state =
>> DO_
On 05/06/2015 08:38 AM, Alvise Rigo wrote:
> Add a new flag for the TLB entries to force all the accesses made to a
> page to follow the slow-path.
>
> Mark the accessed page as dirty to invalidate any pending operation of
> LL/SC.
>
> Suggested-by: Jani Kokkonen
> Suggested-by: Claudio Fontana
On Mon, 4 May 2015, Quan Xu wrote:
> This patch adds infrastructure for xen front drivers living in qemu,
> so drivers don't need to implement common stuff on their own. It's
> mostly xenbus management stuff: some functions to access XenStore,
> setting up XenStore watches, callbacks on device dis
Instead of converting each byte one-at-a-time and then sending each byte
over the wire, use sprintf() to pre-compute all of the hex nibs into a
single buffer, then send the entire buffer all at once.
This gives a moderate speed boost to memread() and memwrite() functions.
Signed-off-by: John Snow
This patch requires (as context only) patches 1,2
(but excluding patch 4) from:
Message-id: 1430864578-22072-1-git-send-email-js...@redhat.com
[PATCH v3 0/5] qtest: base64 r/w and faster memset
Or, alternatively, use the github mirrors below.
==
For convenience, this branch is available at:
https
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