On 31 October 2014 17:25, Paolo Bonzini wrote:
> The following changes since commit 4239e2dc018c0defdbad35d387051ca2b208889d:
>
> Merge remote-tracking branch
> 'remotes/kraxel/tags/pull-cve-2014-3689-20141029-1' into staging (2014-10-30
> 19:11:25 +)
>
> are available in the git repositor
On 27.10.14 17:25, Aurelien Jarno wrote:
> This patch simplifies the AES code, by directly accessing the newly added
> S-Box, InvS-Box tables instead of recreating them by using the AES_Te and
> AES_Td tables.
>
> Cc: Alexander Graf
> Cc: Paolo Bonzini
> Signed-off-by: Aurelien Jarno
Thanks,
On 31 October 2014 09:18, Peter Maydell wrote:
> On 30 October 2014 21:28, Greg Bellows wrote:
> > From: Fabian Aggeler
> >
> > bits when modifying CPSR.
>
> I prefer it if we don't continue sentences from the subject
> line into the main commit message body like this, it makes
> them rather od
On 11/03/2014 03:53 PM, Alexander Graf wrote:
>
>
> On 27.10.14 11:23, Cédric Le Goater wrote:
>> Currently, when the page tables are saved, the kvm_get_htab_header structs
>> and the ptes are assumed being big endian and dumped as a indistinct blob
>> in the statefile. This is no longer true w
On 3 November 2014 08:11, SeokYeon Hwang wrote:
> Marked map_exec() with the 'unused' attribute to avoid '-Wunused-function' on
> clang 3.4 or later.
>
> Signed-off-by: SeokYeon Hwang
> ---
> translate-all.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/translate-
On 29.10.14 06:37, Antony Pavlov wrote:
> Running barebox on qemu-system-mips* with '-d unimp' overloads
> stderr by very very many mips_cpu_handle_mmu_fault() messages:
>
> mips_cpu_handle_mmu_fault address=b80003fd ret 0 physical 180003fd
> prot 3
> mips_cpu_handle_mmu_fault addre
On 3 November 2014 14:27, Michael Tokarev wrote:
> I usually reluctant to add these unused attributes and shut up other
> warnings by force, because with time this cruft does not help, and
> more and more code becomes "forgotten". If it is not needed for
> windows, why add it?
You could equally
On Mon, Nov 03, 2014 at 11:25:10AM +0100, Kevin Wolf wrote:
> Am 03.11.2014 um 09:54 hat Markus Armbruster geschrieben:
> > Kevin Wolf writes:
> >
> > > Am 31.10.2014 um 12:24 hat Stefan Hajnoczi geschrieben:
> > >> On Thu, Oct 30, 2014 at 10:36:35AM +0100, Kevin Wolf wrote:
> > >> > Am 30.10.201
"Michael S. Tsirkin" writes:
> tcp_get_fds API discards fds if there's more than 1 of these.
s/tcp_get_fds/tcp_get_msgfds/ (subject as well)
What exactly doesn't work without this patch?
> It's tricky to fix this without API changes in the generic case.
>
> However, this API is only used by te
On 03.11.14 15:56, Cedric Le Goater wrote:
> On 11/03/2014 03:53 PM, Alexander Graf wrote:
>>
>>
>> On 27.10.14 11:23, Cédric Le Goater wrote:
>>> Currently, when the page tables are saved, the kvm_get_htab_header structs
>>> and the ptes are assumed being big endian and dumped as a indistinct b
On 2014-11-03 at 16:05, Stefan Hajnoczi wrote:
On Mon, Nov 03, 2014 at 11:25:10AM +0100, Kevin Wolf wrote:
Am 03.11.2014 um 09:54 hat Markus Armbruster geschrieben:
Kevin Wolf writes:
Am 31.10.2014 um 12:24 hat Stefan Hajnoczi geschrieben:
On Thu, Oct 30, 2014 at 10:36:35AM +0100, Kevin Wol
On Sat, Nov 01, 2014 at 01:56:08PM -0200, Eduardo Habkost wrote:
> This fixes the following crashes:
>
>$ qemu-system-x86_64 -device x86_64-cpu,help
>**
>ERROR:qom/object.c:336:object_initialize_with_type: assertion failed:
> (type->abstract == false)
>Aborted (core dumped)
>$
Currently, when the page tables are saved, the kvm_get_htab_header structs
and the ptes are assumed being big endian and dumped as a indistinct blob
in the statefile. This is no longer true when the host is little endian
and this breaks restoration.
This patch unfolds the kvmppc_save_htab routi
On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
> "Michael S. Tsirkin" writes:
>
> > tcp_get_fds API discards fds if there's more than 1 of these.
>
> s/tcp_get_fds/tcp_get_msgfds/ (subject as well)
Right. Too late as I sent this upstream :(
> What exactly doesn't work witho
On Wed, 29 Oct 2014 09:42:09 +0100
Cédric Le Goater wrote:
> When the guest and the host have a different endian order, the data
> being accessed in the vring queues needs to be byteswapped.
>
> This patch adds a VHOST_VRING_F_BYTESWAP flag to inform the vhost
> kernel backend to byteswap vrin
zhanghailiang writes:
> On 2014/11/3 18:03, Michael Tokarev wrote:
>> 03.11.2014 12:44, zhanghailiang wrote:
>>> Patch 1~3 fix wrong check about in-parameter.
>>> The last two patches convert some open functions to use Error API.
>>>
>>> v2:
>>> - don't use error_setg when followed by exit(), it
Hi Tim,
I am still in the process of getting the security extension portion of the
GIC patches fully up and running. By the sounds of your use, it sounds
like you just want FIQ support not necessarily secure GIC support. Would
this be correct?
I recently sent out an updated set of patches for r
On Fri, 31 Oct 2014 11:06:15 -0500
Tom Musta wrote:
> Correct the opcodes for the vrfim, vrfin and vrfiz instructions.
>
> Signed-off-by: Tom Musta
> ---
> target-ppc/translate.c | 12 ++--
> 1 files changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/target-ppc/translate.c b/
Hi
I am currently wetting my toes with qemu. I have written a small test hw
device which creates interrupts and has some registers on a arm vexpress
platform. Now i would like to switch the interrupt of the hw to FIQ mode.
I noticed that the mainline qemu does not seem to have FIQ emulation but
Marcel Apfelbaum writes:
> On Mon, 2014-11-03 at 14:40 +0100, Markus Armbruster wrote:
>> Marcel Apfelbaum writes:
>>
>> > On Mon, 2014-11-03 at 13:03 +0100, Markus Armbruster wrote:
>> >> Marcel Apfelbaum writes:
>> >>
>> >> > Hot-plugging a device that has a romfile (either supplied by user
On 03 Nov 2014, at 5:12 , David Gibson wrote:
> On Fri, Oct 03, 2014 at 06:47:18PM +0100, Dr. David Alan Gilbert (git) wrote:
>> From: Cristian Klein
>
> This patch really, really requires a rationale in the commit message.
> The reason it's necessary is certainly not obvious.
“”"
libvirt pref
"Michael S. Tsirkin" writes:
> On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
>> "Michael S. Tsirkin" writes:
>>
>> > tcp_get_fds API discards fds if there's more than 1 of these.
>>
>> s/tcp_get_fds/tcp_get_msgfds/ (subject as well)
>
> Right. Too late as I sent this upstr
On 02/11/2014 18:21, Jun Li wrote:
> Currently when *obj is not a TYPE_DEVICE, qemu will abort. This patch just
> fixed it. When *obj is not a TYPE_DEVICE, just do not add it to hotpluggable
> device list.
>
> This patch also fixed the following issue:
> 1, boot qemu using cli:
> virtio-scsi-pci
On Mon, 2014-11-03 at 16:54 +0100, Markus Armbruster wrote:
> Marcel Apfelbaum writes:
>
> > On Mon, 2014-11-03 at 14:40 +0100, Markus Armbruster wrote:
> >> Marcel Apfelbaum writes:
> >>
> >> > On Mon, 2014-11-03 at 13:03 +0100, Markus Armbruster wrote:
> >> >> Marcel Apfelbaum writes:
> >> >
On Mon, Nov 03, 2014 at 04:54:25PM +0100, Markus Armbruster wrote:
> Marcel Apfelbaum writes:
>
> > On Mon, 2014-11-03 at 14:40 +0100, Markus Armbruster wrote:
> >> Marcel Apfelbaum writes:
> >>
> >> > On Mon, 2014-11-03 at 13:03 +0100, Markus Armbruster wrote:
> >> >> Marcel Apfelbaum writes:
)
are available in the git repository at:
git://github.com/lalrae/qemu.git tags/mips-20141103
for you to fetch changes up to 55a2201e79d063766509ed2f2f2e8837b9e1facf:
target-mips: add MSA support to mips32r5-generic (2014-11-03 11:48:35 +
In Revision 3 of the architecture, the RI and XI bits were added to the TLB
to enable more secure access of memory pages. These bits (along with the Dirty
bit) allow the implementation of read-only, write-only, no-execute access
policies for mapped pages.
Signed-off-by: Leon Alrae
Reviewed-by: Yo
Signed-off-by: Leon Alrae
Reviewed-by: Yongbok Kim
---
target-mips/helper.c | 21 ++---
1 file changed, 10 insertions(+), 11 deletions(-)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index fe16820..1c9e69d 100644
--- a/target-mips/helper.c
+++ b/target-mips/helper.c
KScratch Registers (CP0 Register 31, Selects 2 to 7)
The KScratch registers are read/write registers available for scratch pad
storage by kernel mode software. They are 32-bits in width for 32-bit
processors and 64-bits for 64-bit processors.
CP0Config4.KScrExist[2:7] bits indicate presence of CP
New MIPS features depend on the access type and enum is more convenient than
using the numbers directly.
Signed-off-by: Leon Alrae
Reviewed-by: Thomas Huth
---
include/exec/cpu-common.h | 6 ++
softmmu_template.h| 26 --
2 files changed, 22 insertions(+), 10
Signed-off-by: Leon Alrae
Reviewed-by: Yongbok Kim
---
target-mips/cpu.h | 2 +-
target-mips/machine.c | 26 +-
2 files changed, 26 insertions(+), 2 deletions(-)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 4687f4f..c66a725 100644
--- a/target-mips/cpu.h
Signed-off-by: Leon Alrae
Reviewed-by: Yongbok Kim
---
target-mips/cpu.h | 3 ++-
1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/target-mips/cpu.h b/target-mips/cpu.h
index 6367d8c..3b975eb 100644
--- a/target-mips/cpu.h
+++ b/target-mips/cpu.h
@@ -790,7 +790,8 @@ static inline voi
An Execute-Inhibit exception occurs when the virtual address of an instruction
fetch matches a TLB entry whose XI bit is set. This exception type can only
occur if the XI bit is implemented within the TLB and is enabled, this is
denoted by the PageGrain XIE bit.
An Read-Inhibit exception occurs wh
PageGrain needs rw bitmask which differs between MIPS architectures.
In pre-R6 if RIXI is supported, PageGrain.XIE and PageGrain.RIE are writeable,
whereas in R6 they are read-only 1.
On MIPS64 mtc0 instruction left shifts bits 31:30 for MIPS32 backward
compatiblity, therefore there are separate m
SDBBP instruction Reserved Instruction control. The purpose of this field is
to restrict availability of SDBBP to kernel mode operation.
If the bit is set then SDBBP instruction can only be executed in kernel mode.
User execution of SDBBP will cause a Reserved Instruction exception.
Additionally
From: Yongbok Kim
add MSA exceptions
Reviewed-by: James Hogan
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/target-mips/helper.c b/target-mips/helper.c
index c92b25c..3a93c20 100644
--- a/target-m
From: Yongbok Kim
add MSA I8 format instructions
Reviewed-by: James Hogan
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 10 ++
target-mips/msa_helper.c | 66 ++
target-mips/translate.c | 82 +++
BadInstr Register (CP0 Register 8, Select 1)
The BadInstr register is a read-only register that capture the most recent
instruction which caused an exception.
BadInstrP Register (CP0 Register 8, Select 2)
The BadInstrP register contains the prior branch instruction, when the
faulting instruction i
In Release 6 not all the values are allowed to be written to a register.
If the value is not valid or unsupported then it should stay unchanged.
For pre-R6 the existing behaviour has been changed only for CP0_Index register
as the current implementation does not seem to be correct - it looks like
From: Yongbok Kim
add msa_helper.c
Reviewed-by: James Hogan
Reviewed-by: Leon Alrae
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/Makefile.objs | 2 +-
target-mips/msa_helper.c | 49 +++
2 files changed, 50 insertions(+),
From: Yongbok Kim
add MSA I5 format instructions
Signed-off-by: Yongbok Kim
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 13 +
target-mips/msa_helper.c | 142 +++
target-mips/translate.c | 77 +
For Standard TLB configuration (Config.MT=1):
TLBINV invalidates a set of TLB entries based on ASID. The virtual address is
ignored in the entry match. TLB entries which have their G bit set to 1 are not
modified.
TLBINVF causes all entries to be invalidated.
Single TLB entry can be marked as in
Signed-off-by: Leon Alrae
Reviewed-by: Yongbok Kim
---
target-mips/translate_init.c | 11 +--
1 file changed, 9 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mips/translate_init.c
index bcfc46a..0b70d05 100644
--- a/target-mips/translate_init.c
+++ b/t
From: Yongbok Kim
add MSA branch instructions
Reviewed-by: James Hogan
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 334 +++-
1 file changed, 220 insertions(+), 114 deletions(-)
diff --git a/target-mips/transl
When conditional compact branch is encountered decode one more instruction in
current translation block - that will be forbidden slot. Instruction in
forbidden slot will be executed only if conditional compact branch is not taken.
Any control transfer instruction (CTI) which are branches, jumps, E
From: Yongbok Kim
add MSA ELM format instructions
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 10 +++
target-mips/msa_helper.c | 162 +++
target-mips/translate.c | 118 ++
3 f
Release 6 limits the number of cases where software can cause UNDEFINED or
UNPREDICTABLE behaviour. In this case, when accessing reserved / unimplemented
CP0 register, writes are ignored and reads return 0.
In pre-R6 the behaviour is not specified, but generating RI exception is not
what the real
From: Yongbok Kim
add defines and data structure for MIPS SIMD Architecture
Reviewed-by: James Hogan
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/cpu.h | 52 +++--
target-mips/mips-defs.h | 1 +
target-mips/op_helper.
From: Yongbok Kim
add MSA MI10 format instructions
update LSA and DLSA for MSA
add 16, 64 bit load and store
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h| 3 ++
target-mips/op_helper.c | 84 ++---
target-mips/t
From: Yongbok Kim
add MSA opcode enum
Reviewed-by: James Hogan
Reviewed-by: Leon Alrae
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 245
1 file changed, 245 insertions(+)
diff --git a/target-mips/transla
From: Yongbok Kim
Remove the duplicated ieee_rm in gdbstub.c.
Make the other ieee_rm and ieee_ex_to_mips available to other files.
Reviewed-by: James Hogan
Reviewed-by: Leon Alrae
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/cpu.h | 4
target-mips/gdbstub.
From: Yongbok Kim
add MSA 3RF format instructions
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 42 ++
target-mips/msa_helper.c | 1494 ++
target-mips/translate.c | 163 +
3 files changed, 1699 insertion
From: Yongbok Kim
stop translation as ctc1 instruction can change hflags
Reviewed-by: James Hogan
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 6 ++
1 file changed, 6 insertions(+)
diff --git a/target-mips/translate.c b/target-mips/translate.c
index
From: Yongbok Kim
add MSA BIT format instructions
Reviewed-by: Leon Alrae
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 13
target-mips/msa_helper.c | 196 +++
target-mips/translate.c | 88 +
On 31/10/2014 05:52, SeokYeon Hwang wrote:
> To fix compiler warning on clang > 3.4, changed to proper enum type.
>
> Signed-off-by: SeokYeon Hwang
> ---
> block.c | 6 +++---
> 1 file changed, 3 insertions(+), 3 deletions(-)
>
> diff --git a/block.c b/block.c
> index 88f6d9b..50845a4 100644
>
From: Yongbok Kim
add MSA VEC/2R format instructions
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 12
target-mips/msa_helper.c | 140 +++
target-mips/translate.c | 113 +++
From: Yongbok Kim
add msa_reset() and global msa register (d type only)
Reviewed-by: James Hogan
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/translate.c | 56
target-mips/translate_init.c | 34
On 31/10/2014 05:57, SeokYeon Hwang wrote:
> Explicit casting to 'ram_addr_t' in order to avoid "-Wconstant-conversion" on
> clang 3.4 or later.
>
> Signed-off-by: SeokYeon Hwang
> ---
> hw/i386/smbios.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/i386/smbios.c
From: Yongbok Kim
add MSA 3R format instructions
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 64 +
target-mips/msa_helper.c | 657 +++
target-mips/translate.c | 242 +
3 files changed, 96
From: Yongbok Kim
add MSA 2RF format instructions
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
target-mips/helper.h | 17 ++
target-mips/msa_helper.c | 530 +++
target-mips/translate.c | 74 +++
3 files changed, 621 insertions
I don't think however that we can claim this is notabug. Based on the
Description, the kvm modules appears to be loaded and enabled, per kvm-ok
output. You shouldn't be getting the
KVM internal error. Suberror: 1
emulation failure
that you're getting, and it's not clear to me what part of insta
Hi Greg
Thanks for your fast reply.
> I am still in the process of getting the security extension portion of the
> GIC patches fully up and running. By the sounds of your use, it sounds
> like you just want FIQ support not necessarily secure GIC support. Would
> this be correct?
Yes. More elabor
From: Yongbok Kim
add MSA support to mips32r5-generic core definition
Signed-off-by: Yongbok Kim
Reviewed-by: Leon Alrae
Signed-off-by: Leon Alrae
---
target-mips/translate_init.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/target-mips/translate_init.c b/target-mi
On 3 November 2014 16:13, Markus Armbruster wrote:
> "Michael S. Tsirkin" writes:
>
>> On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
>>> "Michael S. Tsirkin" writes:
>>>
>>> > tcp_get_fds API discards fds if there's more than 1 of these.
>>>
>>> s/tcp_get_fds/tcp_get_msgfds/
From: Yongbok Kim
disassemble MIPS SIMD Architecture instructions
Signed-off-by: Yongbok Kim
Signed-off-by: Leon Alrae
---
disas/mips.c | 716 ++-
1 file changed, 714 insertions(+), 2 deletions(-)
diff --git a/disas/mips.c b/disas/mips.
On Mon, Nov 03, 2014 at 04:22:57PM +, Peter Maydell wrote:
> On 3 November 2014 16:13, Markus Armbruster wrote:
> > "Michael S. Tsirkin" writes:
> >
> >> On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
> >>> "Michael S. Tsirkin" writes:
> >>>
> >>> > tcp_get_fds API discar
"Michael S. Tsirkin" writes:
> On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
>> "Michael S. Tsirkin" writes:
>>
>> > tcp_get_fds API discards fds if there's more than 1 of these.
>>
>> s/tcp_get_fds/tcp_get_msgfds/ (subject as well)
>
> Right. Too late as I sent this upstr
On Mon, Nov 03, 2014 at 05:13:15PM +0100, Markus Armbruster wrote:
> "Michael S. Tsirkin" writes:
>
> > On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
> >> "Michael S. Tsirkin" writes:
> >>
> >> > tcp_get_fds API discards fds if there's more than 1 of these.
> >>
> >> s/tcp
On 31/10/2014 09:02, SeokYeon Hwang wrote:
> Wrapped uuid_unparse() in #ifdef to avoid "-Wunused-function" on clang 3.4 or
> later.
>
> Signed-off-by: SeokYeon Hwang
> ---
> block/vdi.c | 2 ++
> 1 file changed, 2 insertions(+)
>
> diff --git a/block/vdi.c b/block/vdi.c
> index 19701ee..e1d2
On 2 November 2014 11:57, Michael Tokarev wrote:
> Here's an almost 3-week trivial patches pull request.
> Lots of small things here and there, many small bugfixes
> too. This is also a first pull request for which a
> signature should finally be known to others.
>
> Please consider applying/pull
On Mon, Nov 03, 2014 at 04:22:57PM +, Peter Maydell wrote:
> On 3 November 2014 16:13, Markus Armbruster wrote:
> > "Michael S. Tsirkin" writes:
> >
> >> On Mon, Nov 03, 2014 at 04:09:36PM +0100, Markus Armbruster wrote:
> >>> "Michael S. Tsirkin" writes:
> >>>
> >>> > tcp_get_fds API discar
On Mon, 03 Nov 2014 12:51:50 +0100
Paolo Bonzini wrote:
> On 31/10/2014 17:38, Igor Mammedov wrote:
> > check amount of available KVM memory slots after all
> > devices were initialized and exit with error if
> > there isn't enough free memory slots for DIMMs.
> >
> > Signed-off-by: Igor Mammedo
Enter the image header into the metadata list to protect it against
accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/block/qcow2.c b/block/qcow2.c
index f80f9ed..19ac2df 100644
--- a/block/qcow2.c
+++ b/block/qcow2.c
@@ -7
The existing qcow2 metadata overlap detection function used existing
structures to determine the location of the image metadata, from plain
fields such as l1_table_offset and l1_size in the BDRVQcowState, over
image structures in memory such as the L1 table for the L2 tables'
positions, or it even
As has been requested, this series adds new overlap check functions to
the qcow2 code. My local branch is called "qcow2-improved-overlap-v1",
but I am not so sure whether it is actually an improvement; that is left
for you to decide, dear reviewers.
See patch 1 for an explanation of why this serie
Create and destroy the metadata list on creation and destruction of a
qcow2 BDS, respectively. Skip creation if no overlap checks should be
performed.
Signed-off-by: Max Reitz
---
block/qcow2.c | 10 ++
1 file changed, 10 insertions(+)
diff --git a/block/qcow2.c b/block/qcow2.c
index ed
Keep track of the refcount table in the metadata list to protect it
against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-refcount.c | 18 ++
block/qcow2.c | 4
2 files changed, 22 insertions(+)
diff --git a/block/qcow2-refcount.c b/block/qcow
Keep track of the active L2 tables in the metadata list to protect them
against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-cluster.c | 2 ++
block/qcow2-refcount.c | 6 ++
block/qcow2-snapshot.c | 21 +
block/qcow2.c | 8 +++-
4 fi
Keep track of the active L1 table in the metadata list to protect it
against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-cluster.c | 11 +++
block/qcow2-snapshot.c | 10 ++
block/qcow2.c | 4
3 files changed, 25 insertions(+)
diff --git a/b
Keep track of the inactive L1 tables in the metadata list to protect
them against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-snapshot.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/block/qcow2-snapshot.c b/block/qcow2-snapshot.c
index c32
Keep track of the refcount blocks in the metadata list to protect them
against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-refcount.c | 38 +-
1 file changed, 37 insertions(+), 1 deletion(-)
diff --git a/block/qcow2-refcount.c b/block/q
Keep track of the snapshot table in the metadata list to protect it
against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-snapshot.c | 10 ++
block/qcow2.c | 6 ++
2 files changed, 16 insertions(+)
diff --git a/block/qcow2-snapshot.c b/block/qcow2-snap
Make the static new overlap check function global and drop the old
function.
Signed-off-by: Max Reitz
---
block/qcow2-overlap.c | 8 +---
block/qcow2-refcount.c | 120 -
2 files changed, 2 insertions(+), 126 deletions(-)
diff --git a/block/qcow
Keep track of the inactive L2 tables in the metadata list to protect
them against accidental modifications.
Signed-off-by: Max Reitz
---
block/qcow2-refcount.c | 20
block/qcow2-snapshot.c | 41 +++--
2 files changed, 59 insertions(+), 2 d
On 03/11/2014 18:00, Igor Mammedov wrote:
>> > This will always be off by 4 or so due to system RAM and ROM slots. I
>> > think patch 1 is enough.
> The goal of this patch is to prevent starting guest with not supported
> amount of lots requested on CLI with -m slots=too_much, patch 1 won't
> pr
On Mon, 3 Nov 2014 16:29:31 +0100
Cornelia Huck wrote:
> On Wed, 29 Oct 2014 09:42:09 +0100
> Cédric Le Goater wrote:
>
> > When the guest and the host have a different endian order, the data
> > being accessed in the vring queues needs to be byteswapped.
> >
> > This patch adds a VHOST_VRING_
* Igor Mammedov (imamm...@redhat.com) wrote:
> It fixes migration failure for machine type pc-i440fx-1.7 from
> QEMU 1.7/2.0 to QEMU 2.1
>
> Migration fails due to ACPI tables size grows across 1.7-2.1
> versions. That causes ACPI tables ROM blob to change its size
> differently for the same confi
Try to explain why commit 317b0a6d8ba44e9bf8f9c3dbd776c4536843d82c
needed a cpu_clean_all_dirty() call just after calling
cpu_synchronize_all_states().
Signed-off-by: Eduardo Habkost
Cc: Andrey Korolyov
Cc: Marcin Gibuła
Cc: Marcelo Tosatti
Cc: Paolo Bonzini
---
hw/i386/kvm/clock.c | 14
On Fri, Oct 31, 2014 at 7:38 PM, Igor Mammedov wrote:
> Performance wise it's better to align GVA by the backend's
> page size.
>
> Also do not allow to create DIMM device with suboptimal
> size (i.e. not aligned to backends page size) to aviod
> memory loss.
>
> Do above only for 2.2 and newer ma
On 31.10.14 17:39, Tom Musta wrote:
> Fix the implementation of Vector Compare Bounds Single Precision.
> Specifically, fix the case where the operands are unordered -- since
> the result is non-zero, the CR[6] field should be set to zero.
>
> Signed-off-by: Tom Musta
Thanks, applied to ppc-ne
On 29.10.14 16:02, Tom Musta wrote:
> Fix the implementation of the Altivec shift left and shift right
> instructions (vsl, vsr) which erroneously inverts shift direction
> on big endian hosts.
>
> Signed-off-by: Tom Musta
Thanks, applied to ppc-next.
Alex
On 31.10.14 17:06, Tom Musta wrote:
> Correct the opcodes for the vrfim, vrfin and vrfiz instructions.
>
> Signed-off-by: Tom Musta
Thanks, applied to ppc-next.
Alex
On Monday 03 November 2014 17:15:24 Michael Tokarev wrote:
> BTW, I'm not sure `socket address' paraameter is relevant in this context
> at all, -- smbd should not use it in inetd mode. It'd be interesting to
> know why this option is here to start with, and whenever we really need
> the new inter
Pull up the absorption of the qcow2-relevant command line options and
the evaluation of the overlap check options in qcow2_open().
Signed-off-by: Max Reitz
---
block/qcow2.c | 96 +--
1 file changed, 48 insertions(+), 48 deletions(-)
diff
On 2014-11-03 at 18:04, Max Reitz wrote:
As has been requested, this series adds new overlap check functions to
the qcow2 code. My local branch is called "qcow2-improved-overlap-v1",
but I am not so sure whether it is actually an improvement; that is left
for you to decide, dear reviewers.
See p
On Mon, Nov 03, 2014 at 09:48:20PM +0400, Andrey Korolyov wrote:
> On Fri, Oct 31, 2014 at 7:38 PM, Igor Mammedov wrote:
> > Performance wise it's better to align GVA by the backend's
> > page size.
> >
> > Also do not allow to create DIMM device with suboptimal
> > size (i.e. not aligned to backe
are available in the git repository at:
>
> git://github.com/OSLL/qemu-xtensa.git tags/20141103-xtensa
>
> for you to fetch changes up to 437a8c11c06f53ed3bcdcc3e5abc5d20b2d439bd:
>
> MAINTAINERS: update xtensa boards (2014-11-03 01:00:37 +0300)
>
> -
Fix the regression introduced with commit
47934d0aadc075b05ce2d9e8a44fa6a46edd1afa [hw: move ISA bridges and
devices to hw/isa/, configure with default-configs/], by removing
CONFIG_VT82C686 from configurations that previously did not enable it.
That southbridge is only available on Fulong pla
PING for this refactor series, which will allow me to check in more AHCI
tests. To assist review, I'll annotate this cover letter a little bit
with some additional information.
The hardest/ugliest patch to review is the first one, but it is
primarily just variable name/location changes and not
On 3 November 2014 10:22, Tim Sander wrote:
> Hi Greg
>
> Thanks for your fast reply.
> > I am still in the process of getting the security extension portion of
> the
> > GIC patches fully up and running. By the sounds of your use, it sounds
> > like you just want FIQ support not necessarily sec
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