On 25 September 2014 13:53, Mark Cave-Ayland
wrote:
> Hi Peter,
>
> The following commit updates the OpenBIOS images to SVN r1320 (with
> corresponding changes to the TCX FCode ROM in order to enable guests
> to use the hardware TCX acceleration if required). Please pull.
>
>
> ATB,
>
> Mark.
>
>
As the patch makes simple changes to the vmxcap script that has no
maintainer listed in the MAINTAINERS file it may be a candidate for the
trivial patches team. Thus adding qemu-trivial as CC.
Link to patchwork:
http://patchwork.ozlabs.org/patch/390507/
Regards,
Adrian
On 16 September 2014 10:31, Claudio Fontana wrote:
> This is obviously wrong, we have to put a \0 to separate the two options.
>
> But thee question remains, should we mark that as arm,armv8-timer compatible?
I think we should, but only if the CPU we're presenting to
the guest is a v8 CPU (ie the
ppoll is not scalable, it has a complexity of O(n). When we have many virtio
queues, the main loop could be slowed down.
epoll, which is O(1), could solve this problem well.
In order to do this, we need to factor out an interface between main loop and
iohandler. What we have now is not good, so p
Previously, I/O handler fd's are hooked into main loop by:
1) qemu_iohandler_fill to add the list of io handler fds to g_poll.
2) qemu_iohandler_poll to check the revent values and do the dispatch.
This patch moves all the fds into a GSource, which is attached to the
main event loop. This way
The Linux-specific syscall epoll(7) has a constant complexity, whereas
ppoll/g_poll is linear complexity, depending on the number of fds.
The event loop is more efficient with epoll, because we only need to
poll on few fds now.
Sometimes EPOLL_CTL_ADD returns -1 with errno = EPERM, when the targe
On 09/25/14 11:07, Dr. David Alan Gilbert wrote:
> * Slutz, Donald Christopher (dsl...@verizon.com) wrote:
>> What is happening with this patch? I would like to use this code.
> I need to rework it for the new machine types code; but it was pretty
> low down my list of priorities; but I can try an
* Slutz, Donald Christopher (dsl...@verizon.com) wrote:
> On 09/25/14 11:07, Dr. David Alan Gilbert wrote:
> > * Slutz, Donald Christopher (dsl...@verizon.com) wrote:
> >> What is happening with this patch? I would like to use this code.
> > I need to rework it for the new machine types code; but
On 17 September 2014 16:22, Richard Henderson wrote:
> On 09/17/2014 04:54 AM, Andreas Färber wrote:
>> I am fine with adding such hooks, but please let's use a better, active
>> name. CPUClass is the struct name and cpu-exec is a file name; the hook
>> should say what it's doing, not where the co
On 13 September 2014 05:29, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
> ---
> target-arm/cpu.h| 19 ++-
> target-arm/helper.c | 35 +--
> 2 files changed, 51 insertions(+), 3 deletions(-)
>
> dif
On 13 September 2014 05:29, Edgar E. Iglesias wrote:
> --- a/target-arm/helper.c
> +++ b/target-arm/helper.c
> @@ -3652,7 +3652,33 @@ void switch_mode(CPUARMState *env, int mode)
> */
> unsigned int arm_excp_target_el(CPUState *cs, unsigned int excp_idx)
> {
> -return 1;
> +CPUARMStat
Hello,
there is a somewhat weird issue with 3.10, backported IOAPIC behavior
(which allowed windows guest to not hang in my case), 2.1.1 and webkit
suite which is well-known for all timer weirdness for Windows guests.
Here is a way to reproduce:
- start the guest,
- open webkit-based browser, cpu
On 13 September 2014 05:29, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Signed-off-by: Edgar E. Iglesias
> ---
> target-arm/cpu.h | 1 +
> target-arm/helper-a64.c| 1 +
> target-arm/helper.c| 6 ++
> target-arm/helper.h| 1 +
> target-arm/inter
Hi
We are looking to get processor level cache metrics for each running VM.
Does QEMU/KVM (or libvirt) set RMID for tagging processor cache metrics
? How do I find RMID for a particular VM ?
(Once RMID is known, I am assuming we will be able to query the
processor via MSRs to get values)
Any he
since commit 7dda5dc82a77 ("migration: initialize RAM to zero") the
guest memory is defined zero. No need to call valgrind on guest memory.
This reverts commit 62fe83318d2f ("qemu: Use valgrind annotations to
mark kvm guest memory as defined") thus speeding up kvm start if
/valgrind/valgrind.h is a
On 13 September 2014 05:29, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Reviewed-by: Greg Bellows
> Signed-off-by: Edgar E. Iglesias
> ---
> target-arm/cpu.h| 12
> target-arm/helper.c | 14 ++
> 2 files changed, 26 insertions(+)
>
> diff --git a/targe
On 13 September 2014 05:29, Edgar E. Iglesias wrote:
> From: "Edgar E. Iglesias"
>
> Acked-by: Greg Bellows
> Signed-off-by: Edgar E. Iglesias
> ---
> cpu-exec.c | 12
> target-arm/cpu.c| 29 ++---
> target-arm/cpu.h| 36 +++
On 25 September 2014 20:07, Christian Borntraeger
wrote:
> since commit 7dda5dc82a77 ("migration: initialize RAM to zero") the
> guest memory is defined zero. No need to call valgrind on guest memory.
> This reverts commit 62fe83318d2f ("qemu: Use valgrind annotations to
> mark kvm guest memory as
Il 25/09/2014 19:21, Fam Zheng ha scritto:
> +while (true) {
> +r = epoll_pwait(s->epollfd.fd, events, MAX_EVENTS, 0, &origmask);
You can save a syscall by doing this just once. You would just get a
readable epoll file descriptor on the next main loop iteration. Also,
origmask is an
Is it necessary to make SCR 64-bit if it is 32-bit on both v7 and v8?
On 25 September 2014 13:15, Peter Maydell wrote:
> On 13 September 2014 05:29, Edgar E. Iglesias
> wrote:
> > From: "Edgar E. Iglesias"
> >
> > Signed-off-by: Edgar E. Iglesias
> > ---
> > target-arm/cpu.h| 19
On 25 September 2014 20:49, Greg Bellows wrote:
> Is it necessary to make SCR 64-bit if it is 32-bit on both v7 and v8?
See previous round of reviews -- all AArch64 system registers
are 64 bits ("32 bit" in the ARM ARM is just a shorthand for
"64 bit with the top half RES0"; there is no "read 32
Thanks for the clarification.
On 25 September 2014 14:53, Peter Maydell wrote:
> On 25 September 2014 20:49, Greg Bellows wrote:
> > Is it necessary to make SCR 64-bit if it is 32-bit on both v7 and v8?
>
> See previous round of reviews -- all AArch64 system registers
> are 64 bits ("32 bit" in
I believe this fixes all identified issues. Thanks to all that
have commented to help with this.
-corey
From: Corey Minyard
Signed-off-by: Corey Minyard
Reviewed-by: Paolo Bonzini
---
qemu-char.c | 16 +---
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/qemu-char.c b/qemu-char.c
index 8623c70..f9d2a02 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -84,6 +84,7 @@
#def
From: Corey Minyard
This keeps them from having to be passed around and makes them
available for later functions, like printing and reconnecting.
Signed-off-by: Corey Minyard
Reviewed-by: Paolo Bonzini
---
qemu-char.c | 65 -
1 file
From: Corey Minyard
It seems that it might be a good idea to know what is at the remote
end of a socket for tracking down issues. So add that to the
socket filename.
Signed-off-by: Corey Minyard
Reviewed-by: Paolo Bonzini
---
qemu-char.c | 27 ++-
1 file changed, 18 i
From: Corey Minyard
Move all socket configuration to qmp_chardev_open_socket().
qemu_chr_open_socket_fd() just opens the socket. This is getting ready
for the reconnect code, which will call open_sock_fd() on a reconnect
attempt.
Signed-off-by: Corey Minyard
Reviewed-by: Paolo Bonzini
---
qe
From: Corey Minyard
This way we can tell if the socket is connected or not. It also splits
the string conversions out into separate functions to make this more
convenient.
Signed-off-by: Corey Minyard
Reviewed-by: Paolo Bonzini
---
qemu-char.c | 102 --
From: Corey Minyard
Adds a "reconnect" option to socket backends that gives a reconnect
timeout. This only applies to client sockets. If the other end
of a socket closes the connection, qemu will attempt to reconnect
after the given number of seconds.
Signed-off-by: Corey Minyard
---
qapi-sc
This removes the following circular dependency:
bitops.h -> qemu-common.h -> target-i386/cpu.h -> target-i386/cpu-qom.h ->
qom/cpu.h -> qdev-core.h -> bitmap.h -> bitops.h.
Signed-off-by: Eduardo Habkost
---
include/qemu/bitops.h | 4 +++-
1 file changed, 3 insertions(+), 1 deletion(-)
diff --
The test code needs osdep.h for the ARRAY_SIZE macro.
Signed-off-by: Eduardo Habkost
---
tests/test-bitops.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/tests/test-bitops.c b/tests/test-bitops.c
index 8238eb5..47b5d3e 100644
--- a/tests/test-bitops.c
+++ b/tests/test-bitops.c
@@ -8,6 +8,
To make unit tests that depend on target-specific files, use
check-unit--y and test-obj--y.
Note that the qtest test cases were per-*arch* (e.g. i386, mips, ppc),
not per-*target* (e.g. i386-softmmu, x86_64-linux-user), because they
implicitly apply only to the -softmmu targets. Target-specific un
To allow the unit test file include target-i386/cpu.c code, lots of stub
functions were needed to fulfill dependencies.
The unit test includes target-i386/cpu.c instead of simply linking
against cpu.o because the test code will use static variables/functions
from cpu.c.
Note: I couldn't add depen
This will avoid unexpected circular header dependencies in the future.
Signed-off-by: Eduardo Habkost
---
include/qemu/bitmap.h | 5 -
1 file changed, 4 insertions(+), 1 deletion(-)
diff --git a/include/qemu/bitmap.h b/include/qemu/bitmap.h
index 1babd5d..8c50d70 100644
--- a/include/qemu/b
Signed-off-by: Eduardo Habkost
---
tests/test-x86-cpu.c | 25 +
1 file changed, 25 insertions(+)
diff --git a/tests/test-x86-cpu.c b/tests/test-x86-cpu.c
index 9227e20..e8e9a74 100644
--- a/tests/test-x86-cpu.c
+++ b/tests/test-x86-cpu.c
@@ -30,6 +30,30 @@ static void tes
This will make it easier to write unit tests for the feature
initialization logic.
Signed-off-by: Eduardo Habkost
---
target-i386/cpu.c | 12
1 file changed, 8 insertions(+), 4 deletions(-)
diff --git a/target-i386/cpu.c b/target-i386/cpu.c
index 90d0a05..8d1af64 100644
--- a/targe
Other test code will use the function.
Signed-off-by: Eduardo Habkost
---
tests/Makefile | 1 +
tests/coroutine-stub.c | 13 +
tests/test-vmstate.c | 11 ---
3 files changed, 14 insertions(+), 11 deletions(-)
create mode 100644 tests/coroutine-stub.c
diff --git a
Signed-off-by: Eduardo Habkost
---
tests/test-x86-cpu.c | 28
1 file changed, 28 insertions(+)
diff --git a/tests/test-x86-cpu.c b/tests/test-x86-cpu.c
index e8e9a74..afd5088 100644
--- a/tests/test-x86-cpu.c
+++ b/tests/test-x86-cpu.c
@@ -54,6 +54,33 @@ static void
Instead of using a test-specific hack to add -I$(SRC_PATH)/target-i386, add
test-x86-cpuid to $(test-obj-x86_64-softmmu-y).
Signed-off-by: Eduardo Habkost
---
tests/Makefile | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/tests/Makefile b/tests/Makefile
index 95566d9..f
This is an attempt to write unit tests for the target-i386/cpu.c code. By now, I
just implemented 3 simple test cases, to ensure X86CPU objects can be created,
and to ensure the CPU features are set properly depending on the CPU model
table.
Eduardo Habkost (10):
tests: Add missing include to te
Hi,We are doing a project about using a customed command in qemu to fork the
current vm. As only the current thread will be copied to the child process, so
we need to create other threads. And the vm and vcpus need to be re-registered
in the child process, and the IO thread also need to handled
Hi everyone,
I am pleased to announce that the QEMU v2.1.2 stable release is now
available at:
http://wiki.qemu.org/download/qemu-2.1.2.tar.bz2
v2.1.2 is now tagged in the official qemu.git repository,
and the stable-2.1 branch has been updated accordingly:
http://git.qemu.org/?p=qemu.git;a
v2: rebase
Signed-off-by: Jan Vesely
---
hw/usb/dev-hid.c | 38 ++
1 file changed, 18 insertions(+), 20 deletions(-)
diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
index 467ec86..90746ed 100644
--- a/hw/usb/dev-hid.c
+++ b/hw/usb/dev-hid.c
@@ -566,9 +566,23
v2: rebase
Signed-off-by: Jan Vesely
---
hw/usb/dev-hid.c | 66 +++-
1 file changed, 65 insertions(+), 1 deletion(-)
diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
index a946528..7b67489 100644
--- a/hw/usb/dev-hid.c
+++ b/hw/usb/dev-hid.c
@
v2: add usb_mouse_properties
use macros for bmAttributes
v3: rebase
v4: rebase
Signed-off-by: Jan Vesely
---
hw/usb/dev-hid.c | 71 +++-
1 file changed, 70 insertions(+), 1 deletion(-)
diff --git a/hw/usb/dev-hid.c b/hw/usb/dev-hid.c
index
On Tue, Sep 23, 2014 at 03:36:03PM +0200, Kevin Wolf wrote:
> Do we have a KVM Forum block layer agenda yet? I think this thread could
> already contain a few topics to discuss there.
Being the guy who constantly bring back painfull issues
(Block filters, Block Backend) on the table I think we sho
This is my first patch so I hope I got everything right.
Signed-off-by: Kenth Andersson
---
configure| 2 +-
qga/commands-win32.c | 267 ++-
2 files changed, 266 insertions(+), 3 deletions(-)
diff --git a/configure b/configure
inde
On Thu, Sep 25, 2014 at 07:15:29PM +0100, Peter Maydell wrote:
> On 13 September 2014 05:29, Edgar E. Iglesias
> wrote:
> > From: "Edgar E. Iglesias"
> >
> > Signed-off-by: Edgar E. Iglesias
> > ---
> > target-arm/cpu.h| 19 ++-
> > target-arm/helper.c | 35
On Thu, Sep 25, 2014 at 07:39:32PM +0100, Peter Maydell wrote:
> On 13 September 2014 05:29, Edgar E. Iglesias
> wrote:
>
> > --- a/target-arm/helper.c
> > +++ b/target-arm/helper.c
> > @@ -3652,7 +3652,33 @@ void switch_mode(CPUARMState *env, int mode)
> > */
> > unsigned int arm_excp_target
On Thu, Sep 25, 2014 at 07:47:16PM +0100, Peter Maydell wrote:
> On 13 September 2014 05:29, Edgar E. Iglesias
> wrote:
> > From: "Edgar E. Iglesias"
> >
> > Signed-off-by: Edgar E. Iglesias
> > ---
> > target-arm/cpu.h | 1 +
> > target-arm/helper-a64.c| 1 +
> > target-arm/he
On 25 September 2014 23:20, Edgar E. Iglesias wrote:
> On Thu, Sep 25, 2014 at 07:39:32PM +0100, Peter Maydell wrote:
>> HCR.TGE isn't actually relevant for some exceptions
>> (eg SMC), and the HVC handling you have below
>> effectively ends up ignoring the route_to_el2
>> information. That sugges
This patch series adds the Netduino 2 Machine to QEMU
Information on the board is avalible at:
http://www.netduino.com/netduino2/specs.htm
The git tree can be found at:
https://github.com/alistair23/qemu/tree/netduino2.3
This patch series makes some changes to the armv7m_init function
that allow
This patch adds the stm32f205 timers: TIM2, TIM3, TIM4 and TIM5
to QEMU.
Signed-off-by: Alistair Francis
---
V3:
- Update debug statements
- Correct the units for timer_mod
- Correctly set timer_offset from resets
V2:
- Reorder the Makefile config
- Fix up the debug printing
- Correct the t
This patch moves the memory region init code from the
armv7m_init function to the stellaris_init function
Signed-off-by: Alistair Francis
---
V3:
- Rename the flash_size argument to mem_size
- Remove the sram_size and related code
- Thanks to Peter C
V2:
- Change the memory region names to
This patch adds the stm32f205 USART controller
(UART also uses the same controller).
Signed-off-by: Alistair Francis
---
V3:
- Update debug printing
V2:
- Drop charecters if the device is not enabled
- Thanks to Peter C
Changes from RFC:
- Small changes thanks to Peter C
- USART now imple
This patch adds the stm32f205 System Configuration
Controller. This is used to configure what memory is mapped
at address 0 (although that is not supported) as well
as configure how the EXTI interrupts work (also not
supported at the moment).
This device is not required for basic examples, but mor
This patch allows the board to specifiy the number of NVIC interrupt
lines when using armv7m_init.
Signed-off-by: Alistair Francis
---
hw/arm/armv7m.c | 7 ---
hw/arm/stellaris.c | 5 -
include/hw/arm/arm.h | 2 +-
3 files changed, 9 insertions(+), 5 deletions(-)
diff --git a/hw/
This patch adds the stm32f205 SoC. This will be used by the
Netduino 2 to create a machine.
Signed-off-by: Alistair Francis
---
Changes from RFC:
- Small changes thanks to Peter C
- Split the config settings to device level
default-configs/arm-softmmu.mak | 1 +
hw/arm/Makefile.objs
The Netduino 2 machine won't run unless the reset_pc is based
on the ELF entry point.
Signed-off-by: Alistair Francis
Signed-off-by: Peter Crosthwaite
---
V2:
- Malloc straight away, thanks to Peter C
hw/arm/armv7m.c | 23 ++-
1 file changed, 18 insertions(+), 5 deletions(
This patch adds the Netduino 2 Machine.
This is a Cortex-M3 based machine. Information can be found at:
http://www.netduino.com/netduino2/specs.htm
Signed-off-by: Alistair Francis
---
Changes from RFC:
- Remove CPU passthrough
hw/arm/Makefile.objs | 1 +
hw/arm/netduino2.c | 54 +++
On Thu, Sep 25, 2014 at 08:36:41PM +0100, Peter Maydell wrote:
> On 13 September 2014 05:29, Edgar E. Iglesias
> wrote:
> > From: "Edgar E. Iglesias"
> >
> > Acked-by: Greg Bellows
> > Signed-off-by: Edgar E. Iglesias
> > ---
> > cpu-exec.c | 12
> > target-arm/cpu.c
On Fri, Sep 26, 2014 at 12:01:11AM +0100, Peter Maydell wrote:
> On 25 September 2014 23:20, Edgar E. Iglesias
> wrote:
> > On Thu, Sep 25, 2014 at 07:39:32PM +0100, Peter Maydell wrote:
> >> HCR.TGE isn't actually relevant for some exceptions
> >> (eg SMC), and the HVC handling you have below
>
Using fiemap without FIEMAP_FLAG_SYNC is a known corrupter.
Add the FIEMAP_FLAG_SYNC flag to the FS_IOC_FIEMAP ioctl. This has
the downside of significantly reducing performance.
Reported-By: Michael Steffens
Signed-off-by: Tony Breeds
Cc: Kevin Wolf
Cc: Markus Armbruster
Cc: Stefan Hajnoczi
try_fiemap() uses FIEMAP_FLAG_SYNC which has a significant performance
impact.
Prefer seek_hole() over fiemap() to avoid this impact where possible.
seek_hole is more widely used and, arguably, has potential to be
optimised in the kernel.
Reported-By: Michael Steffens
Signed-off-by: Tony Breeds
On 25 September 2014 23:55, Edgar E. Iglesias wrote:
> On Thu, Sep 25, 2014 at 07:47:16PM +0100, Peter Maydell wrote:
>> > +/* In NS EL1, HCR controlled routing to EL2 has priority over SMD. */
>> > +if (!secure && cur_el == 1 && (env->cp15.hcr_el2 & HCR_TSC)) {
>> > +env->excepti
On 26 September 2014 00:06, Edgar E. Iglesias wrote:
> On Fri, Sep 26, 2014 at 12:01:11AM +0100, Peter Maydell wrote:
>> On 25 September 2014 23:20, Edgar E. Iglesias
>> wrote:
>> > On Thu, Sep 25, 2014 at 07:39:32PM +0100, Peter Maydell wrote:
>> >> HCR.TGE isn't actually relevant for some exce
On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote:
> On 25 September 2014 23:55, Edgar E. Iglesias
> wrote:
> > On Thu, Sep 25, 2014 at 07:47:16PM +0100, Peter Maydell wrote:
> >> > +/* In NS EL1, HCR controlled routing to EL2 has priority over SMD.
> >> > */
> >> > +if (!se
On 26 September 2014 00:31, Edgar E. Iglesias wrote:
> On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote:
>> Oh, yes, that's the trap enable bit. In that case we shouldn't
>> be using EXCP_SMC: this isn't routing the SMC exception, it's
>> taking a Hyp trap exception, and in AArch32 th
On Fri, Sep 26, 2014 at 12:43:40AM +0100, Peter Maydell wrote:
> On 26 September 2014 00:31, Edgar E. Iglesias
> wrote:
> > On Fri, Sep 26, 2014 at 12:17:59AM +0100, Peter Maydell wrote:
> >> Oh, yes, that's the trap enable bit. In that case we shouldn't
> >> be using EXCP_SMC: this isn't routing
On Thu, 09/25 21:45, Paolo Bonzini wrote:
> Il 25/09/2014 19:21, Fam Zheng ha scritto:
> > +while (true) {
> > +r = epoll_pwait(s->epollfd.fd, events, MAX_EVENTS, 0, &origmask);
>
> You can save a syscall by doing this just once. You would just get a
> readable epoll file descriptor o
ping ...
On Thu, 2014-09-18 at 15:53 +0800, Zhu Guihua wrote:
> After inputting device_del command in monitor, we expect to list all
> hotpluggable devices automatically by pressing tab key. This patchset provides
> the function to list all peripheral devices such as memory devices.
>
> Zhu Guihu
On Thu, Sep 25, 2014 at 08:06:40PM +1000, Alexey Kardashevskiy wrote:
> On 09/25/2014 07:43 PM, Alexander Graf wrote:
> >
> >
> > On 25.09.14 09:02, Alexey Kardashevskiy wrote:
> >> The only case when sPAPR NVRAM migrates now is if is backed by a file and
> >> copy-storage migration is performed.
On 09/26/2014 12:31 PM, David Gibson wrote:
> On Thu, Sep 25, 2014 at 08:06:40PM +1000, Alexey Kardashevskiy wrote:
>> On 09/25/2014 07:43 PM, Alexander Graf wrote:
>>>
>>>
>>> On 25.09.14 09:02, Alexey Kardashevskiy wrote:
The only case when sPAPR NVRAM migrates now is if is backed by a file
On 09/08/2014 06:47 AM, Alexander Graf wrote:
>
>
> On 25.08.14 15:45, Aravinda Prasad wrote:
>> This patch adds FWNMI support in qemu for powerKVM
>> guests by handling the ibm,nmi-register rtas call.
>> Whenever OS issues ibm,nmi-register RTAS call, the
>> machine check notification address is
On Mon, Sep 22, 2014 at 04:44:54PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> We only draw cursor on non-shared surfaces (so it seems...) and
> these are always 32bpp
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Gerd Hoffmann
Reviewed-by: David Gibson
--
D
On Mon, Sep 22, 2014 at 04:44:51PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> Provide different functions for converting from an LE vs a BE
> framebuffer. We cannot rely on the simple cases always being
> shared surfaces since cirrus will need to always shadow for
> cursor emu
On Mon, Sep 22, 2014 at 04:44:52PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> We always use rgb_to_pixel32 nowadays.
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Gerd Hoffmann
Reviewed-by: David Gibson
--
David Gibson| I'll have my musi
On Mon, Sep 22, 2014 at 04:44:53PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> The test for surface_bits_per_pixel() isn't necessary anymore,
> the 8bpp case never happens.
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Gerd Hoffmann
Reviewed-by: David Gibson
On Mon, Sep 22, 2014 at 04:44:49PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> Nowadays, we either share a surface with the host, or we create
> a 32bpp ARGB console surface.
>
> So we only need to draw/convert to 32bpp, enabling us to remove
> all but one instance of vga_temp
On Mon, Sep 22, 2014 at 04:44:50PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> All the macros used to generate different versions of vga_template.h
> are now unnecessary, take them all out and remove the _32 suffix from
> most functions.
>
> Signed-off-by: Benjamin Herrenschmi
On Mon, Sep 22, 2014 at 04:44:55PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> Not all platforms have a VGA BIOS, powerpc typically relies on
> using the DISPI interface to initialize the card.
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Gerd Hoffmann
Reviewe
On Mon, Sep 22, 2014 at 04:44:56PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> It's no longer a template, we only instanciate the file once.
>
> Keep it a #included file so the functions remain static.
>
> Signed-off-by: Benjamin Herrenschmidt
> Signed-off-by: Gerd Hoffmann
On Tue, Sep 23, 2014 at 02:30:55PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> And initialize it based on target endian
>
> Signed-off-by: Benjamin Herrenschmidt
Reviewed-by: David Gibson
--
David Gibson| I'll have my music baroque, and my code
david A
On Tue, Sep 23, 2014 at 02:30:56PM +0200, Gerd Hoffmann wrote:
> From: Benjamin Herrenschmidt
>
> Include the endian state in the migration stream as an optional
> subsection which we only include when the endian isn't the default,
> thus enabling backward compatibility of the common case.
>
> S
On Tue, Sep 23, 2014 at 02:30:57PM +0200, Gerd Hoffmann wrote:
> Add a qemu extented register range to the standard vga mmio bar.
> Right nowe there are two registers: One readonly register returning the
> size of the region (so we can easily add more registers there if needed)
> and one endian co
Hi All,
So phase one was the QOMification of qemu_irq. This is the next step.
We start to setup GPIOs as proper QOM objects. Inputs are child objects
of their device. Outputs are settable Links and connection is made
via proper setting of a QOM link.
We then cleanup Sysbus to simply re-use device
Only allow a GPIO name to be one or the other. Inputs and outputs are
functionally different and should be in different namespaces. Prepares
support for the QOMification of IRQs as Links or Child objects.
The alternative is to munge names .e.g. with "-in" or "-out" suffixes
when giving QOM names.
To the device that contains them. This will allow for referencing
a GPIO input from it's canonical path (exciting for dynamic machine
generation!)
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
---
Define propname variable at start of function.
hw/core/qdev.c | 9 +
1 fil
Within the object that contains the GPIO output. This allows for
connecting GPIO outputs via setting of a Link property.
Also clear the link value to zero. This catch-alls the case
where a device improperly inits a gpio_out (malloc instead of
malloc0).
Reviewed-by: Alexander Graf
Signed-off-by:
Create a valid qobject even if the input string is null.
qstring->string will be NULL and length will be 0.
This prepares support for clearing of QOM Link properties
where NULL canonical path string will be passes through
this API.
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
--
By passing in NULL to object_property_set_link.
The lead user of this is the QDEV GPIO framework which will implement
GPIO disconnects via an "unlink".
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
---
qom/object.c | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff
Rather than an abort(). This allows callers to decide whether parenting
an already-parented object is a fatal error condition.
Useful for providing a default value for an object's parent in the case
where you want to set one iff it doesn't already have one.
Reviewed-by: Alexander Graf
Signed-off
Re-implement as a link setter. This should allow the QOM framework to
keep track of ref counts properly etc.
We need to add a default parent for the connecting input incase it's
coming from a non-qdev source. We simply parent the IRQ to the machine
in this case.
Reviewed-by: Alexander Graf
Signe
To replace the old qemu_irq intercept API (which had users reaching
into qdev private state for GPIOs).
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
---
changed since v1 (Alex review):
Accept an alredy inited qemu_irq as arg and return the disconnected
(allow arbitrary opaque set
Change the qtest intercept handler to accept just the individual IRQ
being intercepted as opaque. n is still expected to be correctly set
as for the original intercepted irq. qemu_intercept_irq_in is updated
accordingly.
Then covert the qemu_irq_intercept_out call to use qdev intercept
version. Th
All users of GPIO outputs are fully QOMified, using QOM properties to
access the GPIO data. Delete.
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
---
hw/core/qdev.c | 1 -
include/hw/qdev-core.h | 1 -
2 files changed, 2 deletions(-)
diff --git a/hw/core/qdev.c b/hw/cor
No more users left and obsoleted by qdev_intercept_gpio_out.
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
---
hw/core/irq.c| 6 --
include/hw/irq.h | 1 -
2 files changed, 7 deletions(-)
diff --git a/hw/core/irq.c b/hw/core/irq.c
index 4a580a2..8a62a36 100644
--- a/hw/
Allows a container to take ownership of GPIOs in a contained
device and automatically connect them as GPIOs to the container.
This prepares for deprecation of the SYSBUS IRQ functionality, which
has this feature. We push it up to the device level instead of sysbus
level. There's nothing sysbus spe
Re-implement the Sysbus GPIOs to use the existing TYPE_DEVICE
GPIO named framework. A constant string name is chosen to avoid
conflicts with existing unnamed GPIOs.
This unifies GPIOs are IRQs for sysbus devices and allows removal
of all Sysbus state for GPIOs.
Any existing and future-added funct
Previously this was restricted to a single call per-dev/per-name. With
the conversion of the GPIO output state to QOM the implementation can
now handle repeated calls. Remove the restriction.
Reviewed-by: Alexander Graf
Signed-off-by: Peter Crosthwaite
---
hw/core/qdev.c | 3 +--
1 file change
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