Re: [Qemu-devel] [PATCH 0/6] add paravirtualization hwrng support

On (Fri) 26 Oct 2012 [09:43:34], Anthony Liguori wrote: > Hi, > > This series implements the backend and frontend infrastructure for virtio-rng. > This is similar to previous series sent out by both Amit and myself although > it > has been trimmed down considerably. > > In terms of backends, a f

[Qemu-devel] [PATCH] tests/tcg: fix unused result warnings

With i386-linux-user target on x86_64 host, this does not introduce any new test failures. Signed-off-by: Catalin Patulea --- tests/tcg/test-mmap.c | 15 +++ tests/tcg/testthread.c | 11 +-- 2 files changed, 20 insertions(+), 6 deletions(-) diff --git a/tests/tcg/test-m

Re: [Qemu-devel] [PATCH v2 3/5] Qemu: do not mark bios readonly

Jan, On 10/26/2012 06:35 PM, Jan Kiszka wrote: > This has two problems: We know it breaks at least Win 95 that overwrites > its F-segment during boot. And it applies changes to the shadowed area > (below 1 MB) also to the ROM area - I don't think that is the original > behaviour on real hardware.

Re: [Qemu-devel] q35: usb keyboard trouble

Hi, > +for (i = 0; i < 3; i++) { > +usb = pci_create_multifunction( > +host_bus, PCI_DEVFN(ICH9_USB_DEV, ICH9_USB_UHCI1_FUNC + i), > +true, "ich9-usb-uhci1"); ich9-usb-uhci1,ich9-usb-uhci2,ich9-usb-uhci3 cheers, Gerd

Re: [Qemu-devel] [patch v5 5/8] memory: introduce local lock for address space

On 28 October 2012 23:48, Liu Ping Fan wrote: > For those address spaces which want to be able out of big lock, they > will be protected by their own local. Are you sure this patch compiles? It seems to only be changing the prototype and implementation of address_space_init() to take an extra par

Re: [Qemu-devel] [PATCH v2 05/11] usb/ehci: seperate out PCIisms

Hi, > There still has to be a way to share the Property[] array (currently > contains maxframes). Duplicating the properties array to all > definitions is verbose and fragile. If I want to add a new properties > to EHCI i need to put it in the props array of every subclass. serial > has this pro

Re: [Qemu-devel] [PATCH v2 11/11] usb/ehci: Put RAM in undefined MMIO regions

On 10/27/12 02:42, Peter Crosthwaite wrote: >> Any chance the access you are seeing is at offset 0x68? > > 0x1a8. which for the opregbase + 0x068 for zynq so probably what you > are thinking about. Does the attached patch help? cheers, Gerd >From 6a131b1476640c07317a6f44b5bb54ec53974414 Mon

Re: [Qemu-devel] [PATCH v2 3/5] Qemu: do not mark bios readonly

On 2012-10-29 08:09, Xiao Guangrong wrote: > Jan, > > On 10/26/2012 06:35 PM, Jan Kiszka wrote: > >> This has two problems: We know it breaks at least Win 95 that overwrites >> its F-segment during boot. And it applies changes to the shadowed area >> (below 1 MB) also to the ROM area - I don't th

[Qemu-devel] [PATCH] tests/tcg: new test for i386 FPREM and FPREM1

This is setting the stage for a cleanup of FPREM and FPREM1 helpers while being sure that they behave same as bare metal. The test constructs operands using combinations of corner cases for the floating-point bitfields and prints operands, result and FPU status word for FPREM and FPREM1. The outpu

Re: [Qemu-devel] [PATCH v3 0/8] Sysbus EHCI + Zynq USB.

On 10/29/12 02:34, Peter Crosthwaite wrote: > Added Sysbus variant of EHCI and attached it to Xilinx Zynq. The EHCI stuff > is going to useful for Tegra too. Patch series added to usb patch queue. thanks, Gerd

Re: [Qemu-devel] [patch v4 13/16] e1000: add busy flag to anti broken device state

On 29 October 2012 05:24, liu ping fan wrote: > Oh, ABBA problem can not be solved, I think we need clever deadlock detector. If you cannot solve the problem then you must remain single threaded. -- PMM

Re: [Qemu-devel] [memory] abort with head a8170e5

On Thu, Oct 25, 2012 at 06:12:06PM +0200, Avi Kivity wrote: > On 10/25/2012 04:39 PM, Aurelien Jarno wrote: > > On Thu, Oct 25, 2012 at 03:47:34PM +0200, Avi Kivity wrote: > >> On 10/24/2012 04:00 PM, Aurelien Jarno wrote: > >> > > >> > mips is also broken but by commit > >> > 1c380f9460522f32c8d

Re: [Qemu-devel] [PATCH V4 06/10] create new function: qemu_opt_set_number

On Fri, Oct 26, 2012 at 5:02 PM, Stefan Hajnoczi wrote: > On Thu, Oct 25, 2012 at 08:57:24PM +0800, Dong Xu Wang wrote: >> diff --git a/qemu-option.c b/qemu-option.c >> index d7d5ea9..eeb2c9c 100644 >> --- a/qemu-option.c >> +++ b/qemu-option.c >> @@ -695,6 +695,30 @@ int qemu_opt_set_bool(QemuOpt

Re: [Qemu-devel] [PATCH] tests/tcg: new test for i386 FPREM and FPREM1

On 29 October 2012 07:45, Catalin Patulea wrote: > This is setting the stage for a cleanup of FPREM and FPREM1 helpers while > being > sure that they behave same as bare metal. > > The test constructs operands using combinations of corner cases for the > floating-point bitfields and prints operan

Re: [Qemu-devel] [Qemu-ppc] private handlers to reload images when virtual machine reset.

On 29.10.2012, at 06:21, Olivia Yin wrote: > This is the first part of the patches which remove rom related functions in > loader.c The second part will optimize memory regions which use rom_ptr. > > These patches are against the master branch of git://git.qemu.org/qemu.git. > > The v2 patches

Re: [Qemu-devel] [PATCH] tests/tcg: new test for i386 FPREM and FPREM1

On Mon, Oct 29, 2012 at 4:04 AM, Peter Maydell wrote: > I'm not fantastically enthused about bitfields, but since this is a test > program and not part of QEMU proper I don't think rewriting to avoid > them is justified. I could maybe check some conditions (perhaps sizeof(union float80u) == sizeof

Re: [Qemu-devel] [PATCH v2 3/5] Qemu: do not mark bios readonly

On 10/29/2012 03:44 PM, Jan Kiszka wrote: > On 2012-10-29 08:09, Xiao Guangrong wrote: >> Jan, >> >> On 10/26/2012 06:35 PM, Jan Kiszka wrote: >> >>> This has two problems: We know it breaks at least Win 95 that overwrites >>> its F-segment during boot. And it applies changes to the shadowed area >

Re: [Qemu-devel] [PATCH v5 1/2] pl330: Initial version

On 29 October 2012 06:35, Peter Crosthwaite wrote: > Device model for Primecell PL330 dma controller. A general question -- this is a DMA controller so should it be using the DMAContext APIs now? Avi? > +static void pl330_queue_init(PL330Queue *s, int size, int channum) > +{ > +s->queue = (P

Re: [Qemu-devel] [PATCH] tests/tcg: fix unused result warnings

On 29 October 2012 07:06, Catalin Patulea wrote: > With i386-linux-user target on x86_64 host, this does not introduce any new > test > failures. > > Signed-off-by: Catalin Patulea Looks good, but checkpatch.pl complains about a bunch of style issues -- can you fix them, please? thanks -- PMM

Re: [Qemu-devel] [patch v5 5/8] memory: introduce local lock for address space

On Mon, Oct 29, 2012 at 3:42 PM, Peter Maydell wrote: > On 28 October 2012 23:48, Liu Ping Fan wrote: >> For those address spaces which want to be able out of big lock, they >> will be protected by their own local. > > Are you sure this patch compiles? It seems to only be changing > the prototype

Re: [Qemu-devel] [Qemu-ppc] [RFC PATCH v2 1/5] define image_file_reset and image_blob_reset

Missing patch description On 29.10.2012, at 06:21, Olivia Yin wrote: > Signed-off-by: Olivia Yin > --- > hw/loader.c | 39 +++ > hw/loader.h | 18 ++ > 2 files changed, 57 insertions(+), 0 deletions(-) > > diff --git a/hw/loader.c b/hw/loade

Re: [Qemu-devel] [PATCH] uhci: stick irq routing info into UHCIInfo too.

On Fri, Oct 26, 2012 at 03:01:33PM +0200, Gerd Hoffmann wrote: > Kills the ugly "switch (device_id) { ... }" struct and makes it easier > to figure what the differences between the uhci variants are. > > Need our own DeviceClass struct for that so we can allocate some space > to store UHCIInfo. >

Re: [Qemu-devel] [PATCH 0/6] add paravirtualization hwrng support

Il 26/10/2012 22:29, H. Peter Anvin ha scritto: >>> This is surreal. Output from /dev/hwrng turns into output for >>> /dev/random... it us guaranteed worse; period, end of story. >> > >> > Isn't that exactly what happens in bare-metal? hwrng -> rngd -> random. >> > Instead here >> > we'd have

Re: [Qemu-devel] [Qemu-ppc] [RFC PATCH v2 2/5] use reset handlers to reload kernel and initrd

On 29.10.2012, at 06:21, Olivia Yin wrote: > Signed-off-by: Olivia Yin > --- > hw/loader.c | 64 ++ > 1 files changed, 42 insertions(+), 22 deletions(-) > > diff --git a/hw/loader.c b/hw/loader.c > index cadf58f..9e2c3c8 100644 > --- a/hw

Re: [Qemu-devel] [Qemu-ppc] [RFC PATCH v2 3/5] replace rom_add_file* with image_file_reset

On 29.10.2012, at 06:21, Olivia Yin wrote: > Signed-off-by: Olivia Yin > --- > hw/cirrus_vga.c |6 +- > hw/pc.c |6 +- > hw/pc_sysfw.c | 14 +++--- > hw/pci.c| 10 -- > hw/sga.c|6 +- > hw/vga-isa.c|6 +- > 6 files chang

Re: [Qemu-devel] [patch v5 7/8] memory: introduce tls context to record nested dma

Il 29/10/2012 00:48, Liu Ping Fan ha scritto: > Signed-off-by: Liu Ping Fan > --- > cpus.c|3 ++ > exec.c| 58 > + > qemu-thread.h |8 +++ > vl.c |1 + > 4 files changed, 70 insertions(+), 0 deleti

Re: [Qemu-devel] [PATCH v3 0/8] Sysbus EHCI + Zynq USB.

Am 29.10.2012 08:48, schrieb Gerd Hoffmann: > On 10/29/12 02:34, Peter Crosthwaite wrote: >> Added Sysbus variant of EHCI and attached it to Xilinx Zynq. The EHCI stuff >> is going to useful for Tegra too. > > Patch series added to usb patch queue. Wasn't there resistance against dma_context_mem

Re: [Qemu-devel] acpi_piix4 migration issue

Il 28/10/2012 20:40, Marcelo Tosatti ha scritto: > > qemu-kvm 1.2 -> qemu-1.3 migration fails with > > Unknown savevm section type 48 > load of migration failed > > Due to a fix in acpi_piix4 in qemu-kvm (attached at the end of the > message). > > The problem is that qemu-kvm correctly uses 2

Re: [Qemu-devel] [PATCH 1/5] disas: avoid using cpu_single_env

Am 28.10.2012 16:03, schrieb Blue Swirl: > Pass around CPUState instead of using global cpu_single_env. > > Signed-off-by: Blue Swirl CPUState would be really nice, you seem to mean CPUArchState though as intermediate step. Please adjust the commit message, looks fine as far as reviewed otherwis

Re: [Qemu-devel] [PATCH] disallow -daemonize usage of stdio (curses display, -nographic, -serial stdio etc)

On Sat, Oct 27, 2012 at 05:15:15PM +0400, Michael Tokarev wrote: > diff --git a/vl.c b/vl.c > index 9f99ef4..db48d62 100644 > --- a/vl.c > +++ b/vl.c > @@ -3413,6 +3413,26 @@ int main(int argc, char **argv, char **envp) > default_sdcard = 0; > } > > +if (is_daemonized()) { > +

[Qemu-devel] [PATCH v3 3/6] TCG: Use gen_opparam_ptr from context instead of global variable.

Signed-off-by: Evgeny Voevodin --- gen-icount.h |2 +- tcg/tcg-op.h | 254 +- tcg/tcg.c| 36 - 3 files changed, 146 insertions(+), 146 deletions(-) diff --git a/gen-icount.h b/gen-icount.h index 430cb44..248cf5b 100644 --

[Qemu-devel] [PATCH v3 5/6] TCG: Use gen_opparam_buf from context instead of global variable.

Signed-off-by: Evgeny Voevodin --- tcg/tcg.c | 11 ++- 1 file changed, 6 insertions(+), 5 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index c4e663b..f332463 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -298,7 +298,7 @@ void tcg_func_start(TCGContext *s) #endif s->gen_opc_ptr =

[Qemu-devel] [PATCH v3 0/6] TCG global variables clean-up

This set of patches moves global variables to tcg_ctx: gen_opc_ptr gen_opparam_ptr gen_opc_buf gen_opparam_buf Build tested for all targets. Execution tested on Exynos4210 target. After this patchset was aplied, I noticed 0.7% speed-up of code generation. Probably, this is due to better data cach

[Qemu-devel] [PATCH v3 6/6] TCG: Remove unused global variables

From: Evgeny Signed-off-by: Evgeny Voevodin --- tcg/tcg.c |4 tcg/tcg.h |4 translate-all.c |3 --- 3 files changed, 11 deletions(-) diff --git a/tcg/tcg.c b/tcg/tcg.c index f332463..53bf109 100644 --- a/tcg/tcg.c +++ b/tcg/tcg.c @@ -96,10 +96,6 @@ const size_

Re: [Qemu-devel] [Qemu-ppc] [RFC PATCH v2 3/5] replace rom_add_file* with image_file_reset

On 29.10.2012, at 09:48, Alexander Graf wrote: > > On 29.10.2012, at 06:21, Olivia Yin wrote: > >> Signed-off-by: Olivia Yin >> --- >> hw/cirrus_vga.c |6 +- >> hw/pc.c |6 +- >> hw/pc_sysfw.c | 14 +++--- >> hw/pci.c| 10 -- >> hw/sga.c

[Qemu-devel] [PATCH v3 4/6] TCG: Use gen_opc_buf from context instead of global variable.

Signed-off-by: Evgeny Voevodin --- target-alpha/translate.c |6 ++-- target-arm/translate.c|6 ++-- target-cris/translate.c |9 +++--- target-i386/translate.c |6 ++-- target-lm32/translate.c |9 +++--- target-m68k/translate.c |6 ++--

[Qemu-devel] [PATCH v3 1/6] tcg/tcg.h: Duplicate global TCG variables in TCGContext

From: Evgeny Signed-off-by: Evgeny Signed-off-by: Evgeny Voevodin --- tcg/tcg.h |6 ++ 1 file changed, 6 insertions(+) diff --git a/tcg/tcg.h b/tcg/tcg.h index 45e94f5..43b4317 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -422,6 +422,12 @@ struct TCGContext { int temps_in_use;

[Qemu-devel] [PATCH v3 2/6] TCG: Use gen_opc_ptr from context instead of global variable.

Signed-off-by: Evgeny Voevodin --- target-alpha/translate.c |8 ++--- target-arm/translate.c|8 ++--- target-cris/translate.c | 10 +++--- target-i386/translate.c |8 ++--- target-lm32/translate.c | 10 +++--- target-m68k/translate.c |8 ++-

Re: [Qemu-devel] [patch v5 5/8] memory: introduce local lock for address space

On 10/29/2012 01:48 AM, Liu Ping Fan wrote: > For those address spaces which want to be able out of big lock, they > will be protected by their own local. > > Signed-off-by: Liu Ping Fan > --- > memory.c | 11 ++- > memory.h |5 - > 2 files changed, 14 insertions(+), 2 deletion

Re: [Qemu-devel] [PATCH v3 2/8] usb/ehci: Use class_data to init PCI variations

Am 29.10.2012 02:34, schrieb Peter Crosthwaite: > Got rid of the duplication of the class init functions for the two PCI EHCI > variants. The PCI specifics are passed in as as class_data and set by a common > class_init function. > > Premeptively defined a new Class "EHCICLass" for the upcomming a

Re: [Qemu-devel] [PATCH v5 1/2] pl330: Initial version

Good day, Peter) On 10/29/2012 10:35 AM, Peter Crosthwaite wrote: Device model for Primecell PL330 dma controller. + +static Property pl330_properties[] = { +/* CR0 */ +DEFINE_PROP_UINT8("num_chnls", PL330, num_chnls, 8), +DEFINE_PROP_UINT8("num_periph_req", PL330, num_periph_req, 8

Re: [Qemu-devel] [patch v5 6/8] memory: make mmio dispatch able to be out of biglock

On 10/29/2012 01:48 AM, Liu Ping Fan wrote: > Without biglock, we try to protect the mr by increase refcnt. > If we can inc refcnt, go backward and resort to biglock. > > Another point is memory radix-tree can be flushed by another > thread, so we should get the copy of terminal mr to survive > fr

Re: [Qemu-devel] [PATCH v3 0/8] Sysbus EHCI + Zynq USB.

On 10/29/12 09:53, Andreas Färber wrote: > Am 29.10.2012 08:48, schrieb Gerd Hoffmann: >> On 10/29/12 02:34, Peter Crosthwaite wrote: >>> Added Sysbus variant of EHCI and attached it to Xilinx Zynq. The EHCI stuff >>> is going to useful for Tegra too. >> >> Patch series added to usb patch queue. >

Re: [Qemu-devel] [PATCH v1 1/1] m68k: Return semihosting errno values correctly

I just noticed this patch never got applied by anybody (and alas it now needs a refresh because the file was renamed in the interim.) -- PMM On 27 March 2012 16:43, Peter Maydell wrote: > This patch is simple enough (and m68k unmaintained enough) > that it could reasonably go through qemu-trivia

Re: [Qemu-devel] [patch v5 5/8] memory: introduce local lock for address space

On Mon, Oct 29, 2012 at 5:32 PM, Avi Kivity wrote: > On 10/29/2012 01:48 AM, Liu Ping Fan wrote: >> For those address spaces which want to be able out of big lock, they >> will be protected by their own local. >> >> Signed-off-by: Liu Ping Fan >> --- >> memory.c | 11 ++- >> memory.h |

Re: [Qemu-devel] [Qemu-trivial] [PATCH] cadence_uart: More debug information

On Fri, Oct 19, 2012 at 07:08:04PM +1000, Peter Crosthwaite wrote: > Add more helpful debug information to the cadence UART. > > Signed-off-by: Peter Crosthwaite > --- > hw/cadence_uart.c | 11 +++ > 1 files changed, 7 insertions(+), 4 deletions(-) Thanks, applied to the trivial patch

Re: [Qemu-devel] [Qemu-trivial] [PATCH] configure: Remove stray debug output

On Sat, Oct 20, 2012 at 08:37:04PM +0100, Peter Maydell wrote: > Rather than printing a message saying we're silently falling > back to gthread coroutines when running on MacOS, actually > do it silently. > > Signed-off-by: Peter Maydell > --- > I guess this is a self-falsifying echo :-) > > co

Re: [Qemu-devel] [PATCH v2 0/6] static patches

On Sun, Oct 28, 2012 at 11:04:45AM +, Blue Swirl wrote: > v2: extract function removal patches, skip ARM > > Blue Swirl (6): > target-sparc: make do_unaligned_access static > vl.c: add missing static > vnc: add missing static > ppc: add missing static > target-ppc: make some function

Re: [Qemu-devel] [Qemu-trivial] [PATCH] configure: Remove stray debug output

On 29 October 2012 09:54, Stefan Hajnoczi wrote: > On Sat, Oct 20, 2012 at 08:37:04PM +0100, Peter Maydell wrote: >> Rather than printing a message saying we're silently falling >> back to gthread coroutines when running on MacOS, actually >> do it silently. >> >> Signed-off-by: Peter Maydell >>

Re: [Qemu-devel] [Qemu-trivial] [PATCH v1 1/1] m68k: Return semihosting errno values correctly

On Mon, Oct 29, 2012 at 10:42 AM, Peter Maydell wrote: > I just noticed this patch never got applied by anybody > (and alas it now needs a refresh because the file was renamed > in the interim.) Merged, thanks! https://github.com/stefanha/qemu/commits/trivial-patches Please CC qemu-trivial when

[Qemu-devel] [PATCH 01/22] Remove TARGET_PHYS_ADDR_BITS define completely

From: Peter Maydell Following commit 4be403c81 TARGET_PHYS_ADDR_BITS is always 64, and it's only used in one place (that commit removed all the other uses). Remove it completely, to avoid confusion with the genuinely useful TARGET_PHYS_ADDR_SPACE_BITS. Signed-off-by: Peter Maydell Signed-off-by

[Qemu-devel] [PULL 00/22] ppc patch queue 2012-10-29

Hi Blue / Aurelien, This is my current patch queue for ppc. Please pull. Alex The following changes since commit 50cd72148211c5e5f22ea2519d19ce024226e61f: Max Filippov (1): hw/xtensa_sim: get rid of intermediate xtensa_sim_init are available in the git repository at: git://repo.o

[Qemu-devel] [PATCH 10/22] virtio-pci: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/virtio-pci.c | 126 +- 1 files changed, 49 insertions(+), 77 deletions(-) diff --git a/hw/virtio-pci.c b/hw/virtio-pci.c index c7f20c3..9603150 100644 --- a/hw/virtio-pci.c +++ b/hw/virtio-pci.c @@ -374,79

[Qemu-devel] [PATCH 17/22] rtl8139: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/rtl8139.c | 78 ++--- 1 files changed, 36 insertions(+), 42 deletions(-) diff --git a/hw/rtl8139.c b/hw/rtl8139.c index 10ced8b..e3aa8bf 100644 --- a/hw/rtl8139.c +++ b/hw/rtl8139.c @@ -3187,38 +3187,6 @@

[Qemu-devel] [PATCH 06/22] pseries: Don't allow duplicate registration of hcalls or RTAS calls

From: David Gibson Currently the pseries machine code allows a callback to be registered for a hypercall number twice, as long as it's the same callback the second time. We don't test for duplicate registrations of RTAS callbacks at all so it will effectively be last registratiojn wins. This wa

[Qemu-devel] [PATCH 05/22] Add USB option in machine options

From: zhlci...@gmail.com When -usb option is used, global varible usb_enabled is set. And all the plaform will create one USB controller according to this variable. In fact, global varibles make code hard to read. So this patch is to remove global variable usb_enabled and add USB option in machi

[Qemu-devel] [PATCH 14/22] mc146818rtc: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/mc146818rtc.c | 19 +++ 1 files changed, 11 insertions(+), 8 deletions(-) diff --git a/hw/mc146818rtc.c b/hw/mc146818rtc.c index 332a77d..98839f2 100644 --- a/hw/mc146818rtc.c +++ b/hw/mc146818rtc.c @@ -383,7 +383,8 @@ static void rtc_update

[Qemu-devel] [PATCH 12/22] i8254: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/i8254.c | 20 +++- 1 files changed, 11 insertions(+), 9 deletions(-) diff --git a/hw/i8254.c b/hw/i8254.c index 77bd5e8..bea5f92 100644 --- a/hw/i8254.c +++ b/hw/i8254.c @@ -111,7 +111,8 @@ static void pit_latch_count(PITChannelState *s)

[Qemu-devel] [PATCH 15/22] pc port92: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/pc.c | 19 +++ 1 files changed, 11 insertions(+), 8 deletions(-) diff --git a/hw/pc.c b/hw/pc.c index 16de04c..a02b397 100644 --- a/hw/pc.c +++ b/hw/pc.c @@ -421,7 +421,8 @@ typedef struct Port92State { qemu_irq *a20_out; } Port92State

[Qemu-devel] [PATCH 16/22] pckbd: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/pckbd.c | 48 +++- 1 files changed, 27 insertions(+), 21 deletions(-) diff --git a/hw/pckbd.c b/hw/pckbd.c index 000c7f0..5bb3e0a 100644 --- a/hw/pckbd.c +++ b/hw/pckbd.c @@ -194,7 +194,8 @@ static void kbd_update

[Qemu-devel] [PATCH 07/22] target-ppc: Rework storage of VPA registration state

From: David Gibson With PAPR guests, hypercalls allow registration of the Virtual Processor Area (VPA), SLB shadow and dispatch trace log (DTL), each of which allow for certain communication between the guest and hypervisor. Currently, we store the addresses of the three areas and the size of th

Re: [Qemu-devel] [PATCH 01/22] Remove TARGET_PHYS_ADDR_BITS define completely

On 29 October 2012 10:25, Alexander Graf wrote: > From: Peter Maydell > > Following commit 4be403c81 TARGET_PHYS_ADDR_BITS is always 64, > and it's only used in one place (that commit removed all the > other uses). Remove it completely, to avoid confusion with > the genuinely useful TARGET_PHYS_A

[Qemu-devel] slow migration speed / strange memory usage

Hello list, i'm running kvm 1.2 on vanilla 3.6.3 kernel. I'm trying to understand the memory usage and the migration speed. I've a VM which does nothing else than running OpenSSH and a cron job every minute to write a small json file. When the VM is freshly started Host shows 300MB memory us

Re: [Qemu-devel] [PATCH 1/4 v3] vmware_vga: Coding style cleanup

On Thu, 18 Oct 2012, BALATON Zoltan wrote: Ping? http://patchwork.ozlabs.org/patch/189750/ http://patchwork.ozlabs.org/patch/189751/ http://patchwork.ozlabs.org/patch/189752/ http://patchwork.ozlabs.org/patch/189754/ Is there anything else that needs to be done with these or it's ignored only

Re: [Qemu-devel] [PATCH 01/22] Remove TARGET_PHYS_ADDR_BITS define completely

On 29.10.2012, at 11:38, Peter Maydell wrote: > On 29 October 2012 10:25, Alexander Graf wrote: >> From: Peter Maydell >> >> Following commit 4be403c81 TARGET_PHYS_ADDR_BITS is always 64, >> and it's only used in one place (that commit removed all the >> other uses). Remove it completely, to a

[Qemu-devel] [PATCH 13/22] m48t59: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/m48t59.c | 24 ++-- 1 files changed, 14 insertions(+), 10 deletions(-) diff --git a/hw/m48t59.c b/hw/m48t59.c index 9eb1a09..9e8e692 100644 --- a/hw/m48t59.c +++ b/hw/m48t59.c @@ -27,6 +27,7 @@ #include "sysemu.h" #include "sysbus.h"

[Qemu-devel] [PATCH 03/22] PPC: 440: Emulate DCBR0

The DCBR0 register on 440 is used to implement system reset. The same register is used on 405 as well, so just reuse the code. Signed-off-by: Alexander Graf --- target-ppc/translate_init.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/target-ppc/translate_init.c b/tar

[Qemu-devel] [PATCH 11/22] es1370: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/es1370.c | 46 -- 1 files changed, 36 insertions(+), 10 deletions(-) diff --git a/hw/es1370.c b/hw/es1370.c index e34234c..e0c9729 100644 --- a/hw/es1370.c +++ b/hw/es1370.c @@ -908,18 +908,44 @@ static void es137

[Qemu-devel] [PATCH 19/22] vmport: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/vmport.c | 21 - 1 files changed, 12 insertions(+), 9 deletions(-) diff --git a/hw/vmport.c b/hw/vmport.c index a4f52ee..3ab3a14 100644 --- a/hw/vmport.c +++ b/hw/vmport.c @@ -54,7 +54,8 @@ void vmport_register(unsigned char command, IOP

[Qemu-devel] [PATCH 20/22] xen_platform: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/xen_platform.c | 48 ++-- 1 files changed, 38 insertions(+), 10 deletions(-) diff --git a/hw/xen_platform.c b/hw/xen_platform.c index 890eb72..a54e7a2 100644 --- a/hw/xen_platform.c +++ b/hw/xen_platform.c @@ -228

Re: [Qemu-devel] [PULL 00/22] ppc patch queue 2012-10-29

Am 29.10.2012 11:25, schrieb Alexander Graf: > Hi Blue / Aurelien, > > This is my current patch queue for ppc. Please pull. Alex, this does not include my refactoring patches. Do you want them to go through my qom-cpu queue, or are there conflicts/objections? Andreas -- SUSE LINUX Products Gm

[Qemu-devel] [PATCH 04/22] e500: Fix serial initialization

From: Bharat Bhushan it was wrongly using serial_hds[0] instead of serial_hds[1] Signed-off-by: Bharat Bhushan Reviewed-by: Andreas Färber Signed-off-by: Alexander Graf --- hw/ppc/e500.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c i

Re: [Qemu-devel] [PULL 00/22] ppc patch queue 2012-10-29

On 29.10.2012, at 12:01, Andreas Färber wrote: > Am 29.10.2012 11:25, schrieb Alexander Graf: >> Hi Blue / Aurelien, >> >> This is my current patch queue for ppc. Please pull. > > Alex, this does not include my refactoring patches. Do you want them to > go through my qom-cpu queue, or are ther

[Qemu-devel] [PATCH 21/22] PPC: e500: Map PIO space into core memory region

On PPC, we don't have PIO. So usually PIO space behind a PCI bridge is accessible via MMIO. Do this mapping explicitly by mapping the PIO space of our PCI bus into a memory region that lives in memory space. Signed-off-by: Alexander Graf --- hw/ppc/e500.c|3 +-- hw/ppce500_pci.c |9 +

[Qemu-devel] [PATCH 02/22] PPC: Bamboo: Fix memory size DT property

Device tree properties need to be specified in big endian. Fix the bamboo memory size property accordingly. Signed-off-by: Alexander Graf CC: qemu-sta...@nongnu.org --- hw/ppc440_bamboo.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/hw/ppc440_bamboo.c b/hw/ppc440_bam

Re: [Qemu-devel] [PATCH v3 2/8] usb/ehci: Use class_data to init PCI variations

On Oct 29, 2012 7:35 PM, "Andreas Färber" wrote: > > Am 29.10.2012 02:34, schrieb Peter Crosthwaite: > > Got rid of the duplication of the class init functions for the two PCI EHCI > > variants. The PCI specifics are passed in as as class_data and set by a common > > class_init function. > > > > P

[Qemu-devel] [PATCH 22/22] PPC: pseries: Remove hack for PIO window

Now that all users of old_portio are gone, we can remove the hack that enabled us to support them. Signed-off-by: Alexander Graf --- hw/spapr_pci.c | 44 +--- hw/spapr_pci.h |2 +- 2 files changed, 2 insertions(+), 44 deletions(-) diff --git a/hw/sp

[Qemu-devel] [PATCH 09/22] ac97: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/ac97.c | 109 +--- 1 files changed, 89 insertions(+), 20 deletions(-) diff --git a/hw/ac97.c b/hw/ac97.c index 0f561fa..ce6a1dc 100644 --- a/hw/ac97.c +++ b/hw/ac97.c @@ -1226,32 +1226,101 @@ static con

[Qemu-devel] [PATCH 08/22] pseries: Implement qemu initiated shutdowns using EPOW events

From: David Gibson At present, using 'system_powerdown' from the monitor or otherwise instructing qemu to (cleanly) shut down a pseries guest will not work, because we did not have a method of signalling the shutdown request to the guest. PAPR does include a usable mechanism for this, though it

[Qemu-devel] [PATCH 18/22] serial: convert PIO to new memory api read/write

Signed-off-by: Alexander Graf --- hw/serial.c | 30 +- 1 files changed, 17 insertions(+), 13 deletions(-) diff --git a/hw/serial.c b/hw/serial.c index ae84b22..60283ea 100644 --- a/hw/serial.c +++ b/hw/serial.c @@ -26,6 +26,7 @@ #include "serial.h" #include "qemu-

[Qemu-devel] [PATCH 1/3] m68k: Return semihosting errno values correctly

From: Meador Inge Fixing a simple typo, s/errno/err/, that caused the error status from GDB semihosted system calls to be returned incorrectly. Signed-off-by: Meador Inge Reviewed-by: Andreas Färber Signed-off-by: Peter Maydell --- target-m68k/m68k-semi.c | 2 +- 1 file changed, 1 insertion(

[Qemu-devel] [PATCH 0/3] target-m68k/m68k-semi: don't ignore get/put_user failure

This patch series cleans up the m68k semihosting support to not ignore failure of get_user and put_user when reading semihosting arguments and writing return values (compare f296c0d1 which did something similar for ARM semihosting). The main motivation for this patch is to shut up clang's complaint

[Qemu-devel] [PATCH 3/3] target-m68k/m68k-semi.c: Log when put_user for returning values fails

Abstract out the use of put_user for returning semihosting call results, so that we can log when a guest erroneously attempts a semihosting call with an unwritable argument block. Signed-off-by: Peter Maydell --- target-m68k/m68k-semi.c | 47 +++ 1 fil

[Qemu-devel] [PATCH 2/3] target-m68k/m68k-semi: Handle get_user failure

Handle failure of get_user accessing the semihosting argument block, rather than simply ignoring the failures. Signed-off-by: Peter Maydell --- target-m68k/m68k-semi.c | 144 +++- 1 file changed, 93 insertions(+), 51 deletions(-) diff --git a/target-m

[Qemu-devel] [PATCH 6/6] s390: sclp ascii console support

From: Heinz Graalfs This code adds console support by implementing SCLP's ASCII Console Data event. This is the same console as LPARs ASCII console or z/VMs sysascii. The console can be specified manually with something like -chardev stdio,id=charconsole0 -device sclpconsole,chardev=charconsol

[Qemu-devel] [PATCH 5/6] s390: sclp signal quiesce support

From: Heinz Graalfs This implements the sclp signal quiesce event via the SCLP Event Facility. This allows to gracefully shutdown a guest by using system_powerdown notifiers. It creates a service interrupt that will trigger a Read Event Data command from the guest. This code will then add an even

[Qemu-devel] [PATCH 1/6] s390/kvm_stat: correct sys_perf_event_open syscall number

From: Heinz Graalfs Correct sys_perf_event_open syscall number for s390 architecture - the hardcoded syscall number 298 is for x86 but should be different for other architectures. In case we figure out via /proc/cpuinfo that we are running on s390 the appropriate syscall number

[Qemu-devel] [PATCH 4/6] s390: sclp event support

From: Heinz Graalfs Several SCLP features are considered to be events. Those events don't provide SCLP commands on their own, instead they are all based on Read Event Data, Write Event Data, Write Event Mask and the service interrupt. Follow-on patches will provide SCLP's Signal Quiesce (via syst

[Qemu-devel] [PATCH 2/6] s390: use sync regs for register transfer

From: Christian Borntraeger Newer kernels provide the guest registers in kvm_run. Lets use those if available (i.e. the capability is set). This avoids ioctls on cpu_synchronize_state making intercepts faster. In addition, we have now the prefix register, the access registers the control registe

[Qemu-devel] [PATCH 0/6] s390 patches

Hi Alex, this is our current s390 patch queue. The SCLP patches only received minor review comments last time they were posted and have been tested internally for a while now. The same applies to Christian's sync regs patch. Christian Borntraeger (1): s390: use sync regs for register transfe

[Qemu-devel] [PATCH 3/6] s390: sclp base support

From: Heinz Graalfs This adds a more generic infrastructure for handling Service-Call requests on s390. Currently we only support a small subset of Read SCP Info directly in target-s390x. This patch provides the base infrastructure for supporting more commands and moves Read SCP Info. In the futu

Re: [Qemu-devel] [PATCH] disallow -daemonize usage of stdio (curses display, -nographic, -serial stdio etc)

29.10.2012 13:18, Stefan Hajnoczi wrote: > On Sat, Oct 27, 2012 at 05:15:15PM +0400, Michael Tokarev wrote: >> diff --git a/vl.c b/vl.c >> index 9f99ef4..db48d62 100644 >> --- a/vl.c >> +++ b/vl.c >> @@ -3413,6 +3413,26 @@ int main(int argc, char **argv, char **envp) >> default_sdcard = 0;

Re: [Qemu-devel] [PATCH v12 09/14] target-mips: Add ASE DSP bit/manipulation instructions

Hi Petar, On Sun, Oct 28, 2012 at 6:58 AM, Jovanovic, Petar wrote: > +case OPC_REPL_PH: > +check_dsp(ctx); > +{ > +imm = (ctx->opcode >> 16) & 0x03FF; > +tcg_gen_movi_tl(cpu_gpr[ret], \ > +(target_long

Re: [Qemu-devel] [Patch]KVM: enabling per domain PLE

Hi, Avi > > Yes, some cloud vendors already knew that different PLE values has big > performance impact on their applications. They want one interface for them to > set. And I think the big cloud vendors should have administrators that have > experience on PLE tuning. :-) > For current stage, d

Re: [Qemu-devel] [PATCH 3/4] QAPI: Introduce memchar-read QMP command

On Mon, 29 Oct 2012 12:09:38 +0800 Lei Li wrote: > On 10/27/2012 01:39 AM, Luiz Capitulino wrote: > > On Fri, 26 Oct 2012 19:21:51 +0800 > > Lei Li wrote: > > > >> Signed-off-by: Lei Li > >> --- > >> hmp-commands.hx | 19 ++ > >> hmp.c| 19 ++

Re: [Qemu-devel] [PATCH v3 2/8] usb/ehci: Use class_data to init PCI variations

Am 29.10.2012 12:43, schrieb Peter Crosthwaite: > > On Oct 29, 2012 7:35 PM, "Andreas Färber" > wrote: >> >> Am 29.10.2012 02:34, schrieb Peter Crosthwaite: >> > Got rid of the duplication of the class init functions for the two > PCI EHCI >> > variants. The PCI specifics

Re: [Qemu-devel] [PATCH 2/4] QAPI: Introduce memchar-write QMP command

On Mon, 29 Oct 2012 12:10:24 +0800 Lei Li wrote: > On 10/27/2012 01:17 AM, Luiz Capitulino wrote: > > On Fri, 26 Oct 2012 19:21:50 +0800 > > Lei Li wrote: > > > >> Signed-off-by: Lei Li > >> --- > >> hmp-commands.hx | 17 + > >> hmp.c| 15 +++ > >>

Re: [Qemu-devel] [PATCH 4/4] HMP: Introduce console command

On Mon, 29 Oct 2012 12:18:03 +0800 Lei Li wrote: > On 10/27/2012 01:43 AM, Luiz Capitulino wrote: > > On Fri, 26 Oct 2012 19:21:52 +0800 > > Lei Li wrote: > > > >> Signed-off-by: Lei Li > > I still don't understand how this command, in its current form, is > > different from memchar-write. > >

[Qemu-devel] KVM call agenda for 2012-10-30

Hi Please send in any agenda topics you are interested in. Later, Juan.

Re: [Qemu-devel] [PATCH v12 09/14] target-mips: Add ASE DSP bit/manipulation instructions

Hi Jia, > imm = (int16_t)(imm << 6) >> 6; result of a bitwise shift of a signed type and a negative vlaue is implementation-defined, so you can not rely on that. Regards, Petar From: Jia Liu [pro...@gmail.com] Sent: Monday, October 29, 2012 1:36 PM To: Jo

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