On Tue, Nov 26, 2013 at 04:59:33PM +0100, Gerd Hoffmann wrote:
>
> Hi,
>
> > > > Yes, I think it's a start. Q35 is a bit harder because of the MMIO
> > > > region.
> > >
> > > ??? Do you mean mmconfig? That can live inside the window.
> >
> > Are you sure? When I tried windows crashed but m
On Tue, Nov 26, 2013 at 07:26:21PM +0100, Igor Mammedov wrote:
> On Tue, 26 Nov 2013 16:42:16 +0100
> Gerd Hoffmann wrote:
>
> > Hi,
> >
> > > This doesn't clamp the w32.begin value into [0x8000, 0xe000],
> > > which seems wrong.
> >
> > Why? In a 1G guest you can map pci bars at 0x4
On Tue, 26 Nov 2013 15:11:01 +0100
Laszlo Ersek wrote:
> On 11/26/13 10:10, Michael S. Tsirkin wrote:
>
> > seabios manages to enumerate PCI with information exported from qemu
> > so why can't OVMF?
>
> SeaBIOS and qemu duplicate logic (code) between each other.
>
> src/fw/pciinit.c grabs Ram
On Tue, 26 Nov 2013 16:42:16 +0100
Gerd Hoffmann wrote:
> Hi,
>
> > This doesn't clamp the w32.begin value into [0x8000, 0xe000],
> > which seems wrong.
>
> Why? In a 1G guest you can map pci bars at 0x4000 just fine.
>
> _CRS in acpi should declare the area where you can map pc
Hi,
> > > Yes, I think it's a start. Q35 is a bit harder because of the MMIO
> > > region.
> >
> > ??? Do you mean mmconfig? That can live inside the window.
>
> Are you sure? When I tried windows crashed but maybe I'm wrong.
> Did you try some windows guests?
At least it looks that way on
On Tue, Nov 26, 2013 at 04:42:16PM +0100, Gerd Hoffmann wrote:
> Hi,
>
> > This doesn't clamp the w32.begin value into [0x8000, 0xe000],
> > which seems wrong.
>
> Why? In a 1G guest you can map pci bars at 0x4000 just fine.
>
> _CRS in acpi should declare the area where you can m
Hi,
> This doesn't clamp the w32.begin value into [0x8000, 0xe000],
> which seems wrong.
Why? In a 1G guest you can map pci bars at 0x4000 just fine.
_CRS in acpi should declare the area where you can map pci bars, and
that happens to be end-of-ram -> ioapci base.
Firmware can ch
On Tue, Nov 26, 2013 at 04:20:58PM +0100, Gerd Hoffmann wrote:
> On Di, 2013-11-26 at 16:04 +0200, Michael S. Tsirkin wrote:
> > On Tue, Nov 26, 2013 at 12:00:51PM +0100, Gerd Hoffmann wrote:
> > > Hi,
> > >
> > > > I think it's down to other qemu bugs (such as _CRS not covering
> > > > all of P
On Di, 2013-11-26 at 16:04 +0200, Michael S. Tsirkin wrote:
> On Tue, Nov 26, 2013 at 12:00:51PM +0100, Gerd Hoffmann wrote:
> > Hi,
> >
> > > I think it's down to other qemu bugs (such as _CRS not covering
> > > all of PCI memory), we shall just fix them.
> >
> > i.e. the attached patch should
On Tue, Nov 26, 2013 at 03:22:28PM +0100, Laszlo Ersek wrote:
> On 11/26/13 15:04, Michael S. Tsirkin wrote:
> > On Tue, Nov 26, 2013 at 12:00:51PM +0100, Gerd Hoffmann wrote:
> >> Hi,
> >>
> >>> I think it's down to other qemu bugs (such as _CRS not covering
> >>> all of PCI memory), we shall ju
On 11/26/13 15:04, Michael S. Tsirkin wrote:
> On Tue, Nov 26, 2013 at 12:00:51PM +0100, Gerd Hoffmann wrote:
>> Hi,
>>
>>> I think it's down to other qemu bugs (such as _CRS not covering
>>> all of PCI memory), we shall just fix them.
>>
>> i.e. the attached patch should fixup things.
>>
>> chee
On 11/26/13 10:10, Michael S. Tsirkin wrote:
> seabios manages to enumerate PCI with information exported from qemu
> so why can't OVMF?
SeaBIOS and qemu duplicate logic (code) between each other.
src/fw/pciinit.c grabs RamSize over fw_cfg, and i440fx_mem_addr_setup()
sets "pcimem_start" to one
On Tue, Nov 26, 2013 at 12:00:51PM +0100, Gerd Hoffmann wrote:
> Hi,
>
> > I think it's down to other qemu bugs (such as _CRS not covering
> > all of PCI memory), we shall just fix them.
>
> i.e. the attached patch should fixup things.
>
> cheers,
> Gerd
>
Yes, I think it's a start. Q35 is
Hi,
> I think it's down to other qemu bugs (such as _CRS not covering
> all of PCI memory), we shall just fix them.
i.e. the attached patch should fixup things.
cheers,
Gerd
>From a81b8d66e24fd298ce7654d424a378337e6cf132 Mon Sep 17 00:00:00 2001
From: Gerd Hoffmann
Date: Tue, 26 Nov 2013 1
On Tue, Nov 26, 2013 at 09:12:50AM +0100, Laszlo Ersek wrote:
> On 11/18/13 12:53, Michael S. Tsirkin wrote:
> > From: Igor Mammedov
> >
> > The BIOS that we ship in 1.7 does not use pci info
> > from host and so far isn't going to use it.
> > Taking in account problems it caused see 9604f70fdf a
On 11/18/13 12:53, Michael S. Tsirkin wrote:
> From: Igor Mammedov
>
> The BIOS that we ship in 1.7 does not use pci info
> from host and so far isn't going to use it.
> Taking in account problems it caused see 9604f70fdf and
> to avoid future incompatibility issues, it's safest to
> disable that
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