On Sat, Apr 13, 2013 at 02:20:10PM +0100, Peter Maydell wrote:
> On 13 April 2013 13:47, Aurelien Jarno wrote:
> > fabs, fnabs and fneg are just flipping the bit sign of an FP register,
> > this can be implemented in TCG instead of using softfloat.
> > +tcg_gen_andi_i64(cpu_fpr[rD(ctx->opcode)
On 13 April 2013 13:47, Aurelien Jarno wrote:
> fabs, fnabs and fneg are just flipping the bit sign of an FP register,
> this can be implemented in TCG instead of using softfloat.
> +tcg_gen_andi_i64(cpu_fpr[rD(ctx->opcode)], cpu_fpr[rB(ctx->opcode)],
> + ~(1LL << 63));
"1
fabs, fnabs and fneg are just flipping the bit sign of an FP register,
this can be implemented in TCG instead of using softfloat.
Cc: Alexander Graf
Signed-off-by: Aurelien Jarno
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target-ppc/fpu_helper.c | 31 ---
target-ppc/helper.h |3 ---
target-ppc/t
