On Fri, 20 Dec 2024 11:52:51 +,
Kashyap Chamarthy wrote:
>
> On Thu, Dec 19, 2024 at 03:41:56PM +, Marc Zyngier wrote:
> > On Thu, 19 Dec 2024 15:07:25 +,
> > Kashyap Chamarthy wrote:
> > >
> > > On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> > > > On Thu, 19 Dec 20
On Thu, 19 Dec 2024 17:51:44 +,
Daniel "P. Berrangé" wrote:
>
> On Thu, Dec 19, 2024 at 03:41:56PM +, Marc Zyngier wrote:
> > On Thu, 19 Dec 2024 15:07:25 +,
> > Kashyap Chamarthy wrote:
> > >
> > > On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> > > > On Thu, 19 Dec
On Fri, Dec 20 2024, Kashyap Chamarthy wrote:
> Related tangent on CPU feature discoverability on ARM:
>
> Speaking of "Neoverse-N1", looking at a system that I have access to,
> the `lscpu` output does not say anything about who the integrator is; it
> only says:
>
> ...
> Vendor ID:
On Thu, Dec 19 2024, Daniel P. Berrangé wrote:
> On Thu, Dec 19, 2024 at 03:41:56PM +, Marc Zyngier wrote:
>> On Thu, 19 Dec 2024 15:07:25 +,
>> Kashyap Chamarthy wrote:
>> >
>> > On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
>> > > On Thu, 19 Dec 2024 11:35:16 +,
>>
On Thu, Dec 19, 2024 at 03:41:56PM +, Marc Zyngier wrote:
> On Thu, 19 Dec 2024 15:07:25 +,
> Kashyap Chamarthy wrote:
> >
> > On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> > > On Thu, 19 Dec 2024 11:35:16 +,
> > > Kashyap Chamarthy wrote:
[...]
> > > You can't re
On Thu, Dec 19, 2024 at 03:41:56PM +, Marc Zyngier wrote:
> On Thu, 19 Dec 2024 15:07:25 +,
> Kashyap Chamarthy wrote:
> >
> > On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> > > On Thu, 19 Dec 2024 11:35:16 +,
> > > Kashyap Chamarthy wrote:
> >
> > [...]
> >
> > >
On Thu, 19 Dec 2024 15:07:25 +,
Kashyap Chamarthy wrote:
>
> On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> > On Thu, 19 Dec 2024 11:35:16 +,
> > Kashyap Chamarthy wrote:
>
> [...]
>
> > > Consider this:
> > >
> > > Say, there's a serious security issue in a released
On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> On Thu, 19 Dec 2024 11:35:16 +,
> Kashyap Chamarthy wrote:
[...]
> > Consider this:
> >
> > Say, there's a serious security issue in a released ARM CPU. As part of
> > the fix, two new CPU flags need to be exposed to the guest
On Thu, Dec 12, 2024 at 11:04:30AM +0100, Eric Auger wrote:
Hi Eric,
> On 12/12/24 10:36, Cornelia Huck wrote:
> > On Thu, Dec 12 2024, Daniel P. Berrangé wrote:
[...]
> >> Consider you mgmt app wants to set a CPU model that's common across
> >> heterogeneous hardware. They don't neccessarily
On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> On Thu, 19 Dec 2024 11:35:16 +,
> Kashyap Chamarthy wrote:
> >
> > On Thu, Dec 12, 2024 at 11:04:30AM +0100, Eric Auger wrote:
> >
> > Hi Eric,
> >
> > > On 12/12/24 10:36, Cornelia Huck wrote:
> > > > On Thu, Dec 12 2024, Dani
On Thu, 19 Dec 2024 11:35:16 +,
Kashyap Chamarthy wrote:
>
> On Thu, Dec 12, 2024 at 11:04:30AM +0100, Eric Auger wrote:
>
> Hi Eric,
>
> > On 12/12/24 10:36, Cornelia Huck wrote:
> > > On Thu, Dec 12 2024, Daniel P. Berrangé wrote:
>
> [...]
>
> > >> Consider you mgmt app wants to set a
On Thu, 19 Dec 2024 12:38:50 +,
Daniel "P. Berrangé" wrote:
>
> On Thu, Dec 19, 2024 at 12:26:29PM +, Marc Zyngier wrote:
> > On Thu, 19 Dec 2024 11:35:16 +,
> > Kashyap Chamarthy wrote:
> > >
> > > On Thu, Dec 12, 2024 at 11:04:30AM +0100, Eric Auger wrote:
> > >
> > > Hi Eric,
>
Hi Marc,
On 12/17/24 16:21, Marc Zyngier wrote:
> On Fri, 06 Dec 2024 11:21:53 +,
> Cornelia Huck wrote:
>> A respin/update on the aarch64 KVM cpu models. Also available at
>> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>>
>> Find Eric's original cover letter below, so that I do not need to
>>
On Fri, 06 Dec 2024 11:21:53 +,
Cornelia Huck wrote:
>
> A respin/update on the aarch64 KVM cpu models. Also available at
> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>
> Find Eric's original cover letter below, so that I do not need to
> repeat myself on the aspects that have not changed si
On Mon, Dec 16 2024, Cornelia Huck wrote:
> On Thu, Dec 12 2024, Eric Auger wrote:
>
>> Connie,
>>
>> On 12/6/24 12:21, Cornelia Huck wrote:
>>> Whether it make sense to continue with the approach of tweaking values in
>>> the ID registers in general. If we want to be able to migrate between cpu
On Thu, Dec 12 2024, Eric Auger wrote:
> Connie,
>
> On 12/6/24 12:21, Cornelia Huck wrote:
>> Whether it make sense to continue with the approach of tweaking values in
>> the ID registers in general. If we want to be able to migrate between cpus
>> that do not differ wildly, we'll encounter diff
On Thu, Dec 12 2024, Sebastian Ott wrote:
> On Fri, 6 Dec 2024, Cornelia Huck wrote:
>> A respin/update on the aarch64 KVM cpu models. Also available at
>> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>>
>> Find Eric's original cover letter below, so that I do not need to
>> repeat myself on the as
On Thu, Dec 12 2024, Eric Auger wrote:
> On 12/12/24 10:36, Cornelia Huck wrote:
>> On Thu, Dec 12 2024, Daniel P. Berrangé wrote:
>>
>>> On Thu, Dec 12, 2024 at 09:12:33AM +0100, Eric Auger wrote:
Connie,
On 12/6/24 12:21, Cornelia Huck wrote:
> A respin/update on the aarch64
@redhat.com; abolo...@redhat.com; jdene...@redhat.com
>> Cc: shahu...@redhat.com; mark.rutl...@arm.com; phi...@linaro.org;
>> pbonz...@redhat.com
>> Subject: Re: [PATCH RFCv2 00/20] kvm/arm: Introduce a customizable
>> aarch64 KVM host model
>>
>> Shameer,
>&g
On Fri, 6 Dec 2024, Cornelia Huck wrote:
A respin/update on the aarch64 KVM cpu models. Also available at
gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
Find Eric's original cover letter below, so that I do not need to
repeat myself on the aspects that have not changed since RFCv1 :)
Changes from R
linaro.org;
> pbonz...@redhat.com
> Subject: Re: [PATCH RFCv2 00/20] kvm/arm: Introduce a customizable
> aarch64 KVM host model
>
> Shameer,
>
> On 12/12/24 09:12, Eric Auger wrote:
> > Connie,
> >
> > On 12/6/24 12:21, Cornelia Huck wrote:
> >> A resp
On 12/12/24 10:36, Cornelia Huck wrote:
> On Thu, Dec 12 2024, Daniel P. Berrangé wrote:
>
>> On Thu, Dec 12, 2024 at 09:12:33AM +0100, Eric Auger wrote:
>>> Connie,
>>>
>>> On 12/6/24 12:21, Cornelia Huck wrote:
A respin/update on the aarch64 KVM cpu models. Also available at
gitlab.
On Thu, Dec 12 2024, Daniel P. Berrangé wrote:
> On Thu, Dec 12, 2024 at 09:12:33AM +0100, Eric Auger wrote:
>> Connie,
>>
>> On 12/6/24 12:21, Cornelia Huck wrote:
>> > A respin/update on the aarch64 KVM cpu models. Also available at
>> > gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>
> snip
>
>>
On Thu, Dec 12, 2024 at 09:12:33AM +0100, Eric Auger wrote:
> Connie,
>
> On 12/6/24 12:21, Cornelia Huck wrote:
> > A respin/update on the aarch64 KVM cpu models. Also available at
> > gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
snip
> From a named model point of view, since I do not see much tr
Shameer,
On 12/12/24 09:12, Eric Auger wrote:
> Connie,
>
> On 12/6/24 12:21, Cornelia Huck wrote:
>> A respin/update on the aarch64 KVM cpu models. Also available at
>> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>>
>> Find Eric's original cover letter below, so that I do not need to
>> repeat my
Connie,
On 12/6/24 12:21, Cornelia Huck wrote:
> A respin/update on the aarch64 KVM cpu models. Also available at
> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>
> Find Eric's original cover letter below, so that I do not need to
> repeat myself on the aspects that have not changed since RFCv1 :)
>
Hi Peter, Richard,
On 12/6/24 12:21, Cornelia Huck wrote:
> A respin/update on the aarch64 KVM cpu models. Also available at
> gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
>
> Find Eric's original cover letter below, so that I do not need to
> repeat myself on the aspects that have not changed since
A respin/update on the aarch64 KVM cpu models. Also available at
gitlab.com/cohuck/qemu arm-cpu-model-rfcv2
Find Eric's original cover letter below, so that I do not need to
repeat myself on the aspects that have not changed since RFCv1 :)
Changes from RFCv1:
Rebased on more recent QEMU (some ad
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